Continue Coldfire MCF52221 CodeWarrior demo.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@509 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo.mcp b/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo.mcp
index 8375979944682e0340d399706b9fd9962eeeae50..16b26f2c0667b1a64485368fc250b4e7e042dd44 100644 (file)
Binary files a/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo.mcp and b/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo.mcp differ

diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/CWSettingsWindows.stg b/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/CWSettingsWindows.stg
index 75b25711d9bb5ce0fc8ffe43b44a98bcb6bc11be..175e7ab04ce1535d53b51b2e5980820fd851fbc8 100644 (file)
Binary files a/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/CWSettingsWindows.stg and b/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/CWSettingsWindows.stg differ

diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/INTERNAL_FLASH/TargetDataWindows.tdt b/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/INTERNAL_FLASH/TargetDataWindows.tdt
index 1b913d221aa79c823c08bc00083c7b82b7f10e5c..40b17e5f1a1b990916bcf4f72fcd5b4debe1f721 100644 (file)
Binary files a/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/INTERNAL_FLASH/TargetDataWindows.tdt and b/Demo/ColdFire_MCF52221_CodeWarrior/RTOSDemo_Data/INTERNAL_FLASH/TargetDataWindows.tdt differ

diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_INTERNAL_FLASH.lcf b/Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_INTERNAL_FLASH.lcf
index 72d2c1e8e356582f1bbd4797f1a3fa4002269f63..2c6123baf0e06db6c655cf5ab32ba78440b18f23 100644 (file)
--- a/Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_INTERNAL_FLASH.lcf
+++ b/Demo/ColdFire_MCF52221_CodeWarrior/lcf/MCF52221_INTERNAL_FLASH.lcf
@@ -8,7 +8,7 @@ MEMORY {
    vectorrom   (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000400\r
    cfmprotrom  (RX)  : ORIGIN = 0x00000400, LENGTH = 0x00000020   \r
    code        (RX)  : ORIGIN = 0x00000500, LENGTH = 0x0001FB00\r
-   userram     (RWX) : ORIGIN = 0x20000000, LENGTH = 0x00003C00\r
+   userram     (RWX) : ORIGIN = 0x20000000, LENGTH = 0x00004000\r
 }\r
 \r
 SECTIONS {\r

diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h b/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h
index 4480d1f144611130b816e49ac1da26ddf8616448..91874cbfabafa4534ca00908bb20d87b9ade732a 100644 (file)
--- a/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h
+++ b/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h
@@ -69,8 +69,8 @@
 #define configUSE_TICK_HOOK                            0\r
 #define configCPU_CLOCK_HZ                             ( ( unsigned portLONG ) 80000000 )\r
 #define configTICK_RATE_HZ                             ( ( portTickType ) 100 )\r
-#define configMINIMAL_STACK_SIZE               ( ( unsigned portSHORT ) 140 )\r
-#define configTOTAL_HEAP_SIZE                  ( ( size_t ) ( 14 * 1024 ) )\r
+#define configMINIMAL_STACK_SIZE               ( ( unsigned portSHORT ) 100 )\r
+#define configTOTAL_HEAP_SIZE                  ( ( size_t ) ( 15000 ) )\r
 #define configMAX_TASK_NAME_LEN                        ( 12 )\r
 #define configUSE_TRACE_FACILITY               1\r
 #define configUSE_16_BIT_TICKS                 0\r

diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/sources/exceptions.c b/Demo/ColdFire_MCF52221_CodeWarrior/sources/exceptions.c
index 93cedda051191db68d42bb7fa29f79ced986f42f..810058115abf7b1fcf1137e42ae139b1733c2a2e 100644 (file)
--- a/Demo/ColdFire_MCF52221_CodeWarrior/sources/exceptions.c
+++ b/Demo/ColdFire_MCF52221_CodeWarrior/sources/exceptions.c
@@ -12,6 +12,7 @@
 \r
 \r
 extern void vPIT0InterruptHandler( void );\r
+extern void vUART0InterruptHandler( void );\r
 extern void vPortYieldISR( void );\r
 extern void vFECISRHandler( void );\r
 \r
@@ -401,7 +402,7 @@ __declspec(vectortable) vectorTableEntryType _vect[256] = {   /* Interrupt vecto
    asm_exception_handler,           /*  74 (0x128) Device-specific interrupts */\r
    asm_exception_handler,           /*  75 (0x12C) Device-specific interrupts */\r
    asm_exception_handler,           /*  76 (0x130) Device-specific interrupts */\r
-   asm_exception_handler,           /*  77 (0x134) Device-specific interrupts */\r
+   vUART0InterruptHandler,          /*  77 (0x134) Device-specific interrupts */\r
    asm_exception_handler,           /*  78 (0x138) Device-specific interrupts */\r
    asm_exception_handler,           /*  79 (0x13C) Device-specific interrupts */\r
    vPortYieldISR,                      /*  80 (0x140) Device-specific interrupts */\r

diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c b/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c
index 0b4502ceb9a22200650434f95c00627cc5b10c05..9456f3cafb1579df7340b719a538f96c670cab4d 100644 (file)
--- a/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c
+++ b/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c
@@ -80,14 +80,12 @@
 \r
 /* Demo app includes. */\r
 #include "BlockQ.h"\r
-#include "death.h"\r
 #include "crflash.h"\r
 #include "partest.h"\r
 #include "semtest.h"\r
-#include "PollQ.h"\r
 #include "GenQTest.h"\r
 #include "QPeek.h"\r
-#include "recmutex.h"\r
+#include "comtest2.h"\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
@@ -108,18 +106,21 @@ error have been detected. */
 \r
 /* Task priorities. */\r
 #define mainCOM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 2 )\r
-#define mainQUEUE_POLL_PRIORITY                                ( tskIDLE_PRIORITY + 2 )\r
 #define mainCHECK_TASK_PRIORITY                                ( tskIDLE_PRIORITY + 3 )\r
 #define mainSEM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 1 )\r
 #define mainBLOCK_Q_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
-#define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
-#define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
 #define mainGEN_QUEUE_TASK_PRIORITY                    ( tskIDLE_PRIORITY )\r
-#define mainWEB_TASK_PRIORITY                  ( tskIDLE_PRIORITY + 2 )\r
 \r
 /* Co-routines are used to flash the LEDs. */\r
 #define mainNUM_FLASH_CO_ROUTINES                      ( 3 )\r
 \r
+/* The baud rate used by the comtest tasks. */\r
+#define mainBAUD_RATE                                          ( 38400 )\r
+\r
+/* There is no spare LED for the comtest tasks, so this is set to an invalid\r
+number. */\r
+#define mainCOM_LED                                                    ( 4 )\r
+\r
 /*\r
  * Configure the hardware for the demo.\r
  */\r
@@ -131,6 +132,12 @@ static void prvSetupHardware( void );
  */\r
 static void prvCheckTask( void *pvParameters );\r
 \r
+/*\r
+ * Implement the 'Reg test' functionality as described at the top of this file.\r
+ */\r
+static void vRegTest1Task( void *pvParameters );\r
+static void vRegTest2Task( void *pvParameters );\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Counters used to detect errors within the reg test tasks. */\r
@@ -148,6 +155,7 @@ int main( void )
        vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
        vStartQueuePeekTasks();\r
        vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+       vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
 \r
        /* For demo purposes use some co-routines to flash the LEDs. */\r
        vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
@@ -155,6 +163,11 @@ int main( void )
        /* Create the check task. */\r
        xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 \r
+\r
+       /* Start the reg test tasks - defined in this file. */\r
+       xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
+       xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
+\r
        /* Start the scheduler. */\r
        vTaskStartScheduler();\r
 \r
@@ -168,8 +181,9 @@ int main( void )
 \r
 static void prvCheckTask( void *pvParameters )\r
 {\r
-unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
+unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 portTickType xLastExecutionTime;\r
+volatile unsigned portBASE_TYPE uxUnusedStack;\r
 \r
        ( void ) pvParameters;\r
 \r
@@ -202,6 +216,24 @@ portTickType xLastExecutionTime;
            {\r
                ulError |= 0x20UL;\r
            }\r
+           \r
+           if( xAreComTestTasksStillRunning() != pdTRUE )\r
+           {\r
+               ulError |= 0x40UL;\r
+           }\r
+\r
+               if( ulLastRegTest1Count == ulRegTest1Counter )\r
+               {\r
+                       ulError |= 0x1000UL;\r
+               }\r
+\r
+               if( ulLastRegTest2Count == ulRegTest2Counter )\r
+               {\r
+                       ulError |= 0x1000UL;\r
+               }\r
+\r
+               ulLastRegTest1Count = ulRegTest1Counter;\r
+               ulLastRegTest2Count = ulRegTest2Counter;\r
 \r
                /* If an error has been found then increase our cycle rate, and in so\r
                doing increase the rate at which the check task LED toggles. */\r
@@ -212,6 +244,9 @@ portTickType xLastExecutionTime;
 \r
                /* Toggle the LED each itteration. */\r
                vParTestToggleLED( mainCHECK_LED );\r
+               \r
+               /* For demo only - how much unused stack does this task have? */\r
+               uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
        }\r
 }\r
 /*-----------------------------------------------------------*/\r
@@ -256,4 +291,165 @@ void exit( int n )
        ( void ) n;\r
        for( ;; ) {}\r
 }\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vRegTest1Task( void *pvParameters )\r
+{\r
+       /* Sanity check - did we receive the parameter expected? */\r
+       if( pvParameters != &ulRegTest1Counter )\r
+       {\r
+               /* Change here so the check task can detect that an error occurred. */\r
+               for( ;; )\r
+               {\r
+               }\r
+       }\r
+\r
+       /* Set all the registers to known values, then check that each retains its\r
+       expected value - as described at the top of this file.  If an error is\r
+       found then the loop counter will no longer be incremented allowing the check\r
+       task to recognise the error. */\r
+       asm volatile    (       "reg_test_1_start:                                              \n\t"\r
+                                               "       moveq           #1, d0                                  \n\t"\r
+                                               "       moveq           #2, d1                                  \n\t"\r
+                                               "       moveq           #3, d2                                  \n\t"\r
+                                               "       moveq           #4, d3                                  \n\t"\r
+                                               "       moveq           #5, d4                                  \n\t"\r
+                                               "       moveq           #6, d5                                  \n\t"\r
+                                               "       moveq           #7, d6                                  \n\t"\r
+                                               "       moveq           #8, d7                                  \n\t"\r
+                                               "       move            #9, a0                                  \n\t"\r
+                                               "       move            #10, a1                                 \n\t"\r
+                                               "       move            #11, a2                                 \n\t"\r
+                                               "       move            #12, a3                                 \n\t"\r
+                                               "       move            #13, a4                                 \n\t"\r
+                                               "       move            #14, a5                                 \n\t"\r
+                                               "       move            #15, a6                                 \n\t"\r
+                                               "                                                                               \n\t"\r
+                                               "       cmpi.l          #1, d0                                  \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       cmpi.l          #2, d1                                  \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       cmpi.l          #3, d2                                  \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       cmpi.l          #4, d3                                  \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       cmpi.l          #5, d4                                  \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       cmpi.l          #6, d5                                  \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       cmpi.l          #7, d6                                  \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       cmpi.l          #8, d7                                  \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       move            a0, d0                                  \n\t"\r
+                                               "       cmpi.l          #9, d0                                  \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       move            a1, d0                                  \n\t"\r
+                                               "       cmpi.l          #10, d0                                 \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       move            a2, d0                                  \n\t"\r
+                                               "       cmpi.l          #11, d0                                 \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       move            a3, d0                                  \n\t"\r
+                                               "       cmpi.l          #12, d0                                 \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       move            a4, d0                                  \n\t"\r
+                                               "       cmpi.l          #13, d0                                 \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       move            a5, d0                                  \n\t"\r
+                                               "       cmpi.l          #14, d0                                 \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       move            a6, d0                                  \n\t"\r
+                                               "       cmpi.l          #15, d0                                 \n\t"\r
+                                               "       bne                     reg_test_1_error                \n\t"\r
+                                               "       move            ulRegTest1Counter, d0   \n\t"\r
+                                               "       addq            #1, d0                                  \n\t"\r
+                                               "       move            d0, ulRegTest1Counter   \n\t"\r
+                                               "       bra                     reg_test_1_start                \n\t"\r
+                                               "reg_test_1_error:                                              \n\t"\r
+                                               "       bra                     reg_test_1_error                \n\t"\r
+                                       );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vRegTest2Task( void *pvParameters )\r
+{\r
+       /* Sanity check - did we receive the parameter expected? */\r
+       if( pvParameters != &ulRegTest2Counter )\r
+       {\r
+               /* Change here so the check task can detect that an error occurred. */\r
+               for( ;; )\r
+               {\r
+               }\r
+       }\r
+\r
+       /* Set all the registers to known values, then check that each retains its\r
+       expected value - as described at the top of this file.  If an error is\r
+       found then the loop counter will no longer be incremented allowing the check\r
+       task to recognise the error. */\r
+       asm volatile    (       "reg_test_2_start:                                              \n\t"\r
+                                               "       moveq           #10, d0                                 \n\t"\r
+                                               "       moveq           #20, d1                                 \n\t"\r
+                                               "       moveq           #30, d2                                 \n\t"\r
+                                               "       moveq           #40, d3                                 \n\t"\r
+                                               "       moveq           #50, d4                                 \n\t"\r
+                                               "       moveq           #60, d5                                 \n\t"\r
+                                               "       moveq           #70, d6                                 \n\t"\r
+                                               "       moveq           #80, d7                                 \n\t"\r
+                                               "       move            #90, a0                                 \n\t"\r
+                                               "       move            #100, a1                                \n\t"\r
+                                               "       move            #110, a2                                \n\t"\r
+                                               "       move            #120, a3                                \n\t"\r
+                                               "       move            #130, a4                                \n\t"\r
+                                               "       move            #140, a5                                \n\t"\r
+                                               "       move            #150, a6                                \n\t"\r
+                                               "                                                                               \n\t"\r
+                                               "       cmpi.l          #10, d0                                 \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       cmpi.l          #20, d1                                 \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       cmpi.l          #30, d2                                 \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       cmpi.l          #40, d3                                 \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       cmpi.l          #50, d4                                 \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       cmpi.l          #60, d5                                 \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       cmpi.l          #70, d6                                 \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       cmpi.l          #80, d7                                 \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       move            a0, d0                                  \n\t"\r
+                                               "       cmpi.l          #90, d0                                 \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       move            a1, d0                                  \n\t"\r
+                                               "       cmpi.l          #100, d0                                \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       move            a2, d0                                  \n\t"\r
+                                               "       cmpi.l          #110, d0                                \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       move            a3, d0                                  \n\t"\r
+                                               "       cmpi.l          #120, d0                                \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       move            a4, d0                                  \n\t"\r
+                                               "       cmpi.l          #130, d0                                \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       move            a5, d0                                  \n\t"\r
+                                               "       cmpi.l          #140, d0                                \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       move            a6, d0                                  \n\t"\r
+                                               "       cmpi.l          #150, d0                                \n\t"\r
+                                               "       bne                     reg_test_2_error                \n\t"\r
+                                               "       move            ulRegTest1Counter, d0   \n\t"\r
+                                               "       addq            #1, d0                                  \n\t"\r
+                                               "       move            d0, ulRegTest2Counter   \n\t"\r
+                                               "       bra                     reg_test_2_start                \n\t"\r
+                                               "reg_test_2_error:                                              \n\t"\r
+                                               "       bra                     reg_test_2_error                \n\t"\r
+                                       );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
 \r

diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/sources/startcf.c b/Demo/ColdFire_MCF52221_CodeWarrior/sources/startcf.c
index dabac672dd7f2dbeec00990032d07aaf8e478382..df6c7e28f08ea7db1722d32ec5ca6165aee637f9 100644 (file)
--- a/Demo/ColdFire_MCF52221_CodeWarrior/sources/startcf.c
+++ b/Demo/ColdFire_MCF52221_CodeWarrior/sources/startcf.c
@@ -188,7 +188,7 @@ asm void _startup(void)
 {\r
        /* disable interrupts */\r
     move.w        #0x2700,sr\r
-\r
+    \r
        /* Pre-init SP, in case memory for stack is not valid it should be setup using \r
           MEMORY_INIT before __initialize_hardware is called \r
        */\r