RISC-V tasks now context switching to each other using taskYIELD() - not fully tested...

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2585 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
index 5e66d08c4f7262b2b5a380943cf6c6f1b03928f0..24611a9bef5d34802ec83323f953fa2c7e05a8c6 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
@@ -50,14 +50,14 @@ static void prvTaskExitError( void );
 \r
 /* Used to program the machine timer compare register. */\r
 static uint64_t ullNextTime = 0ULL;\r
-static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) 0x2004000;\r
+static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCTRL_BASE + 0x4000 );\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
 void prvTaskExitError( void )\r
 {\r
 volatile uint32_t ulx = 0;\r
-#warning prvTaskExitError not used yet.\r
+\r
        /* A function that implements a task must not exit or attempt to return to\r
        its caller as there is nothing to return to.  If a task wants to exit it\r
        should instead call vTaskDelete( NULL ).\r
@@ -154,6 +154,8 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
 //     pxTopOfStack--;\r
 //     *pxTopOfStack = ( StackType_t ) 2;  /* Stack pointer. */\r
 //     pxTopOfStack--;\r
+       *pxTopOfStack = ( StackType_t ) prvTaskExitError;\r
+       pxTopOfStack--;\r
        *pxTopOfStack = ( StackType_t ) pxCode;\r
 \r
        return pxTopOfStack;\r
@@ -163,8 +165,8 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
 void vPortSetupTimerInterrupt( void )\r
 {\r
 uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;\r
-volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) 0x200BFF8;\r
-volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) 0x200BFFc;\r
+volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFF8 );\r
+volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFFc );\r
 \r
        do\r
        {\r
@@ -185,9 +187,13 @@ volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) 0x200BFFc;
 \r
 void Software_IRQHandler( void )\r
 {\r
-       vTaskSwitchContext();\r
-}\r
+volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE;\r
 \r
+       vTaskSwitchContext();\r
 \r
+       /* Clear software interrupt. */\r
+       *ulSoftInterrupt = 0UL;\r
+}\r
+/*-----------------------------------------------------------*/\r
 \r
 \r

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
index d86757e8cea30278682cd4a0691f27bd5dfb84fc..5efe94f07770a17eab94e04f908c9674f267ddf7 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
@@ -47,80 +47,83 @@
 \r
 .align 8\r
 xPortStartScheduler:\r
-       lw      sp, pxCurrentTCB                        /* Load pxCurrentTCB. */\r
-       lw      sp, 0( sp )                                     /* Read sp from first TCB member. */\r
-       lw      x1, 0( sp )\r
-       lw      x5, 1 * WORD_SIZE( sp )         /* t0 */\r
-       lw      x6, 2 * WORD_SIZE( sp )         /* t1 */\r
-       lw      x7, 3 * WORD_SIZE( sp )         /* t2 */\r
-       lw      x8, 4 * WORD_SIZE( sp )         /* s0/fp */\r
-       lw      x9, 5 * WORD_SIZE( sp )         /* s1 */\r
-       lw      x10, 6 * WORD_SIZE( sp )        /* a0 */\r
-       lw      x11, 7 * WORD_SIZE( sp )        /* a1 */\r
-       lw      x12, 8 * WORD_SIZE( sp )        /* a2 */\r
-       lw      x13, 9 * WORD_SIZE( sp )        /* a3 */\r
-       lw      x14, 10 * WORD_SIZE( sp )       /* a4 */\r
-       lw      x15, 11 * WORD_SIZE( sp )       /* a5 */\r
-       lw      x16, 12 * WORD_SIZE( sp )       /* a6 */\r
-       lw      x17, 13 * WORD_SIZE( sp )       /* a7 */\r
-       lw      x18, 14 * WORD_SIZE( sp )       /* s2 */\r
-       lw      x19, 15 * WORD_SIZE( sp )       /* s3 */\r
-       lw      x20, 16 * WORD_SIZE( sp )       /* s4 */\r
-       lw      x21, 17 * WORD_SIZE( sp )       /* s5 */\r
-       lw      x22, 18 * WORD_SIZE( sp )       /* s6 */\r
-       lw      x23, 19 * WORD_SIZE( sp )       /* s7 */\r
-       lw      x24, 20 * WORD_SIZE( sp )       /* s8 */\r
-       lw      x25, 21 * WORD_SIZE( sp )       /* s9 */\r
-       lw      x26, 22 * WORD_SIZE( sp )       /* s10 */\r
-       lw      x27, 23 * WORD_SIZE( sp )       /* s11 */\r
-       lw      x28, 24 * WORD_SIZE( sp )       /* t3 */\r
-       lw      x29, 25 * WORD_SIZE( sp )       /* t4 */\r
-       lw      x30, 26 * WORD_SIZE( sp )       /* t5 */\r
-       lw      x31, 27 * WORD_SIZE( sp )       /* t6 */\r
-       addi    sp, sp, CONTEXT_SIZE\r
-       csrs    mie, 8                                  /* Enable soft interrupt. */\r
-       csrs    mstatus, 8                              /* Enable interrupts. */\r
-       ret\r
+    lw  sp, pxCurrentTCB            /* Load pxCurrentTCB. */\r
+    lw  sp, 0( sp )                 /* Read sp from first TCB member. */\r
+\r
+    lw  x1, 0( sp ) /* Note for starting the scheduler the exception return address is used as the function return address. */\r
+    lw  x5, 2 * WORD_SIZE( sp )     /* t0 */\r
+    lw  x6, 3 * WORD_SIZE( sp )     /* t1 */\r
+    lw  x7, 4 * WORD_SIZE( sp )     /* t2 */\r
+    lw  x8, 5 * WORD_SIZE( sp )     /* s0/fp */\r
+    lw  x9, 6 * WORD_SIZE( sp )     /* s1 */\r
+    lw  x10, 7 * WORD_SIZE( sp )    /* a0 */\r
+    lw  x11, 8 * WORD_SIZE( sp )    /* a1 */\r
+    lw  x12, 9 * WORD_SIZE( sp )    /* a2 */\r
+    lw  x13, 10 * WORD_SIZE( sp )   /* a3 */\r
+    lw  x14, 11 * WORD_SIZE( sp )   /* a4 */\r
+    lw  x15, 12 * WORD_SIZE( sp )   /* a5 */\r
+    lw  x16, 13 * WORD_SIZE( sp )   /* a6 */\r
+    lw  x17, 14 * WORD_SIZE( sp )   /* a7 */\r
+    lw  x18, 15 * WORD_SIZE( sp )   /* s2 */\r
+    lw  x19, 16 * WORD_SIZE( sp )   /* s3 */\r
+    lw  x20, 17 * WORD_SIZE( sp )   /* s4 */\r
+    lw  x21, 18 * WORD_SIZE( sp )   /* s5 */\r
+    lw  x22, 19 * WORD_SIZE( sp )   /* s6 */\r
+    lw  x23, 20 * WORD_SIZE( sp )   /* s7 */\r
+    lw  x24, 21 * WORD_SIZE( sp )   /* s8 */\r
+    lw  x25, 22 * WORD_SIZE( sp )   /* s9 */\r
+    lw  x26, 23 * WORD_SIZE( sp )   /* s10 */\r
+    lw  x27, 24 * WORD_SIZE( sp )   /* s11 */\r
+    lw  x28, 25 * WORD_SIZE( sp )   /* t3 */\r
+    lw  x29, 26 * WORD_SIZE( sp )   /* t4 */\r
+    lw  x30, 27 * WORD_SIZE( sp )   /* t5 */\r
+    lw  x31, 28 * WORD_SIZE( sp )   /* t6 */\r
+    addi    sp, sp, CONTEXT_SIZE\r
+    csrs    mstatus, 8              /* Enable machine interrupts. */\r
+    csrs    mie, 8                  /* Enable soft interrupt. */\r
+    ret\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
 .align 8\r
 vPortTrapHandler:\r
        addi sp, sp, -CONTEXT_SIZE\r
-       sw x1, 0( sp )\r
-       sw x5, 1 * WORD_SIZE( sp )\r
-       sw x6, 2 * WORD_SIZE( sp )\r
-       sw x7, 3 * WORD_SIZE( sp )\r
-       sw x8, 4 * WORD_SIZE( sp )\r
-       sw x9, 5 * WORD_SIZE( sp )\r
-       sw x10, 6 * WORD_SIZE( sp )\r
-       sw x11, 7 * WORD_SIZE( sp )\r
-       sw x12, 8 * WORD_SIZE( sp )\r
-       sw x13, 9 * WORD_SIZE( sp )\r
-       sw x14, 10 * WORD_SIZE( sp )\r
-       sw x15, 11 * WORD_SIZE( sp )\r
-       sw x16, 12 * WORD_SIZE( sp )\r
-       sw x17, 13 * WORD_SIZE( sp )\r
-       sw x18, 14 * WORD_SIZE( sp )\r
-       sw x19, 15 * WORD_SIZE( sp )\r
-       sw x20, 16 * WORD_SIZE( sp )\r
-       sw x21, 17 * WORD_SIZE( sp )\r
-       sw x22, 18 * WORD_SIZE( sp )\r
-       sw x23, 19 * WORD_SIZE( sp )\r
-       sw x24, 20 * WORD_SIZE( sp )\r
-       sw x25, 21 * WORD_SIZE( sp )\r
-       sw x26, 22 * WORD_SIZE( sp )\r
-       sw x27, 23 * WORD_SIZE( sp )\r
-       sw x28, 24 * WORD_SIZE( sp )\r
-       sw x29, 25 * WORD_SIZE( sp )\r
-       sw x30, 26 * WORD_SIZE( sp )\r
-       sw x31, 27 * WORD_SIZE( sp )\r
+       sw x1, 1( sp )\r
+       sw x5, 2 * WORD_SIZE( sp )\r
+       sw x6, 3 * WORD_SIZE( sp )\r
+       sw x7, 4 * WORD_SIZE( sp )\r
+       sw x8, 5 * WORD_SIZE( sp )\r
+       sw x9, 6 * WORD_SIZE( sp )\r
+       sw x10, 7 * WORD_SIZE( sp )\r
+       sw x11, 8 * WORD_SIZE( sp )\r
+       sw x12, 9 * WORD_SIZE( sp )\r
+       sw x13, 10 * WORD_SIZE( sp )\r
+       sw x14, 11 * WORD_SIZE( sp )\r
+       sw x15, 12 * WORD_SIZE( sp )\r
+       sw x16, 13 * WORD_SIZE( sp )\r
+       sw x17, 14 * WORD_SIZE( sp )\r
+       sw x18, 15 * WORD_SIZE( sp )\r
+       sw x19, 16 * WORD_SIZE( sp )\r
+       sw x20, 17 * WORD_SIZE( sp )\r
+       sw x21, 18 * WORD_SIZE( sp )\r
+       sw x22, 19 * WORD_SIZE( sp )\r
+       sw x23, 20 * WORD_SIZE( sp )\r
+       sw x24, 21 * WORD_SIZE( sp )\r
+       sw x25, 22 * WORD_SIZE( sp )\r
+       sw x26, 23 * WORD_SIZE( sp )\r
+       sw x27, 24 * WORD_SIZE( sp )\r
+       sw x28, 25 * WORD_SIZE( sp )\r
+       sw x29, 26 * WORD_SIZE( sp )\r
+       sw x30, 27 * WORD_SIZE( sp )\r
+       sw x31, 28 * WORD_SIZE( sp )\r
+\r
+    /* Save exception return address. */\r
+    csrr t0, mepc\r
+    sw t0, 0( sp )\r
+\r
     lw  t0, pxCurrentTCB            /* Load pxCurrentTCB. */\r
     sw  sp, 0( t0 )                 /* Write sp from first TCB member. */\r
 \r
-       csrr t0, mepc\r
-       sw t0, 31 * WORD_SIZE( sp )\r
-\r
        csrr a0, mcause\r
        csrr a1, mepc\r
        mv a2, sp\r
@@ -131,37 +134,43 @@ vPortTrapHandler:
        li t0, 0x00001800 /* MSTATUS MPP */\r
        csrs mstatus, t0\r
 \r
-       /* Cut and past restore code from xPortStartScheduler - can be made a macro\r
-       but that makes debugging harder. */\r
-       lw      sp, pxCurrentTCB                        /* Load pxCurrentTCB. */\r
-       lw      sp, 0( sp )                                     /* Read sp from first TCB member. */\r
-       lw      x1, 0( sp )\r
-       lw      x5, 1 * WORD_SIZE( sp )         /* t0 */\r
-       lw      x6, 2 * WORD_SIZE( sp )         /* t1 */\r
-       lw      x7, 3 * WORD_SIZE( sp )         /* t2 */\r
-       lw      x8, 4 * WORD_SIZE( sp )         /* s0/fp */\r
-       lw      x9, 5 * WORD_SIZE( sp )         /* s1 */\r
-       lw      x10, 6 * WORD_SIZE( sp )        /* a0 */\r
-       lw      x11, 7 * WORD_SIZE( sp )        /* a1 */\r
-       lw      x12, 8 * WORD_SIZE( sp )        /* a2 */\r
-       lw      x13, 9 * WORD_SIZE( sp )        /* a3 */\r
-       lw      x14, 10 * WORD_SIZE( sp )       /* a4 */\r
-       lw      x15, 11 * WORD_SIZE( sp )       /* a5 */\r
-       lw      x16, 12 * WORD_SIZE( sp )       /* a6 */\r
-       lw      x17, 13 * WORD_SIZE( sp )       /* a7 */\r
-       lw      x18, 14 * WORD_SIZE( sp )       /* s2 */\r
-       lw      x19, 15 * WORD_SIZE( sp )       /* s3 */\r
-       lw      x20, 16 * WORD_SIZE( sp )       /* s4 */\r
-       lw      x21, 17 * WORD_SIZE( sp )       /* s5 */\r
-       lw      x22, 18 * WORD_SIZE( sp )       /* s6 */\r
-       lw      x23, 19 * WORD_SIZE( sp )       /* s7 */\r
-       lw      x24, 20 * WORD_SIZE( sp )       /* s8 */\r
-       lw      x25, 21 * WORD_SIZE( sp )       /* s9 */\r
-       lw      x26, 22 * WORD_SIZE( sp )       /* s10 */\r
-       lw      x27, 23 * WORD_SIZE( sp )       /* s11 */\r
-       lw      x28, 24 * WORD_SIZE( sp )       /* t3 */\r
-       lw      x29, 25 * WORD_SIZE( sp )       /* t4 */\r
-       lw      x30, 26 * WORD_SIZE( sp )       /* t5 */\r
-       lw      x31, 27 * WORD_SIZE( sp )       /* t6 */\r
-       addi sp, sp, CONTEXT_SIZE\r
-       mret\r
+    lw  sp, pxCurrentTCB            /* Load pxCurrentTCB. */\r
+    lw  sp, 0( sp )                 /* Read sp from first TCB member. */\r
+\r
+    /* Load mret with the address of the first task. */\r
+    lw t0, 0( sp )\r
+    csrw mepc, t0\r
+\r
+    lw  x1, 1( sp )\r
+    lw  x5, 2 * WORD_SIZE( sp )     /* t0 */\r
+    lw  x6, 3 * WORD_SIZE( sp )     /* t1 */\r
+    lw  x7, 4 * WORD_SIZE( sp )     /* t2 */\r
+    lw  x8, 5 * WORD_SIZE( sp )     /* s0/fp */\r
+    lw  x9, 6 * WORD_SIZE( sp )     /* s1 */\r
+    lw  x10, 7 * WORD_SIZE( sp )    /* a0 */\r
+    lw  x11, 8 * WORD_SIZE( sp )    /* a1 */\r
+    lw  x12, 9 * WORD_SIZE( sp )    /* a2 */\r
+    lw  x13, 10 * WORD_SIZE( sp )   /* a3 */\r
+    lw  x14, 11 * WORD_SIZE( sp )   /* a4 */\r
+    lw  x15, 12 * WORD_SIZE( sp )   /* a5 */\r
+    lw  x16, 13 * WORD_SIZE( sp )   /* a6 */\r
+    lw  x17, 14 * WORD_SIZE( sp )   /* a7 */\r
+    lw  x18, 15 * WORD_SIZE( sp )   /* s2 */\r
+    lw  x19, 16 * WORD_SIZE( sp )   /* s3 */\r
+    lw  x20, 17 * WORD_SIZE( sp )   /* s4 */\r
+    lw  x21, 18 * WORD_SIZE( sp )   /* s5 */\r
+    lw  x22, 19 * WORD_SIZE( sp )   /* s6 */\r
+    lw  x23, 20 * WORD_SIZE( sp )   /* s7 */\r
+    lw  x24, 21 * WORD_SIZE( sp )   /* s8 */\r
+    lw  x25, 22 * WORD_SIZE( sp )   /* s9 */\r
+    lw  x26, 23 * WORD_SIZE( sp )   /* s10 */\r
+    lw  x27, 24 * WORD_SIZE( sp )   /* s11 */\r
+    lw  x28, 25 * WORD_SIZE( sp )   /* t3 */\r
+    lw  x29, 26 * WORD_SIZE( sp )   /* t4 */\r
+    lw  x30, 27 * WORD_SIZE( sp )   /* t5 */\r
+    lw  x31, 28 * WORD_SIZE( sp )   /* t6 */\r
+    addi    sp, sp, CONTEXT_SIZE\r
+\r
+    mret\r
+\r
+\r

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
index 7132bf4bab32b48271a23ad2336946f92abb2510..a256d5b0cfdc1cb76c62a1a9732935f6b7a218fb 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
@@ -70,7 +70,7 @@ not need to be guarded with a critical section. */
 \r
 \r
 /* Scheduler utilities. */\r
-#define portYIELD() {  volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) 0x2000000;   *ulSoftInterrupt = 1UL; }\r
+#define portYIELD() {  volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE;     *ulSoftInterrupt = 1UL; }\r
 #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield()\r
 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
 /*-----------------------------------------------------------*/\r