]> git.sur5r.net Git - openocd/commitdiff
TCL/SPEAr: move device specific code
authorAntonio Borneo <borneo.antonio@gmail.com>
Fri, 21 Jan 2011 04:53:19 +0000 (12:53 +0800)
committerSpencer Oliver <spen@spen-soft.co.uk>
Mon, 21 Nov 2011 22:04:46 +0000 (22:04 +0000)
The initialization of memory port 1 is required by
SPEAr310 only

Change-Id: I9d655da1026795f02ff2f82aed36441068cf266d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/225
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
tcl/chip/st/spear/spear310.tcl
tcl/chip/st/spear/spear3xx.tcl

index 95df51d45d9024c66a71ff2c60e0517eb804211f..3aaa10d4982edbef4390a76261b939b6c529a194 100644 (file)
@@ -10,6 +10,8 @@ proc sp310_init {} {
        mww 0xfca80040 0x00000000       ;# remove all RAS resets
        mww 0xb4000008 0x00002ff4       ;# RAS function enable
 
+       mww 0xfca80050 0x00000001       ;# Enable clk mem port 1
+
        mww 0xfca8013c 0x2f7bc210       ;# plgpio_pad_drv
        mww 0xfca80140 0x017bdef6
 }
index 660dab3baeb910ed4c353d26e90353994d846a66..4c6f43612867f0ec9033e36e5c5d2a36e124d7c2 100644 (file)
@@ -60,8 +60,6 @@ proc sp3xx_common_init {} {
        mww 0xfca800e4 0x78000008       ;# COMP1V8_REG
        mww 0xfca800ec 0x78000008       ;# COMP3V3_REG
 
-       mww 0xfca80050 0x00000001       ;# Enable clk mem port 1
-
        mww 0xfc000000 0x10000f5f       ;# init SMI and set HW mode
        mww 0xfc000000 0x00000f5f