Use ARMCM33_DSP_FP_TZ_config.txt which comes with the MDS installation

We had a copy of ARMCM33_DSP_FP_TZ_config.txt file within the project directory
and it used to get outdated with each release of MDK because of non-backward
compatible changes in MDK. This change removes the copy in the project and
instead uses the one shipped with the MDK installation.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2669 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/ARMCM33_DSP_FP_TZ_config.txt b/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/ARMCM33_DSP_FP_TZ_config.txt
deleted file mode 100644 (file)
index 9bff8ee..0000000
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/ARMCM33_DSP_FP_TZ_config.txt
+++ /dev/null
@@ -1,177 +0,0 @@
-# Parameters:\r
-# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]\r
-#----------------------------------------------------------------------------------------------\r
-cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support\r
-cpu0.DSP=1                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension\r
-cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.\r
-cpu0.MPU_S=0x8                                        # (int   , init-time) default = '0x8'    : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10]\r
-cpu0.MPU_NS=0x8                                       # (int   , init-time) default = '0x8'    : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10]\r
-cpu0.ITM=0                                            # (bool  , init-time) default = '1'      : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included\r
-cpu0.IRQLVL=0x3                                       # (int   , init-time) default = '0x3'    : Number of bits of interrupt priority : [0x3..0x8]\r
-cpu0.BIGENDINIT=0                                     # (bool  , init-time) default = '0'      : Initialize processor to big endian mode\r
-cpu0.INITSVTOR=0x00000000                             # (int   , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80]\r
-cpu0.INITNSVTOR=0x0                                   # (int   , init-time) default = '0x0'    : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80]\r
-cpu0.SAU=0x8                                          # (int   , init-time) default = '0x4'    : Number of SAU regions (0 => no SAU) : [0x0..0x8]\r
-cpu0.SAU_CTRL.ENABLE=0                                # (bool  , init-time) default = '0'      : Enable SAU at reset\r
-cpu0.SAU_CTRL.ALLNS=0                                 # (bool  , init-time) default = '0'      : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set\r
-idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : \r
-cpu0.LOCK_SAU=0                                       # (bool  , init-time) default = '0'      : Lock down of SAU registers write\r
-cpu0.LOCK_S_MPU=0                                     # (bool  , init-time) default = '0'      : Lock down of Secure MPU registers write\r
-cpu0.LOCK_NS_MPU=0                                    # (bool  , init-time) default = '0'      : Lock down of Non-Secure MPU registers write\r
-cpu0.CPIF=1                                           # (bool  , init-time) default = '1'      : Specifies whether the external coprocessor interface is included\r
-cpu0.SECEXT=1                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included\r
-fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic\r
-fvp_mps2.SCC_ID.Variant=0x0                           # (int   , init-time) default = '0x0'    : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF]\r
-fvp_mps2.SCC_ID.Revision=0x1                          # (int   , init-time) default = '0x1'    : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF]\r
-fvp_mps2.platform_type=0x0                            # (int   , init-time) default = '0x0'    : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2]\r
-fvp_mps2.extra_psram=0                                # (bool  , init-time) default = '0'      : Increases PSRAM to 32Mb\r
-fvp_mps2.UART2.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)\r
-fvp_mps2.UART2.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART\r
-fvp_mps2.UART2.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output\r
-fvp_mps2.UART2.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence\r
-fvp_mps2.UART2.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)\r
-fvp_mps2.UART2.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted\r
-fvp_mps2.UART1.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)\r
-fvp_mps2.UART1.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART\r
-fvp_mps2.UART1.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output\r
-fvp_mps2.UART1.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence\r
-fvp_mps2.UART1.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)\r
-fvp_mps2.UART1.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted\r
-fvp_mps2.mps2_visualisation.rate_limit-enable=1       # (bool  , init-time) default = '1'      : Rate limit simulation.\r
-fvp_mps2.mps2_visualisation.disable-visualisation=0   # (bool  , init-time) default = '0'      : Enable/disable visualisation\r
-fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%"  # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name)\r
-fvp_mps2.mps2_visualisation.idler.delay_ms=0x32       # (int   , init-time) default = '0x32'   : Determines the period, in milliseconds of real time, between gui_callback() calls.\r
-fvp_mps2.telnetterminal0.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode\r
-fvp_mps2.telnetterminal0.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected\r
-fvp_mps2.telnetterminal0.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]\r
-fvp_mps2.telnetterminal0.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr\r
-fvp_mps2.telnetterminal0.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)\r
-fvp_mps2.telnetterminal1.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode\r
-fvp_mps2.telnetterminal1.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected\r
-fvp_mps2.telnetterminal1.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]\r
-fvp_mps2.telnetterminal1.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr\r
-fvp_mps2.telnetterminal1.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)\r
-fvp_mps2.telnetterminal2.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode\r
-fvp_mps2.telnetterminal2.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected\r
-fvp_mps2.telnetterminal2.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]\r
-fvp_mps2.telnetterminal2.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr\r
-fvp_mps2.telnetterminal2.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)\r
-fvp_mps2.PSRAM_M7.size=0x100000000                    # (int   , init-time) default = '0x100000000' : Memory Size\r
-fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF                    # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF                    # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.UART0.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)\r
-fvp_mps2.UART0.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART\r
-fvp_mps2.UART0.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output\r
-fvp_mps2.UART0.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence\r
-fvp_mps2.UART0.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)\r
-fvp_mps2.UART0.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted\r
-fvp_mps2.cmsdk_watchdog.simhalt=0                     # (bool  , run-time ) default = '0'      : Halt on reset.\r
-fvp_mps2.sse200.s32k_watchdog.simhalt=0               # (bool  , run-time ) default = '0'      : Halt on reset.\r
-fvp_mps2.sse200.secure_watchdog.simhalt=0             # (bool  , run-time ) default = '0'      : Halt on reset.\r
-fvp_mps2.sse200.nonsecure_watchdog.simhalt=0          # (bool  , run-time ) default = '0'      : Halt on reset.\r
-fvp_mps2.PSRAM.size=0x100000000                       # (int   , init-time) default = '0x100000000' : Memory Size\r
-fvp_mps2.PSRAM.fill1=0xDFDFDFCF                       # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.PSRAM.fill2=0xCFDFDFDF                       # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.ssram2.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size\r
-fvp_mps2.ssram2.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.ssram2.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.ssram1.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size\r
-fvp_mps2.ssram1.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.ssram1.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.sse200.iotss_internal_sram0.size=0x100000000  # (int   , init-time) default = '0x100000000' : Memory Size\r
-fvp_mps2.sse200.iotss_internal_sram0.fill1=0xDFDFDFCF  # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.sse200.iotss_internal_sram0.fill2=0xCFDFDFDF  # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.sse200.iotss_internal_sram1.size=0x100000000  # (int   , init-time) default = '0x100000000' : Memory Size\r
-fvp_mps2.sse200.iotss_internal_sram1.fill1=0xDFDFDFCF  # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.sse200.iotss_internal_sram1.fill2=0xCFDFDFDF  # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.sse200.iotss_internal_sram2.size=0x100000000  # (int   , init-time) default = '0x100000000' : Memory Size\r
-fvp_mps2.sse200.iotss_internal_sram2.fill1=0xDFDFDFCF  # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.sse200.iotss_internal_sram2.fill2=0xCFDFDFDF  # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.sse200.iotss_internal_sram3.size=0x100000000  # (int   , init-time) default = '0x100000000' : Memory Size\r
-fvp_mps2.sse200.iotss_internal_sram3.fill1=0xDFDFDFCF  # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.sse200.iotss_internal_sram3.fill2=0xCFDFDFDF  # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern\r
-fvp_mps2.sse200.sys_ppu.use_active_signal=0           # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.sys_ppu.revision="r0p0"               # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.cpu0core_ppu.revision="r0p0"          # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.cpu0dbg_ppu.revision="r0p0"           # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.cpu1core_ppu.use_active_signal=0      # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.cpu1core_ppu.revision="r0p0"          # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.cpu1dbg_ppu.use_active_signal=0       # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.cpu1dbg_ppu.revision="r0p0"           # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.crypto_ppu.use_active_signal=0        # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.crypto_ppu.revision="r0p0"            # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.cordio_ppu.use_active_signal=0        # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.cordio_ppu.revision="r0p0"            # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.dbg_ppu.use_active_signal=0           # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.dbg_ppu.revision="r0p0"               # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.ram0_ppu.use_active_signal=0          # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.ram0_ppu.revision="r0p0"              # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.ram1_ppu.use_active_signal=0          # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.ram1_ppu.revision="r0p0"              # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.ram2_ppu.use_active_signal=0          # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.ram2_ppu.revision="r0p0"              # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.sse200.ram3_ppu.use_active_signal=0          # (bool  , init-time) default = '0'      : Use device-active signal\r
-fvp_mps2.sse200.ram3_ppu.revision="r0p0"              # (string, init-time) default = 'r0p0'   : Revision\r
-fvp_mps2.smsc_91c111.enabled=0                        # (bool  , init-time) default = '0'      : Host interface connection enabled\r
-fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2"  # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address\r
-fvp_mps2.smsc_91c111.promiscuous=1                    # (bool  , init-time) default = '1'      : Put host into promiscuous mode\r
-fvp_mps2.hostbridge.interfaceName="ARM0"              # (string, init-time) default = 'ARM0'   : Host Interface\r
-fvp_mps2.hostbridge.userNetworking=0                  # (bool  , init-time) default = '0'      : Enable user-mode networking\r
-fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24"    # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking\r
-fvp_mps2.hostbridge.userNetPorts=""                   # (string, init-time) default = ''       : Listening ports to expose in user-mode networking\r
-fvp_mps2.mps2_secure_control_register_block.FLASH_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : Flash Block size configuration : [0x0..0x31]\r
-fvp_mps2.mps2_secure_control_register_block.SRAM_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : SRAM Block size configuration : [0x0..0x31]\r
-fvp_mps2.mps2_secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : Flash Watermark supported\r
-fvp_mps2.mps2_secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : SRAM Watermark supported\r
-fvp_mps2.exclusive_monitor_psram.enable_component=1   # (bool  , init-time) default = '1'      : Enable component\r
-fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]\r
-fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]\r
-fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master\r
-fvp_mps2.exclusive_monitor_psram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit\r
-fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]\r
-fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores\r
-fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1  # (bool  , init-time) default = '1'      : Enable component\r
-fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]\r
-fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]\r
-fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master\r
-fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit\r
-fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]\r
-fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores\r
-fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1  # (bool  , init-time) default = '1'      : Enable component\r
-fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]\r
-fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]\r
-fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master\r
-fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit\r
-fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]\r
-fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores\r
-fvp_mps2.sse200.exclusive_monitor_iotss_internal_sram.enable_component=1  # (bool  , init-time) default = '1'      : Enable component\r
-fvp_mps2.sse200.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]\r
-fvp_mps2.sse200.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]\r
-fvp_mps2.sse200.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master\r
-fvp_mps2.sse200.exclusive_monitor_iotss_internal_sram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit\r
-fvp_mps2.sse200.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]\r
-fvp_mps2.sse200.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores\r
-fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S\r
-fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S\r
-fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S\r
-fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S\r
-fvp_mps2.dma0.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes\r
-fvp_mps2.dma0.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer\r
-fvp_mps2.dma0.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response\r
-fvp_mps2.dma0.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay\r
-fvp_mps2.dma1.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes\r
-fvp_mps2.dma1.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer\r
-fvp_mps2.dma1.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response\r
-fvp_mps2.dma1.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay\r
-fvp_mps2.dma2.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes\r
-fvp_mps2.dma2.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer\r
-fvp_mps2.dma2.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response\r
-fvp_mps2.dma2.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay\r
-fvp_mps2.dma3.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes\r
-fvp_mps2.dma3.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer\r
-fvp_mps2.dma3.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response\r
-fvp_mps2.dma3.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay\r
-fvp_mps2.iotss_systemcontrol.cpu0wait=0               # (bool  , init-time) default = '0'      : Whether to hold cpu1 in reset at boot\r
-fvp_mps2.iotss_systemcontrol.cpu1wait=1               # (bool  , init-time) default = '1'      : Whether to hold cpu1 in reset at boot\r
-fvp_mps2.sse200.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF  # (int   , init-time) default = '0xFFFFFFFF' :  : [0x0..0xFFFFFFFF]\r
-#----------------------------------------------------------------------------------------------\r

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/FreeRTOSDemo_ns.uvoptx b/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/FreeRTOSDemo_ns.uvoptx
index 79797eb5d2cec129f221b046adadf49d8120e8c4..189102f9917e299ac961785ef621336d3bb9a2b3 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/FreeRTOSDemo_ns.uvoptx
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/FreeRTOSDemo_ns.uvoptx
@@ -101,6 +101,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -133,7 +135,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_FP_TZ_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF".\FVP\MPS2_Cortex-M\ARMCM33_DSP_FP_TZ_config.txt" -MA</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/FreeRTOSDemo_ns.uvprojx b/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/FreeRTOSDemo_ns.uvprojx
index f7186cb0fd7ee24b88cde9f23b3f78fd9cd8efa4..5c98a40b933855fe46c2427228348520896dc221 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/FreeRTOSDemo_ns.uvprojx
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/FreeRTOSDemo_ns.uvprojx
@@ -16,7 +16,7 @@
         <TargetCommonOption>
           <Device>ARMCM33_DSP_FP_TZ</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.4.0</PackID>
+          <PackID>ARM.CMSIS.5.5.1</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -184,6 +184,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>16</StupSel>
@@ -324,6 +325,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>3</v6Lang>
             <v6LangP>1</v6LangP>
@@ -539,7 +541,7 @@
       <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\partition_ARMCM33.h</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -547,7 +549,7 @@
       <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -555,7 +557,7 @@
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\system_ARMCM33.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\system_ARMCM33.c</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/FreeRTOSDemo_s.uvoptx b/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/FreeRTOSDemo_s.uvoptx
index a486d0edf1f17ed038fd737a177e186df3e31074..5d15b9138586a6346c541002c93ab5337e6a7b26 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/FreeRTOSDemo_s.uvoptx
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/FreeRTOSDemo_s.uvoptx
@@ -101,6 +101,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -133,7 +135,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_FP_TZ_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF".\FVP\MPS2_Cortex-M\ARMCM33_DSP_FP_TZ_config.txt" -MA</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/FreeRTOSDemo_s.uvprojx b/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/FreeRTOSDemo_s.uvprojx
index 30f64cbf9fc6c93bafe9a474c0263be20caf72c4..0ad1de3d39ad7be51614cd52b2d4f913be25d4e4 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/FreeRTOSDemo_s.uvprojx
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/FreeRTOSDemo_s.uvprojx
@@ -16,7 +16,7 @@
         <TargetCommonOption>
           <Device>ARMCM33_DSP_FP_TZ</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.4.0</PackID>
+          <PackID>ARM.CMSIS.5.5.1</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -133,7 +133,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4098</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -184,6 +184,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -324,6 +325,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>3</v6Lang>
             <v6LangP>1</v6LangP>
@@ -487,7 +489,7 @@
       <file attr="config" category="header" condition="ARMv8-M TZ Device" name="Device\ARM\ARMCM33\Include\Template\partition_ARMCM33.h" version="1.1.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\partition_ARMCM33.h</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -495,7 +497,7 @@
       <file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM33\Source\ARM\startup_ARMCM33.s" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\startup_ARMCM33.s</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>
@@ -503,7 +505,7 @@
       <file attr="config" category="sourceC" name="Device\ARM\ARMCM33\Source\system_ARMCM33.c" version="1.0.0">
         <instance index="0">RTE\Device\ARMCM33_DSP_FP_TZ\system_ARMCM33.c</instance>
         <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.1.0" condition="ARMCM33 CMSIS"/>
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/>
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
         <targetInfos>
           <targetInfo name="FVP Simulation Model"/>
         </targetInfos>