]> git.sur5r.net Git - openocd/commitdiff
cfi: check supported arch
authorSpencer Oliver <spen@spen-soft.co.uk>
Thu, 3 May 2012 15:30:31 +0000 (16:30 +0100)
committerSpencer Oliver <spen@spen-soft.co.uk>
Mon, 14 May 2012 09:29:16 +0000 (09:29 +0000)
check that the cfi driver supports the current target arch.

Change-Id: I8a95908684de67bf1657d1956f2573662a641cc1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/614
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
src/flash/nor/cfi.c

index 398dd61a1b6e49139b9419e925d9308df9862e99..80d04554c2f75af9b38f75ba6942fd883d52eeba 100644 (file)
@@ -1219,19 +1219,19 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer,
        uint32_t target_code_size;
        int retval = ERROR_OK;
 
-       /*  todo:  if ( (!is_armv7m(target_to_armv7m(target)) && (!is_arm(target_to_arm(target)) )
-        **/
-       if (strncmp(target_type_name(target), "mips_m4k", 8) == 0) {
-               LOG_ERROR("Your target has no flash block write support yet.");
-               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+       /* check we have a supported arch */
+       if (is_arm(target_to_arm(target))) {
+               /* All other ARM CPUs have 32 bit instructions */
+               arm_algo.common_magic = ARM_COMMON_MAGIC;
+               arm_algo.core_mode = ARM_MODE_SVC;
+               arm_algo.core_state = ARM_STATE_ARM;
+       } else {
+               LOG_ERROR("Unknown architecture");
+               return ERROR_FAIL;
        }
 
        cfi_intel_clear_status_register(bank);
 
-       arm_algo.common_magic = ARM_COMMON_MAGIC;
-       arm_algo.core_mode = ARM_MODE_SVC;
-       arm_algo.core_state = ARM_STATE_ARM;
-
        /* If we are setting up the write_algorith, we need target_code_src
         * if not we only need target_code_size. */