]> git.sur5r.net Git - cc65/commitdiff
make sure clocktick starts at zero
authormrdudz <mrdudz@users.noreply.github.com>
Thu, 16 Jul 2015 14:54:40 +0000 (16:54 +0200)
committermrdudz <mrdudz@users.noreply.github.com>
Thu, 16 Jul 2015 14:54:40 +0000 (16:54 +0200)
libsrc/pce/clock.s
libsrc/pce/crt0.s

index 6f939f07806e0da536445897e0e922a38e1d433e..5d0aa78f4107532e9a00970701e9725c07231159 100644 (file)
@@ -2,20 +2,30 @@
 ; clock_t clock (void);
 ;
 
-        .include "pce.inc"
+                .include "pce.inc"
 
-        .export         _clock
-        .importzp       sreg
-;;        .importzp       tickcount
+                .export         _clock
+                .importzp       sreg
+;;                .importzp       tickcount
 
 .proc   _clock
 
-        lda tickcount+3
-        sta sreg+1
-        lda tickcount+2
-        sta sreg
-        ldx tickcount+1
-        lda tickcount
-        rts
+                lda     tickcount+3
+                sta     sreg+1
+                lda     tickcount+2
+                sta     sreg
+                ldx     tickcount+1
+                lda     tickcount
+                rts
 
 .endproc
+
+                .constructor initclock, 24
+
+initclock:
+                lda     #0
+                ldx     #3
+@lp:            sta     tickcount,x
+                dex
+                bpl     @lp
+                rts
\ No newline at end of file
index e456bdeacda7feff13c436ffbd44f2a44243f1fb..2b8455a5997a4e6dc9222db6605407b1008adc87 100644 (file)
@@ -88,8 +88,6 @@ start:
                 lda     #$05
                 sta     IRQ_MASK           ; IRQ1=on
 
-                cli
-
                 ; Clear the BSS data
                 jsr     zerobss
 
@@ -141,6 +139,8 @@ start:
                 ; Call module constructors
                 jsr     initlib
 
+                cli     ; allow IRQ only after constructors have run
+
                 ; Pass an empty command line
                 jsr     push0                ; argc
                 jsr     push0                ; argv