]> git.sur5r.net Git - freertos/commitdiff
Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer -...
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 30 Dec 2019 22:00:26 +0000 (22:00 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 30 Dec 2019 22:00:26 +0000 (22:00 +0000)
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2782 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/CMSISv2p00_LPC11xx/.cproject

index ca319f36676a13d377f056a45e3fe113df422018..0a1680e0e2d49f21f112834108f8f23d65bc3b88 100644 (file)
@@ -1,7 +1,5 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
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-\r
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@@ -11,7 +9,7 @@
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-                               </scannerConfigBuildInfo>\r
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-                       </storageModule>\r
                </cconfiguration>\r
        </storageModule>\r
        <storageModule moduleId="cdtBuildSystem" version="4.0.0">\r
        <storageModule moduleId="com.crt.config">\r
                <projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;\r
 &lt;TargetConfig&gt;&#13;\r
-&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1111/101" property_count="5" version="1"/&gt;&#13;\r
+&lt;Properties property_2="LPC11_12_13_8K_2K.cfx" property_3="NXP" property_4="LPC1111/101" property_count="5" version="100300"/&gt;&#13;\r
 &lt;infoList vendor="NXP"&gt;&#13;\r
-&lt;info chip="LPC1111/101" match_id="0x041e502b" name="LPC1111/101" stub="crt_emu_lpc11_13_nxp"&gt;&#13;\r
+&lt;info chip="LPC1111/101" flash_driver="LPC11_12_13_8K_2K.cfx" match_id="0x041e502b,0x2516D02B" name="LPC1111/101" stub="crt_emu_lpc11_13_nxp"&gt;&#13;\r
 &lt;chip&gt;&#13;\r
 &lt;name&gt;LPC1111/101&lt;/name&gt;&#13;\r
 &lt;family&gt;LPC11xx&lt;/family&gt;&#13;\r
 &lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;\r
 &lt;memory id="RAM" type="RAM"/&gt;&#13;\r
 &lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;\r
-&lt;memoryInstance derived_from="Flash" id="MFlash8" location="0" size="0x2000"/&gt;&#13;\r
+&lt;memoryInstance derived_from="Flash" id="MFlash8" location="0x0" size="0x2000"/&gt;&#13;\r
 &lt;memoryInstance derived_from="RAM" id="RamLoc2" location="0x10000000" size="0x800"/&gt;&#13;\r
-&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x400" progwithcode="TRUE" size="0x2000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_SYSCTL" determined="infoFile" id="SYSCTL" location="0x40048000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_13_PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="CM0_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO0" location="0x50000000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO1" location="0x50010000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO2" location="0x50020000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO3" location="0x50030000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC1xxx_UART_MODEM" determined="infoFile" id="UART0" location="0x40008000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_13_I2C" determined="infoFile" id="I2C0" location="0x40000000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_13_SSP" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR160" location="0x4000c000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR161" location="0x40010000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER0" location="0x40014000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER1" location="0x40018000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_13_WDT" determined="infoFile" id="WDT" location="0x40004000"/&gt;&#13;\r
-&lt;peripheralInstance derived_from="LPC11_13_ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;\r
 &lt;/chip&gt;&#13;\r
 &lt;processor&gt;&#13;\r
 &lt;name gcc_name="cortex-m0"&gt;Cortex-M0&lt;/name&gt;&#13;\r
 &lt;family&gt;Cortex-M&lt;/family&gt;&#13;\r
 &lt;/processor&gt;&#13;\r
-&lt;link href="nxp_lpc11_13_peripheral.xme" show="embed" type="simple"/&gt;&#13;\r
 &lt;/info&gt;&#13;\r
 &lt;/infoList&gt;&#13;\r
 &lt;/TargetConfig&gt;</projectStorage>\r
        </storageModule>\r
+       <storageModule moduleId="refreshScope"/>\r
+       <storageModule moduleId="scannerConfiguration">\r
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+                       </buildOutputProvider>\r
+                       <scannerInfoProvider id="makefileGenerator">\r
+                               <runAction arguments="-f ${project_name}_scd.mk" command="make" useDefault="true"/>\r
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+                               <parser enabled="true"/>\r
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