--- /dev/null
+/*\r
+ FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ See http://www.FreeRTOS.org for documentation, latest information, license \r
+ and contact details. Please ensure to read the configuration and relevant \r
+ port sections of the online documentation.\r
+\r
+ Also see http://www.SafeRTOS.com a version that has been certified for use\r
+ in safety critical systems, plus commercial licensing, development and\r
+ support options.\r
+ ***************************************************************************\r
+*/\r
+\r
+#include "FreeRTOSConfig.h"\r
+\r
+#define portCONTEXT_SIZE 136\r
+#define portEXL_AND_IE_BITS 0x03\r
+\r
+#define portEPC_STACK_LOCATION 124\r
+#define portSTATUS_STACK_LOCATION 128\r
+#define portCAUSE_STACK_LOCATION 132\r
+\r
+/******************************************************************/ \r
+.macro portSAVE_CONTEXT\r
+\r
+ /* Make room for the context. */ \r
+ addiu sp, sp, -portCONTEXT_SIZE\r
+\r
+ /* Get interrupts above the kernel priority enabled again ASAP. First\r
+ save the current status so we can manipulate it, and the cause and EPC\r
+ registers so we capture their original values in case of interrupt nesting. */\r
+\r
+ mfc0 k0, _CP0_CAUSE\r
+ sw k0, portCAUSE_STACK_LOCATION(sp)\r
+ mfc0 k1, _CP0_STATUS\r
+ sw k1, portSTATUS_STACK_LOCATION(sp)\r
+\r
+ /* Also save s6 so we can use it during this interrupt. Any\r
+ nesting interrupts should maintain the values of this register\r
+ accross the ISR. */\r
+ sw s6, 44(sp)\r
+\r
+ /* s6 holds the EPC value, we may want this during the context switch. */\r
+ mfc0 s6, _CP0_EPC\r
+\r
+ /* Enable interrupts above the kernel priority. */\r
+ addiu k0, zero, configKERNEL_INTERRUPT_PRIORITY\r
+ ins k1, k0, 10, 6\r
+ ins k1, zero, 1, 4\r
+ mtc0 k1, _CP0_STATUS\r
+\r
+ /* Save the context into the space just created. s6 is saved again\r
+ here as it now contains the EPC value. */\r
+ sw ra, 120(sp)\r
+ sw s8, 116(sp)\r
+ sw t9, 112(sp)\r
+ sw t8, 108(sp)\r
+ sw t7, 104(sp)\r
+ sw t6, 100(sp)\r
+ sw t5, 96(sp)\r
+ sw t4, 92(sp)\r
+ sw t3, 88(sp)\r
+ sw t2, 84(sp)\r
+ sw t1, 80(sp)\r
+ sw t0, 76(sp)\r
+ sw a3, 72(sp)\r
+ sw a2, 68(sp)\r
+ sw a1, 64(sp)\r
+ sw a0, 60(sp)\r
+ sw v1, 56(sp)\r
+ sw v0, 52(sp)\r
+ sw s7, 48(sp)\r
+ sw s6, portEPC_STACK_LOCATION(sp)\r
+ sw s5, 40(sp)\r
+ sw s4, 36(sp)\r
+ sw s3, 32(sp)\r
+ sw s2, 28(sp)\r
+ sw s1, 24(sp)\r
+ sw s0, 20(sp)\r
+ sw $1, 16(sp)\r
+\r
+ /* s7 is used as a scratch register. */\r
+ mfhi s7\r
+ sw s7, 12(sp)\r
+ mflo s7\r
+ sw s7, 8(sp)\r
+\r
+ /* Each task maintains its own nesting count. */\r
+ la s7, uxCriticalNesting\r
+ lw s7, (s7)\r
+ sw s7, 4(sp)\r
+ \r
+ /* Update the TCB stack pointer value */\r
+ la s7, pxCurrentTCB\r
+ lw s7, (s7)\r
+ sw sp, (s7)\r
+\r
+ /* Switch to the ISR stack, saving the current stack in s5. This might\r
+ be used to determine the cause of a general exception. */\r
+ add s5, zero, sp\r
+ la s7, xISRStackTop\r
+ lw sp, (s7)\r
+\r
+ .endm\r
+ \r
+/******************************************************************/ \r
+.macro portRESTORE_CONTEXT\r
+\r
+ /* Restore the stack pointer from the TCB */\r
+ la s0, pxCurrentTCB\r
+ lw s1, (s0)\r
+ lw sp, (s1)\r
+ \r
+ /* Restore the context, the first item of which is the critical nesting\r
+ depth. */\r
+ la s0, uxCriticalNesting\r
+ lw s1, 4(sp)\r
+ sw s1, (s0)\r
+\r
+ /* Restore the rest of the context. */\r
+ lw s0, 8(sp)\r
+ mtlo s0\r
+ lw s0, 12(sp)\r
+ mthi s0\r
+ lw $1, 16(sp)\r
+ lw s0, 20(sp)\r
+ lw s1, 24(sp)\r
+ lw s2, 28(sp)\r
+ lw s3, 32(sp)\r
+ lw s4, 36(sp)\r
+ lw s5, 40(sp)\r
+ lw s6, 44(sp)\r
+ lw s7, 48(sp)\r
+ lw v0, 52(sp)\r
+ lw v1, 56(sp)\r
+ lw a0, 60(sp)\r
+ lw a1, 64(sp)\r
+ lw a2, 68(sp)\r
+ lw a3, 72(sp)\r
+ lw t0, 76(sp)\r
+ lw t1, 80(sp)\r
+ lw t2, 84(sp)\r
+ lw t3, 88(sp)\r
+ lw t4, 92(sp)\r
+ lw t5, 96(sp)\r
+ lw t6, 100(sp)\r
+ lw t7, 104(sp)\r
+ lw t8, 108(sp)\r
+ lw t9, 112(sp)\r
+ lw s8, 116(sp)\r
+ lw ra, 120(sp)\r
+\r
+ /* Protect access to the k registers. */\r
+ di\r
+ lw k1, portSTATUS_STACK_LOCATION(sp)\r
+ lw k0, portEPC_STACK_LOCATION(sp)\r
+\r
+ /* Leave the stack how we found it. */\r
+ addiu sp, sp, portCONTEXT_SIZE\r
+\r
+ mtc0 k1, _CP0_STATUS\r
+ ehb\r
+ mtc0 k0, _CP0_EPC\r
+ eret \r
+ nop\r
+\r
+ .endm\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ See http://www.FreeRTOS.org for documentation, latest information, license \r
+ and contact details. Please ensure to read the configuration and relevant \r
+ port sections of the online documentation.\r
+\r
+ Also see http://www.SafeRTOS.com a version that has been certified for use\r
+ in safety critical systems, plus commercial licensing, development and\r
+ support options.\r
+ ***************************************************************************\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Implementation of functions defined in portable.h for the PIC32MX port.\r
+ *----------------------------------------------------------*/\r
+\r
+/* Scheduler include files. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Hardware specifics. */\r
+#define portTIMER_PRESCALE 8\r
+\r
+/* Bits within various registers. */\r
+#define portIE_BIT ( 0x00000001 )\r
+#define portEXL_BIT ( 0x00000002 )\r
+#define portIPL_SHIFT ( 10 )\r
+#define portALL_IPL_BITS ( 0x1f << portIPL_SHIFT )\r
+
+/* The EXL bit is set to ensure interrupts do not occur while the context of\r
+the first task is being restored. */\r
+#define portINITIAL_SR ( portIE_BIT | portEXL_BIT )
+\r
+/* Records the nesting depth of calls to portENTER_CRITICAL(). */\r
+unsigned portBASE_TYPE uxCriticalNesting = 0x55555555;\r
+\r
+/* The stack used by interrupt service routines that cause a context switch. */\r
+portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
+\r
+/* The top of stack value ensures there is enough space to store 6 registers on \r
+the callers stack, as some functions seem to want to do this. */\r
+const portBASE_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
+\r
+/* Place the prototype here to ensure the interrupt vector is correctly installed. */\r
+extern void __attribute__( (interrupt(ipl1), vector(_TIMER_1_VECTOR))) vT1InterruptHandler( void );\r
+\r
+/* \r
+ * General exception handler that will be called for all general exceptions\r
+ * other than SYS. This should be overridden by a user provided handler.\r
+ */\r
+void vApplicationGeneralExceptionHandler( unsigned portLONG ulCause, unsigned portLONG ulStatus ) __attribute__((weak));\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* \r
+ * See header file for description. \r
+ */\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+ *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR; /* CP0_STATUS */\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (portSTACK_TYPE) NULL; /* ra */\r
+ pxTopOfStack -= 15;\r
+\r
+ *pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in */\r
+ pxTopOfStack -= 14;\r
+\r
+ *pxTopOfStack = (portSTACK_TYPE) 0x00000000; /* critical nesting level */\r
+ pxTopOfStack--;\r
+ \r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Setup a timer for a regular tick.\r
+ */\r
+void prvSetupTimerInterrupt( void )\r
+{\r
+const unsigned portLONG ulCompareMatch = (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ;\r
+\r
+ OpenTimer1( ( T1_ON | T1_PS_1_8 | T1_SOURCE_INT ), ulCompareMatch );\r
+ ConfigIntTimer1( T1_INT_ON | configKERNEL_INTERRUPT_PRIORITY );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler(void)\r
+{\r
+ /* It is unlikely that the scheduler for the PIC port will get stopped\r
+ once running. If required disable the tick interrupt here, then return \r
+ to xPortStartScheduler(). */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEnterCritical(void)\r
+{\r
+unsigned portLONG ulStatus;\r
+\r
+ /* Mask interrupts at and below the kernel interrupt priority. */\r
+ ulStatus = _CP0_GET_STATUS();\r
+ ulStatus |= ( configKERNEL_INTERRUPT_PRIORITY << portIPL_SHIFT );\r
+ _CP0_SET_STATUS( ulStatus );\r
+\r
+ /* Once interrupts are disabled we can access the nesting count directly. */\r
+ uxCriticalNesting++;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortExitCritical(void)\r
+{\r
+unsigned portLONG ulStatus;\r
+\r
+ /* If we are in a critical section then we can access the nesting count\r
+ directly. */\r
+ uxCriticalNesting--;\r
+\r
+ /* Has the nesting unwound? */\r
+ if( uxCriticalNesting == 0 ) \r
+ {\r
+ /* Unmask all interrupts. */\r
+ ulStatus = _CP0_GET_STATUS();\r
+ ulStatus &= ~portALL_IPL_BITS;\r
+ _CP0_SET_STATUS( ulStatus );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+extern void vPortStartFirstTask( void );\r
+\r
+ /* Setup the timer to generate the tick. Interrupts will have been \r
+ disabled by the time we get here. */\r
+ prvSetupTimerInterrupt();\r
+\r
+ /* Kick off the highest priority task that has been created so far. */\r
+ vPortStartFirstTask();\r
+\r
+ /* Should never get here as the tasks will now be executing. */\r
+ return pdFALSE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationGeneralExceptionHandler( unsigned portLONG ulCause, unsigned portLONG ulStatus )\r
+{\r
+ /* This function is declared weak and should be overridden by the users\r
+ application. */\r
+ while( 1 );\r
+}\r
+\r
+\r
+\r
+\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ See http://www.FreeRTOS.org for documentation, latest information, license \r
+ and contact details. Please ensure to read the configuration and relevant \r
+ port sections of the online documentation.\r
+\r
+ Also see http://www.SafeRTOS.com a version that has been certified for use\r
+ in safety critical systems, plus commercial licensing, development and\r
+ support options.\r
+ ***************************************************************************\r
+*/\r
+ \r
+#include <p32xxxx.h>\r
+#include <sys/asm.h>\r
+#include "ISR_Support.h"\r
+ \r
+#define portEXC_CODE_MASK ( 0x1f << 2 )\r
+\r
+ .set nomips16\r
+ .set noreorder\r
+ \r
+ .extern pxCurrentTCB\r
+ .extern uxCriticalNesting\r
+ .extern vTaskSwitchContext\r
+ .extern vTaskIncrementTick\r
+ .extern vApplicationGeneralExceptionHandler\r
+ .extern xISRStackTop\r
+ \r
+ .global vPortStartFirstTask\r
+ .global _general_exception_context\r
+ .global vT1InterruptHandler\r
+\r
+\r
+/******************************************************************/\r
+\r
+ .section .FreeRTOS, "ax", @progbits\r
+ .set noreorder\r
+ .set noat\r
+ .ent vT1InterruptHandler\r
+ \r
+vT1InterruptHandler:\r
+\r
+ portSAVE_CONTEXT\r
+\r
+ jal vTaskIncrementTick\r
+ nop\r
+\r
+ /* If we are using the preemptive scheduler then we might want to select\r
+ a different task to execute. */\r
+ #if configUSE_PREEMPTION == 1\r
+ jal vTaskSwitchContext\r
+ nop\r
+ #endif /* configUSE_PREEMPTION */\r
+\r
+ /* Clear timer 0 interrupt. */\r
+ la s1, IFS0CLR
+ addiu s0,zero,_IFS0_T1IF_MASK
+ sw s0, 0(s1)\r
+\r
+ portRESTORE_CONTEXT\r
+\r
+ .end vT1InterruptHandler\r
+\r
+/******************************************************************/\r
+\r
+ .section .FreeRTOS, "ax", @progbits\r
+ .set noreorder\r
+ .set noat\r
+ .ent xPortStartScheduler\r
+\r
+vPortStartFirstTask:\r
+\r
+ /* Simply restore the context of the highest priority task that has been\r
+ created so far. */\r
+ portRESTORE_CONTEXT\r
+\r
+ .end xPortStartScheduler\r
+\r
+/*******************************************************************/\r
+\r
+ .section .FreeRTOS, "ax", @progbits\r
+ .set noreorder\r
+ .set noat\r
+ .ent _general_exception_context\r
+\r
+_general_exception_context:\r
+\r
+ /* Save the context of the current task. */\r
+ portSAVE_CONTEXT\r
+\r
+ /* Was this handler caused by a syscall? The original Cause\r
+ value was saved to the stack as it could change as interrupts\r
+ nest. Use of k registers must be protected from use by nesting\r
+ interrupts. */\r
+ lw s7, portCAUSE_STACK_LOCATION(s5)\r
+ andi s7, s7, portEXC_CODE_MASK\r
+ addi s7, s7, -( _EXCCODE_SYS << 2 )\r
+\r
+ /* Yes - call the SYSCALL handler to select a new task to execute. */\r
+ beq s7, zero, SyscallHandler\r
+ nop\r
+\r
+ /* No - call the application handler to handle all other types of \r
+ exception. Pass the status and cause to the application provided \r
+ handler. Interrupts are disabled during the execution of the user\r
+ defined handler. */\r
+ di\r
+ lw a1, portSTATUS_STACK_LOCATION(s5)\r
+ lw a0, portCAUSE_STACK_LOCATION(s5)\r
+ jal vApplicationGeneralExceptionHandler
+ nop\r
+ ei\r
+ beq zero, zero, FinishExceptionHandler\r
+ nop\r
+\r
+SyscallHandler:\r
+\r
+ /* Adjust the return that was placed onto the stack to be the \r
+ address of the instruction following the syscall. s6 already\r
+ contains the EPC value. */\r
+ addi s6, 4\r
+ sw s6, portEPC_STACK_LOCATION(s5)\r
+\r
+ jal vTaskSwitchContext\r
+ nop\r
+\r
+FinishExceptionHandler:\r
+ portRESTORE_CONTEXT\r
+\r
+ .end _general_exception_context\r
+\r
+\r
+
--- /dev/null
+/*\r
+ FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ See http://www.FreeRTOS.org for documentation, latest information, license \r
+ and contact details. Please ensure to read the configuration and relevant \r
+ port sections of the online documentation.\r
+\r
+ Also see http://www.SafeRTOS.com a version that has been certified for use\r
+ in safety critical systems, plus commercial licensing, development and\r
+ support options.\r
+ ***************************************************************************\r
+*/\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+/* System include files */\r
+#include <plib.h>\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions. \r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned long\r
+#define portBASE_TYPE long\r
+\r
+#if( configUSE_16_BIT_TICKS == 1 )\r
+ typedef unsigned portSHORT portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned portLONG portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Hardware specifics. */\r
+#define portBYTE_ALIGNMENT 4\r
+#define portSTACK_GROWTH -4\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+/*-----------------------------------------------------------*/\r
+\r
+/* Critical section management. */\r
+#define portDISABLE_INTERRUPTS() INTDisableInterrupts() \r
+#define portENABLE_INTERRUPTS() INTEnableInterrupts()\r
+\r
+extern void vPortEnterCritical( void );\r
+extern void vPortExitCritical( void );\r
+#define portENTER_CRITICAL() vPortEnterCritical()\r
+#define portEXIT_CRITICAL() vPortExitCritical()\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task utilities. */\r
+#define portYIELD() asm volatile ( "ehb \r\n" \\r
+ "SYSCALL \r\n" )\r
+\r
+#define portNOP() asm volatile ( "nop" )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__((noreturn))\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+/*-----------------------------------------------------------*/\r
+\r
+#define portEND_SWITCHING_ISR( vSwitchRequired ) if( vSwitchRequired ) vTaskSwitchContext()\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
projects / freertos / commitdiff