--- /dev/null
+/*\r
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section\r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and \r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety \r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting, \r
+ licensing and training services.\r
+*/\r
+\r
+ EXTERN pxCurrentTCB\r
+ EXTERN usCriticalNesting\r
+\r
+#include "FreeRTOSConfig.h"\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+; Context save and restore macro definitions\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+\r
+portSAVE_CONTEXT MACRO\r
+\r
+ add -0x0C,sp ; prepare stack to save necessary values\r
+ st.w lp,8[sp] ; store LP to stack\r
+ stsr 0,r31\r
+ st.w lp,4[sp] ; store EIPC to stack\r
+ stsr 1,lp\r
+ st.w lp,0[sp] ; store EIPSW to stack\r
+#if configDATA_MODE == 1 ; Using the Tiny data model\r
+ prepare {r20,r21,r22,r23,r24,r25,r26,r27,r28,r29,r30},76,sp ; save general purpose registers\r
+ sst.w r19,72[ep]\r
+ sst.w r18,68[ep]\r
+ sst.w r17,64[ep]\r
+ sst.w r16,60[ep]\r
+ sst.w r15,56[ep]\r
+ sst.w r14,52[ep]\r
+ sst.w r13,48[ep]\r
+ sst.w r12,44[ep]\r
+ sst.w r11,40[ep]\r
+ sst.w r10,36[ep]\r
+ sst.w r9,32[ep]\r
+ sst.w r8,28[ep]\r
+ sst.w r7,24[ep]\r
+ sst.w r6,20[ep]\r
+ sst.w r5,16[ep]\r
+ sst.w r4,12[ep]\r
+#else ; Using the Small/Large data model\r
+ prepare {r20,r21,r22,r23,r24,r26,r27,r28,r29,r30},72,sp ; save general purpose registers\r
+ sst.w r19,68[ep]\r
+ sst.w r18,64[ep]\r
+ sst.w r17,60[ep]\r
+ sst.w r16,56[ep]\r
+ sst.w r15,52[ep]\r
+ sst.w r14,48[ep]\r
+ sst.w r13,44[ep]\r
+ sst.w r12,40[ep]\r
+ sst.w r11,36[ep]\r
+ sst.w r10,32[ep]\r
+ sst.w r9,28[ep]\r
+ sst.w r8,24[ep]\r
+ sst.w r7,20[ep]\r
+ sst.w r6,16[ep]\r
+ sst.w r5,12[ep]\r
+#endif /* configDATA_MODE */\r
+ sst.w r2,8[ep]\r
+ sst.w r1,4[ep]\r
+ MOVHI hi1(usCriticalNesting),r0,r1 ; save usCriticalNesting value to stack\r
+ ld.w lw1(usCriticalNesting)[r1],r2\r
+ sst.w r2,0[ep]\r
+ MOVHI hi1(pxCurrentTCB),r0,r1 ; save SP to top of current TCB\r
+ ld.w lw1(pxCurrentTCB)[r1],r2\r
+ st.w sp,0[r2]\r
+ ENDM\r
+\r
+\r
+portRESTORE_CONTEXT MACRO\r
+\r
+ MOVHI hi1(pxCurrentTCB),r0,r1 ; get Stackpointer address\r
+ ld.w lw1(pxCurrentTCB)[r1],sp\r
+ MOV sp,r1\r
+ ld.w 0[r1],sp ; load stackpointer\r
+ MOV sp,ep ; set stack pointer to element pointer\r
+ sld.w 0[ep],r1 ; load usCriticalNesting value from stack\r
+ MOVHI hi1(usCriticalNesting),r0,r2\r
+ st.w r1,lw1(usCriticalNesting)[r2]\r
+ sld.w 4[ep],r1 ; restore general purpose registers\r
+ sld.w 8[ep],r2\r
+#if configDATA_MODE == 1 ; Using Tiny data model\r
+ sld.w 12[ep],r4\r
+ sld.w 16[ep],r5\r
+ sld.w 20[ep],r6\r
+ sld.w 24[ep],r7\r
+ sld.w 28[ep],r8\r
+ sld.w 32[ep],r9\r
+ sld.w 36[ep],r10\r
+ sld.w 40[ep],r11\r
+ sld.w 44[ep],r12\r
+ sld.w 48[ep],r13\r
+ sld.w 52[ep],r14\r
+ sld.w 56[ep],r15\r
+ sld.w 60[ep],r16\r
+ sld.w 64[ep],r17\r
+ sld.w 68[ep],r18\r
+ sld.w 72[ep],r19\r
+ dispose 76,{r20,r21,r22,r23,r24,r25,r26,r27,r28,r29,r30}\r
+#else ; Using Small/Large data model\r
+ sld.w 12[ep],r5\r
+ sld.w 16[ep],r6\r
+ sld.w 20[ep],r7\r
+ sld.w 24[ep],r8\r
+ sld.w 28[ep],r9\r
+ sld.w 32[ep],r10\r
+ sld.w 36[ep],r11\r
+ sld.w 40[ep],r12\r
+ sld.w 44[ep],r13\r
+ sld.w 48[ep],r14\r
+ sld.w 52[ep],r15\r
+ sld.w 56[ep],r16\r
+ sld.w 60[ep],r17\r
+ sld.w 64[ep],r18\r
+ sld.w 68[ep],r19\r
+ dispose 72,{r20,r21,r22,r23,r24,r26,r27,r28,r29,r30}\r
+#endif /* configDATA_MODE */\r
+ ld.w 0[sp],lp ; restore EIPSW from stack\r
+ ldsr lp,1\r
+ ld.w 4[sp],lp ; restore EIPC from stack\r
+ ldsr lp,0\r
+ ld.w 8[sp],lp ; restore LP from stack\r
+ add 0x0C,sp ; set SP to right position\r
+\r
+ RETI\r
+\r
+ ENDM\r
--- /dev/null
+/*\r
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section\r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and \r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety \r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting, \r
+ licensing and training services.\r
+*/\r
+\r
+/* Standard includes. */\r
+#include <stdlib.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Critical nesting should be initialised to a non zero value so interrupts don't\r
+accidentally get enabled before the scheduler is started. */\r
+#define portINITIAL_CRITICAL_NESTING (( portSTACK_TYPE ) 10)\r
+\r
+/* The PSW value assigned to tasks when they start to run for the first time. */\r
+#define portPSW (( portSTACK_TYPE ) 0x00000000)\r
+\r
+/* We require the address of the pxCurrentTCB variable, but don't want to know\r
+any details of its type. */\r
+typedef void tskTCB;\r
+extern volatile tskTCB * volatile pxCurrentTCB;\r
+\r
+/* Keeps track of the nesting level of critical sections. */\r
+volatile portSTACK_TYPE usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Sets up the timer to generate the tick interrupt. */\r
+static void prvSetupTimerInterrupt( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* Task function start address */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* Task function start address */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = portPSW; /* Initial PSW value */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x20202020; /* Initial Value of R20 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x21212121; /* Initial Value of R21 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x22222222; /* Initial Value of R22 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x23232323; /* Initial Value of R23 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x24242424; /* Initial Value of R24 */\r
+ pxTopOfStack--;\r
+#if (__DATA_MODEL__ == 0) || (__DATA_MODEL__ == 1)\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x25252525; /* Initial Value of R25 */\r
+ pxTopOfStack--;\r
+#endif /* configDATA_MODE */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x26262626; /* Initial Value of R26 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x27272727; /* Initial Value of R27 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x28282828; /* Initial Value of R28 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x29292929; /* Initial Value of R29 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x30303030; /* Initial Value of R30 */\r
+ pxTopOfStack--; \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x19191919; /* Initial Value of R19 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x18181818; /* Initial Value of R18 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x17171717; /* Initial Value of R17 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x16161616; /* Initial Value of R16 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x15151515; /* Initial Value of R15 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x14141414; /* Initial Value of R14 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x13131313; /* Initial Value of R13 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* Initial Value of R12 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* Initial Value of R11 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* Initial Value of R10 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x99999999; /* Initial Value of R09 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x88888888; /* Initial Value of R08 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x77777777; /* Initial Value of R07 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x66666666; /* Initial Value of R06 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x55555555; /* Initial Value of R05 */\r
+ pxTopOfStack--;\r
+#if __DATA_MODEL__ == 0 || __DATA_MODEL__ == 1\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x44444444; /* Initial Value of R04 */\r
+ pxTopOfStack--;\r
+#endif /* configDATA_MODE */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x22222222; /* Initial Value of R02 */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 is expected to hold the function parameter*/\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+\r
+ /*\r
+ * Return a pointer to the top of the stack we have generated so this can\r
+ * be stored in the task control block for the task.\r
+ */\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+ /* Setup the hardware to generate the tick. Interrupts are disabled when\r
+ this function is called. */\r
+ prvSetupTimerInterrupt();\r
+\r
+ /* Restore the context of the first task that is going to run. */\r
+ vPortStart();\r
+\r
+ /* Should not get here as the tasks are now running! */\r
+ return pdTRUE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* It is unlikely that the V850ES/Fx3 port will get stopped. If required simply\r
+ disable the tick interrupt here. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Hardware initialisation to generate the RTOS tick. This uses\r
+ */\r
+static void prvSetupTimerInterrupt( void )\r
+{\r
+ TM0CE = 0; /* TMM0 operation disable */\r
+ TM0EQMK0 = 1; /* INTTM0EQ0 interrupt disable */\r
+ TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */\r
+\r
+ /* Set INTTM0EQ0 level 5 priority */\r
+ TM0EQIC0 &= 0xF8;\r
+ TM0CTL0 = 0x00;\r
+ TM0CMP0 = (((configCPU_CLOCK_HZ / configTICK_RATE_HZ) / 2)-1); /* divided by 2 because peripherals only run at CPU_CLOCK/2 */\r
+\r
+ TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */\r
+ TM0EQMK0 = 0; /* INTTM0EQ0 interrupt enable */\r
+ TM0CE = 1; /* TMM0 operation enable */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
--- /dev/null
+; FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
+;\r
+; This file is part of the FreeRTOS.org distribution.\r
+;\r
+; FreeRTOS.org is free software; you can redistribute it and/or modify\r
+; it under the terms of the GNU General Public License as published by\r
+; the Free Software Foundation; either version 2 of the License, or\r
+; (at your option) any later version.\r
+;\r
+; FreeRTOS.org is distributed in the hope that it will be useful,\r
+; but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+; GNU General Public License for more details.\r
+;\r
+; You should have received a copy of the GNU General Public License\r
+; along with FreeRTOS.org; if not, write to the Free Software\r
+; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+;\r
+; A special exception to the GPL can be applied should you wish to distribute\r
+; a combined work that includes FreeRTOS.org, without being obliged to provide\r
+; the source code for any proprietary components. See the licensing section\r
+; of http://www.FreeRTOS.org for full details of how and when the exception\r
+; can be applied.\r
+;\r
+; ***************************************************************************\r
+; See http://www.FreeRTOS.org for documentation, latest information, license\r
+; and contact details. Please ensure to read the configuration and relevant\r
+; port sections of the online documentation.\r
+; ***************************************************************************\r
+;\r
+;------------------------------------------------------------------------------\r
+; Note: Select the correct include files for the device used by the application.\r
+#include "FreeRTOSConfig.h"\r
+;------------------------------------------------------------------------------\r
+\r
+; Functions used by scheduler\r
+;------------------------------------------------------------------------------\r
+ EXTERN vTaskSwitchContext\r
+ EXTERN vTaskIncrementTick\r
+\r
+; Variables used by scheduler\r
+;------------------------------------------------------------------------------\r
+ EXTERN pxCurrentTCB\r
+ EXTERN usCriticalNesting\r
+\r
+; Functions implemented in this file\r
+;------------------------------------------------------------------------------\r
+ PUBLIC vPortYield\r
+ PUBLIC vPortStart\r
+\r
+; Security ID definition\r
+;------------------------------------------------------------------------------\r
+#define CG_SECURITY0 0FFH\r
+#define CG_SECURITY1 0FFH\r
+#define CG_SECURITY2 0FFH\r
+#define CG_SECURITY3 0FFH\r
+#define CG_SECURITY4 0FFH\r
+#define CG_SECURITY5 0FFH\r
+#define CG_SECURITY6 0FFH\r
+#define CG_SECURITY7 0FFH\r
+#define CG_SECURITY8 0FFH\r
+#define CG_SECURITY9 0FFH\r
+\r
+; Tick ISR Prototype\r
+;------------------------------------------------------------------------------\r
+ PUBWEAK `??MD_INTTM0EQ0??INTVEC 640`\r
+ PUBLIC MD_INTTM0EQ0\r
+\r
+MD_INTTM0EQ0 SYMBOL "MD_INTTM0EQ0"\r
+`??MD_INTTM0EQ0??INTVEC 640` SYMBOL "??INTVEC 640", MD_INTTM0EQ0\r
+\r
+;------------------------------------------------------------------------------\r
+; portSAVE_CONTEXT MACRO\r
+; Saves the context of the remaining general purpose registers\r
+; and the usCriticalNesting Value of the active Task onto the task stack\r
+; saves stack pointer to the TCB\r
+;------------------------------------------------------------------------------\r
+portSAVE_CONTEXT MACRO\r
+#if configDATA_MODE == 1 ; Using the Tiny data model\r
+ prepare {r20,r21,r22,r23,r24,r25,r26,r27,r28,r29,r30},76,sp ; save general purpose registers\r
+ sst.w r19,72[ep]\r
+ sst.w r18,68[ep]\r
+ sst.w r17,64[ep]\r
+ sst.w r16,60[ep]\r
+ sst.w r15,56[ep]\r
+ sst.w r14,52[ep]\r
+ sst.w r13,48[ep]\r
+ sst.w r12,44[ep]\r
+ sst.w r11,40[ep]\r
+ sst.w r10,36[ep]\r
+ sst.w r9,32[ep]\r
+ sst.w r8,28[ep]\r
+ sst.w r7,24[ep]\r
+ sst.w r6,20[ep]\r
+ sst.w r5,16[ep]\r
+ sst.w r4,12[ep]\r
+#else ; Using the Small/Large data model\r
+ prepare {r20,r21,r22,r23,r24,r26,r27,r28,r29,r30},72,sp ; save general purpose registers\r
+ sst.w r19,68[ep]\r
+ sst.w r18,64[ep]\r
+ sst.w r17,60[ep]\r
+ sst.w r16,56[ep]\r
+ sst.w r15,52[ep]\r
+ sst.w r14,48[ep]\r
+ sst.w r13,44[ep]\r
+ sst.w r12,40[ep]\r
+ sst.w r11,36[ep]\r
+ sst.w r10,32[ep]\r
+ sst.w r9,28[ep]\r
+ sst.w r8,24[ep]\r
+ sst.w r7,20[ep]\r
+ sst.w r6,16[ep]\r
+ sst.w r5,12[ep]\r
+#endif /* configDATA_MODE */\r
+ sst.w r2,8[ep]\r
+ sst.w r1,4[ep]\r
+ MOVHI hi1(usCriticalNesting),r0,r1 ; save usCriticalNesting value to stack\r
+ ld.w lw1(usCriticalNesting)[r1],r2\r
+ sst.w r2,0[ep]\r
+ MOVHI hi1(pxCurrentTCB),r0,r1 ; save SP to top of current TCB\r
+ ld.w lw1(pxCurrentTCB)[r1],r2\r
+ st.w sp,0[r2]\r
+ ENDM\r
+;------------------------------------------------------------------------------\r
+\r
+;------------------------------------------------------------------------------\r
+; portRESTORE_CONTEXT MACRO\r
+; Gets stack pointer from the current TCB\r
+; Restores the context of the usCriticalNesting value and general purpose\r
+; registers of the selected task from the task stack\r
+;------------------------------------------------------------------------------\r
+portRESTORE_CONTEXT MACRO\r
+ MOVHI hi1(pxCurrentTCB),r0,r1 ; get Stackpointer address\r
+ ld.w lw1(pxCurrentTCB)[r1],sp\r
+ MOV sp,r1\r
+ ld.w 0[r1],sp ; load stackpointer\r
+ MOV sp,ep ; set stack pointer to element pointer\r
+ sld.w 0[ep],r1 ; load usCriticalNesting value from stack\r
+ MOVHI hi1(usCriticalNesting),r0,r2\r
+ st.w r1,lw1(usCriticalNesting)[r2]\r
+ sld.w 4[ep],r1 ; restore general purpose registers\r
+ sld.w 8[ep],r2\r
+#if configDATA_MODE == 1 ; Using Tiny data model\r
+ sld.w 12[ep],r4\r
+ sld.w 16[ep],r5\r
+ sld.w 20[ep],r6\r
+ sld.w 24[ep],r7\r
+ sld.w 28[ep],r8\r
+ sld.w 32[ep],r9\r
+ sld.w 36[ep],r10\r
+ sld.w 40[ep],r11\r
+ sld.w 44[ep],r12\r
+ sld.w 48[ep],r13\r
+ sld.w 52[ep],r14\r
+ sld.w 56[ep],r15\r
+ sld.w 60[ep],r16\r
+ sld.w 64[ep],r17\r
+ sld.w 68[ep],r18\r
+ sld.w 72[ep],r19\r
+ dispose 76,{r20,r21,r22,r23,r24,r25,r26,r27,r28,r29,r30}\r
+#else ; Using Small/Large data model\r
+ sld.w 12[ep],r5\r
+ sld.w 16[ep],r6\r
+ sld.w 20[ep],r7\r
+ sld.w 24[ep],r8\r
+ sld.w 28[ep],r9\r
+ sld.w 32[ep],r10\r
+ sld.w 36[ep],r11\r
+ sld.w 40[ep],r12\r
+ sld.w 44[ep],r13\r
+ sld.w 48[ep],r14\r
+ sld.w 52[ep],r15\r
+ sld.w 56[ep],r16\r
+ sld.w 60[ep],r17\r
+ sld.w 64[ep],r18\r
+ sld.w 68[ep],r19\r
+ dispose 72,{r20,r21,r22,r23,r24,r26,r27,r28,r29,r30}\r
+#endif /* configDATA_MODE */\r
+ ENDM\r
+;------------------------------------------------------------------------------\r
+\r
+;------------------------------------------------------------------------------\r
+; Restore the context of the first task that is going to run.\r
+;\r
+; Input: NONE\r
+;\r
+; Call: CALL vPortStart\r
+;\r
+; Output: NONE\r
+;------------------------------------------------------------------------------ \r
+ RSEG CODE:CODE\r
+vPortStart:\r
+ portRESTORE_CONTEXT ; Restore the context of whichever task the ...\r
+ ld.w 0[sp],lp\r
+ ldsr lp,5 ; restore PSW\r
+ DI\r
+ ld.w 4[sp],lp ; restore LP\r
+ ld.w 8[sp],lp ; restore LP\r
+ ADD 0x0C,sp ; set SP to right position\r
+ EI\r
+ jmp [lp]\r
+;------------------------------------------------------------------------------\r
+\r
+;------------------------------------------------------------------------------\r
+; Port Yield function to check for a Task switch in the cooperative and\r
+; preemptive mode\r
+;\r
+; Input: NONE\r
+;\r
+; Call: CALL vPortYield\r
+;\r
+; Output: NONE\r
+;------------------------------------------------------------------------------\r
+\r
+ RSEG CODE:CODE\r
+vPortYield:\r
+\r
+ add -0x0C,sp ; prepare stack to save necessary values\r
+ st.w lp,8[sp] ; store LP to stack\r
+ stsr 0,r31\r
+ st.w lp,4[sp] ; store EIPC to stack\r
+ stsr 1,lp\r
+ st.w lp,0[sp] ; store EIPSW to stack\r
+ portSAVE_CONTEXT ; Save the context of the current task.\r
+ jarl vTaskSwitchContext,lp ; Call the scheduler.\r
+ portRESTORE_CONTEXT ; Restore the context of whichever task the ...\r
+ ; ... scheduler decided should run.\r
+ ld.w 0[sp],lp ; restore EIPSW from stack\r
+ ldsr lp,1\r
+ ld.w 4[sp],lp ; restore EIPC from stack\r
+ ldsr lp,0\r
+ ld.w 8[sp],lp ; restore LP from stack\r
+ add 0x0C,sp ; set SP to right position\r
+\r
+ RETI\r
+\r
+;------------------------------------------------------------------------------\r
+\r
+;------------------------------------------------------------------------------\r
+; Perform the necessary steps of the Tick Count Increment and Task Switch\r
+; depending on the chosen kernel configuration\r
+;\r
+; Input: NONE\r
+;\r
+; Call: ISR\r
+;\r
+; Output: NONE\r
+;------------------------------------------------------------------------------ \r
+#if configUSE_PREEMPTION == 1 ; use preemptive kernel mode\r
+\r
+MD_INTTM0EQ0:\r
+\r
+ add -0x0C,sp ; prepare stack to save necessary values\r
+ st.w lp,8[sp] ; store LP to stack\r
+ stsr 0,r31\r
+ st.w lp,4[sp] ; store EIPC to stack\r
+ stsr 1,lp\r
+ st.w lp,0[sp] ; store EIPSW to stack\r
+ portSAVE_CONTEXT ; Save the context of the current task.\r
+ jarl vTaskIncrementTick,lp ; Call the timer tick function.\r
+ jarl vTaskSwitchContext,lp ; Call the scheduler.\r
+ portRESTORE_CONTEXT ; Restore the context of whichever task the ...\r
+ ; ... scheduler decided should run.\r
+ ld.w 0[sp],lp ; restore EIPSW from stack\r
+ ldsr lp,1\r
+ ld.w 4[sp],lp ; restore EIPC from stack\r
+ ldsr lp,0\r
+ ld.w 8[sp],lp ; restore LP from stack\r
+ add 0x0C,sp ; set SP to right position\r
+\r
+ RETI\r
+;------------------------------------------------------------------------------\r
+#else ; use cooperative kernel mode\r
+\r
+MD_INTTM0EQ0:\r
+ prepare {lp,ep},8,sp\r
+ sst.w r1,4[ep]\r
+ sst.w r5,0[ep]\r
+ jarl vTaskIncrementTick,lp ; Call the timer tick function.\r
+ sld.w 0[ep],r5\r
+ sld.w 4[ep],r1\r
+ dispose 8,{lp,ep}\r
+ RETI\r
+#endif /* configUSE_PREEMPTION */\r
+\r
+;------------------------------------------------------------------------------\r
+ COMMON INTVEC:CODE:ROOT(2)\r
+ ORG 640\r
+`??MD_INTTM0EQ0??INTVEC 640`:\r
+ JR MD_INTTM0EQ0\r
+\r
+ RSEG NEAR_ID:CONST:SORT:NOROOT(2)\r
+`?<Initializer for usCriticalNesting>`:\r
+ DW 10\r
+\r
+ COMMON INTVEC:CODE:ROOT(2)\r
+ ORG 40H\r
+`??vPortYield??INTVEC 40`:\r
+ JR vPortYield\r
+\r
+;------------------------------------------------------------------------------\r
+; set microcontroller security ID\r
+\r
+ COMMON INTVEC:CODE:ROOT(2)\r
+ ORG 70H\r
+`SECUID`:\r
+ DB CG_SECURITY0\r
+ DB CG_SECURITY1\r
+ DB CG_SECURITY2\r
+ DB CG_SECURITY3\r
+ DB CG_SECURITY4\r
+ DB CG_SECURITY5\r
+ DB CG_SECURITY6\r
+ DB CG_SECURITY7\r
+ DB CG_SECURITY8\r
+ DB CG_SECURITY9\r
+\r
+\r
+ END\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section\r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions.\r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned int\r
+#define portBASE_TYPE int\r
+\r
+\r
+#if (configUSE_16_BIT_TICKS==1)\r
+ typedef unsigned portSHORT portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned portLONG portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/ \r
+\r
+/* Interrupt control macros. */\r
+#define portDISABLE_INTERRUPTS() __asm ( "DI" )\r
+#define portENABLE_INTERRUPTS() __asm ( "EI" )\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Critical section control macros. */\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portBASE_TYPE ) 0 )\r
+\r
+#define portENTER_CRITICAL() \\r
+{ \\r
+extern volatile /*unsigned portSHORT*/ portSTACK_TYPE usCriticalNesting; \\r
+ \\r
+ portDISABLE_INTERRUPTS(); \\r
+ \\r
+ /* Now interrupts are disabled ulCriticalNesting can be accessed */ \\r
+ /* directly. Increment ulCriticalNesting to keep a count of how many */ \\r
+ /* times portENTER_CRITICAL() has been called. */ \\r
+ usCriticalNesting++; \\r
+}\r
+\r
+#define portEXIT_CRITICAL() \\r
+{ \\r
+extern volatile /*unsigned portSHORT*/ portSTACK_TYPE usCriticalNesting; \\r
+ \\r
+ if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
+ { \\r
+ /* Decrement the nesting count as we are leaving a critical section. */ \\r
+ usCriticalNesting--; \\r
+ \\r
+ /* If the nesting level has reached zero then interrupts should be */ \\r
+ /* re-enabled. */ \\r
+ if( usCriticalNesting == portNO_CRITICAL_SECTION_NESTING ) \\r
+ { \\r
+ portENABLE_INTERRUPTS(); \\r
+ } \\r
+ } \\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task utilities. */\r
+extern void vPortYield( void );\r
+extern void vPortStart( void );\r
+extern void portSAVE_CONTEXT( void );\r
+extern void portRESTORE_CONTEXT( void );\r
+#define portYIELD() __asm ( "trap 0" )\r
+#define portNOP() __asm ( "NOP" )\r
+extern void vTaskSwitchContext( void );\r
+#define portYIELD_FROM_ISR( xHigherPriorityTaskWoken ) if( xHigherPriorityTaskWoken ) vTaskSwitchContext();\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Hardwware specifics. */\r
+#define portBYTE_ALIGNMENT 4\r
+#define portSTACK_GROWTH ( -1 )\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
projects / freertos / commitdiff