Edwin Olsen: improves breakpoint handling on cortex-m3 parts. Specifically, this...

git-svn-id: svn://svn.berlios.de/openocd/trunk@589 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index b330fee3c5304945c68834b0f36cb66a1379e03a..fb303a8be2943c9017e7604ef8b917d3eb3c8853 100644 (file)
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -749,7 +749,7 @@ int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                LOG_WARNING("breakpoint already set");
                return ERROR_OK;
        }
-
+    
        if (cortex_m3->auto_bp_type)
        {
                breakpoint->type = (breakpoint->address < 0x20000000) ? BKPT_HARD : BKPT_SOFT;
@@ -831,10 +831,16 @@ int cortex_m3_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
        /* get pointers to arch-specific information */
        armv7m_common_t *armv7m = target->arch_info;
        cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
-       
+
        if (cortex_m3->auto_bp_type)
        {
                breakpoint->type = (breakpoint->address < 0x20000000) ? BKPT_HARD : BKPT_SOFT;
+        if (breakpoint->length != 2) {
+            // XXX Hack: Replace all breakpoints with length != 2 with
+            // a hardware breakpoint. 
+            breakpoint->type = BKPT_HARD;
+            breakpoint->length = 2;
+        }
        }
 
        if ((breakpoint->type == BKPT_HARD) && (breakpoint->address >= 0x20000000))
@@ -1105,6 +1111,14 @@ int cortex_m3_store_core_reg_u32(struct target_s *target, enum armv7m_regtype ty
        cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
        swjdp_common_t *swjdp = &cortex_m3->swjdp_info;
 
+    // If the LR register is being modified, make sure it will put us
+    // in "thumb" mode, or an INVSTATE exception will occur. This is a
+    // hack to deal with the fact that gdb will sometimes "forge"
+    // return addresses, and doesn't set the LSB correctly (i.e., when
+    // printing expressions containing function calls, it sets LR=0.)
+    if (num==14)
+        value |= 0x01;
+
        if ((type == ARMV7M_REGISTER_CORE_GP) && (num <= ARMV7M_PSP))
        {
                retval = ahbap_write_coreregister_u32(swjdp, value, num);
@@ -1449,3 +1463,4 @@ int cortex_m3_register_commands(struct command_context_s *cmd_ctx)
        
        return retval;
 }
+