]> git.sur5r.net Git - freertos/commitdiff
Starting point for XMC1000 Keil demo.
authorrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 25 Aug 2013 01:03:56 +0000 (01:03 +0000)
committerrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 25 Aug 2013 01:03:56 +0000 (01:03 +0000)
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2007 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/FreeRTOSConfig.h [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/ParTest.c [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RTOSDemo.plg [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RTOSDemo.uvopt [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RTOSDemo.uvproj [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RegTest.s [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/main-blinky.c [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/main-full.c [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/main.c [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/startup_XMC1300.s [new file with mode: 0644]
FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/system_XMC1300.c [new file with mode: 0644]

diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/FreeRTOSConfig.h
new file mode 100644 (file)
index 0000000..9078de7
--- /dev/null
@@ -0,0 +1,136 @@
+/*\r
+    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that has become a de facto standard.             *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly and support the FreeRTOS         *\r
+     *    project by purchasing a FreeRTOS tutorial book, reference          *\r
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
+     *                                                                       *\r
+     *    Thank you!                                                         *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+    >>! a combined work that includes FreeRTOS without being obliged to provide\r
+    >>! the source code for proprietary components outside of the FreeRTOS\r
+    >>! kernel.\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    Having a problem?  Start by reading the FAQ "My application does   *\r
+     *    not run, what could be wrong?"                                     *\r
+     *                                                                       *\r
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+    license and Real Time Engineers Ltd. contact details.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ *\r
+ * See http://www.freertos.org/a00110.html.\r
+ *----------------------------------------------------------*/\r
+\r
+#include <stdint.h>\r
+extern uint32_t SystemCoreClock;\r
+\r
+#define configUSE_PREEMPTION                   1\r
+#define configUSE_IDLE_HOOK                            0\r
+#define configUSE_TICK_HOOK                            1\r
+#define configCPU_CLOCK_HZ                             ( SystemCoreClock )\r
+#define configTICK_RATE_HZ                             ( ( portTickType ) 1000 )\r
+#define configMAX_PRIORITIES                   ( ( unsigned portBASE_TYPE ) 5 )\r
+#define configMINIMAL_STACK_SIZE               ( ( unsigned short ) 60 )\r
+#define configTOTAL_HEAP_SIZE                  ( ( size_t ) ( 6500 ) )\r
+#define configMAX_TASK_NAME_LEN                        ( 5 )\r
+#define configUSE_TRACE_FACILITY               1\r
+#define configUSE_16_BIT_TICKS                 0\r
+#define configIDLE_SHOULD_YIELD                        1\r
+#define configUSE_MUTEXES                              1\r
+#define configQUEUE_REGISTRY_SIZE              8\r
+#define configCHECK_FOR_STACK_OVERFLOW 2\r
+#define configUSE_RECURSIVE_MUTEXES            1\r
+#define configUSE_MALLOC_FAILED_HOOK   1\r
+#define configUSE_APPLICATION_TASK_TAG 0\r
+#define configUSE_COUNTING_SEMAPHORES  1\r
+#define configGENERATE_RUN_TIME_STATS  0\r
+\r
+/* Co-routine definitions. */\r
+#define configUSE_CO_ROUTINES                  0\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Software timer definitions. */\r
+#define configUSE_TIMERS                               1\r
+#define configTIMER_TASK_PRIORITY              ( 2 )\r
+#define configTIMER_QUEUE_LENGTH               5\r
+#define configTIMER_TASK_STACK_DEPTH   ( 80 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+#define INCLUDE_vTaskPrioritySet               1\r
+#define INCLUDE_uxTaskPriorityGet              1\r
+#define INCLUDE_vTaskDelete                            1\r
+#define INCLUDE_vTaskCleanUpResources  1\r
+#define INCLUDE_vTaskSuspend                   1\r
+#define INCLUDE_vTaskDelayUntil                        1\r
+#define INCLUDE_vTaskDelay                             1\r
+\r
+/* Normal assert() semantics without relying on the provision of an assert.h\r
+header file. */\r
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }\r
+\r
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS\r
+standard names - or at least those used in the unmodified vector table. */\r
+#define vPortSVCHandler SVC_Handler\r
+#define xPortPendSVHandler PendSV_Handler\r
+#define xPortSysTickHandler SysTick_Handler\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/ParTest.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/ParTest.c
new file mode 100644 (file)
index 0000000..9346703
--- /dev/null
@@ -0,0 +1,92 @@
+/*\r
+    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that has become a de facto standard.             *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly and support the FreeRTOS         *\r
+     *    project by purchasing a FreeRTOS tutorial book, reference          *\r
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
+     *                                                                       *\r
+     *    Thank you!                                                         *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+    >>! a combined work that includes FreeRTOS without being obliged to provide\r
+    >>! the source code for proprietary components outside of the FreeRTOS\r
+    >>! kernel.\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    Having a problem?  Start by reading the FAQ "My application does   *\r
+     *    not run, what could be wrong?"                                     *\r
+     *                                                                       *\r
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+    license and Real Time Engineers Ltd. contact details.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple GPIO (parallel port) IO routines.\r
+ *-----------------------------------------------------------*/\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Standard demo include. */\r
+#include "partest.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned long ulLED, signed portBASE_TYPE xValue )\r
+{\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestToggleLED( unsigned long ulLED )\r
+{\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RTOSDemo.plg b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RTOSDemo.plg
new file mode 100644 (file)
index 0000000..f059c3b
--- /dev/null
@@ -0,0 +1,48 @@
+<html>\r
+<body>\r
+<pre>\r
+<h1>µVision Build Log</h1>\r
+<h2>Project:</h2>\r
+C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\CORTEX_M0_Infineon_Boot_Kits_IAR_Keil\RTOSDemo.uvproj\r
+Project File Date:  08/24/2013\r
+\r
+<h2>Output:</h2>\r
+Build target 'XMC1300'\r
+assembling startup_XMC1300.s...\r
+compiling timers.c...\r
+compiling list.c...\r
+compiling queue.c...\r
+compiling tasks.c...\r
+compiling port.c...\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(101): warning:  #1207-D: attribute "naked" ignored\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(103): warning:  #1207-D: attribute "naked" ignored\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(108): warning:  #1207-D: attribute "naked" ignored\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(155): warning:  #1267-D: Implicit physical register R3 should be defined as a variable\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(155): error:  #1086: Operand is wrong type\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(155): error:  #114: label "pxCurrentTCBConst2" was referenced but not defined\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(168): warning:  #1267-D: Implicit physical register R0 should be defined as a variable\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(278): warning:  #1267-D: Implicit physical register R0 should be defined as a variable\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(278): warning:  #1267-D: Implicit physical register R3 should be defined as a variable\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(278): error:  #1086: Operand is wrong type\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(278): error:  #114: label "pxCurrentTCBConst" was referenced but not defined\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(306): error:  #20: identifier "SystemCoreClock" is undefined\r
+compiling ParTest.c...\r
+compiling main.c...\r
+compiling main-blinky.c...\r
+".\RTOSDemo.axf" - 5 Errors, 7 Warning(s).\r
+Target not created\r
+Clean started: Project: 'RTOSDemo'\r
+   deleting intermediate output files for target 'XMC1300'\r
+Build target 'XMC1300'\r
+assembling startup_XMC1300.s...\r
+compiling timers.c...\r
+compiling list.c...\r
+compiling queue.c...\r
+compiling tasks.c...\r
+compiling port.c...\r
+..\..\Source\portable\RVDS\ARM_CM0\port.c(305): error:  #20: identifier "SystemCoreClock" is undefined\r
+compiling ParTest.c...\r
+compiling main.c...\r
+compiling main-blinky.c...\r
+".\Output\RTOSDemo.axf" - 1 Errors, 0 Warning(s).\r
+Target not created\r
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RTOSDemo.uvopt b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RTOSDemo.uvopt
new file mode 100644 (file)
index 0000000..34468eb
--- /dev/null
@@ -0,0 +1,418 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>XMC1300</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>1</RunSim>
+        <RunTarget>0</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
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+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>255</CpuCode>
+      <Books>
+        <Book>
+          <Number>0</Number>
+          <Title>Data Sheet</Title>
+          <Path>DATASHTS\Infineon\XMC1300\xmc1300_ds.pdf</Path>
+        </Book>
+        <Book>
+          <Number>1</Number>
+          <Title>User Manual</Title>
+          <Path>DATASHTS\Infineon\XMC1300\xmc1300_ds.pdf</Path>
+        </Book>
+        <Book>
+          <Number>2</Number>
+          <Title>Technical Reference Manual</Title>
+          <Path>datashts\arm\cortex_m0\r0p0\DDI0432C_CORTEX_M0_R0P0_TRM.PDF</Path>
+        </Book>
+        <Book>
+          <Number>3</Number>
+          <Title>Generic User Guide</Title>
+          <Path>datashts\arm\cortex_m0\r0p0\DUI0497A_CORTEX_M0_R0P0_GENERIC_UG.PDF</Path>
+        </Book>
+      </Books>
+      <DllOpt>
+        <SimDllName>SARMCM3.DLL</SimDllName>
+        <SimDllArguments></SimDllArguments>
+        <SimDlgDllName>DARMCM1.DLL</SimDlgDllName>
+        <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
+        <TargetDllName>SARMCM3.DLL</TargetDllName>
+        <TargetDllArguments></TargetDllArguments>
+        <TargetDlgDllName>TARMCM1.DLL</TargetDlgDllName>
+        <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
+      </DllOpt>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
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+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
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+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
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+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-O207 -S0 -C0 -FO7  -FN1 -FC800 -FD20000000 -FF0XMC1300_200 -FL032000 -FS010001000</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
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+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>3</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>System</GroupName>
+    <tvExp>0</tvExp>
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+    <cbSel>0</cbSel>
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+      <bShared>0</bShared>
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+  </Group>
+
+  <Group>
+    <GroupName>FreeRTOS source</GroupName>
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+</ProjectOpt>
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RTOSDemo.uvproj b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RTOSDemo.uvproj
new file mode 100644 (file)
index 0000000..3738f40
--- /dev/null
@@ -0,0 +1,516 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>XMC1300</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>XMC1302-200</Device>
+          <Vendor>Infineon</Vendor>
+          <Cpu>IRAM(0x20000000-0x20003FFF) IROM(0x10001000-0x10032FFF) CLOCK(12000000) CPUTYPE("Cortex-M0")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile>"STARTUP\Infineon\XMC1300\startup_XMC1300.s" ("Infineon XMC1300 Startup Code")</StartupFile>
+          <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0XMC1300_200 -FS010001000 -FL032000)</FlashDriverDll>
+          <DeviceId>6778</DeviceId>
+          <RegisterFile>XMC1300.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>SFD\Infineon\XMC1300\xmc1300.SFR</SFDFile>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath>Infineon\XMC1300\</RegisterFilePath>
+          <DBRegisterFilePath>Infineon\XMC1300\</DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\Output\</OutputDirectory>
+          <OutputName>RTOSDemo</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments></SimDllArguments>
+          <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments></TargetDllArguments>
+          <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>1</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+          </Simulator>
+          <Target>
+            <UseTarget>0</UseTarget>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>0</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>1</RestoreTracepoints>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection>1</TargetSelection>
+          <SimDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+            <Driver>BIN\UL2CM3.DLL</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>0</Capability>
+            <DriverSelection>-1</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M0"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x4000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x10001000</StartAddress>
+                <Size>0x32000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x10001000</StartAddress>
+                <Size>0x32000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x4000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>0</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..\CORTEX_M0_Infineon_Boot_Kits_IAR_Keil;..\..\Source\include;..\..\Source\portable\RVDS\ARM_CM0;..\Common\include</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x10001000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>System</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_XMC1300.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>.\startup_XMC1300.s</FilePath>
+            </File>
+            <File>
+              <FileName>system_XMC1300.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>.\system_XMC1300.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FreeRTOS source</GroupName>
+          <Files>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\portable\RVDS\ARM_CM0\port.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\portable\MemMang\heap_4.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Demo App Source</GroupName>
+          <Files>
+            <File>
+              <FileName>ParTest.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>.\ParTest.c</FilePath>
+            </File>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>.\main.c</FilePath>
+            </File>
+            <File>
+              <FileName>main-blinky.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>.\main-blinky.c</FilePath>
+            </File>
+            <File>
+              <FileName>main-full.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>.\main-full.c</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>0</IncludeInBuild>
+                  <AlwaysBuild>2</AlwaysBuild>
+                  <GenerateAssemblyFile>2</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>2</AssembleAssemblyFile>
+                  <PublicsOnly>2</PublicsOnly>
+                  <StopOnExitCode>11</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                </CommonProperty>
+                <FileArmAds>
+                  <Cads>
+                    <interw>2</interw>
+                    <Optim>0</Optim>
+                    <oTime>2</oTime>
+                    <SplitLS>2</SplitLS>
+                    <OneElfS>2</OneElfS>
+                    <Strict>2</Strict>
+                    <EnumInt>2</EnumInt>
+                    <PlainCh>2</PlainCh>
+                    <Ropi>2</Ropi>
+                    <Rwpi>2</Rwpi>
+                    <wLevel>0</wLevel>
+                    <uThumb>2</uThumb>
+                    <uSurpInc>2</uSurpInc>
+                    <VariousControls>
+                      <MiscControls></MiscControls>
+                      <Define></Define>
+                      <Undefine></Undefine>
+                      <IncludePath></IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+            <File>
+              <FileName>FreeRTOSConfig.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>.\FreeRTOSConfig.h</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+</Project>
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RegTest.s b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/RegTest.s
new file mode 100644 (file)
index 0000000..be93bb4
--- /dev/null
@@ -0,0 +1,227 @@
+/*\r
+    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that has become a de facto standard.             *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly and support the FreeRTOS         *\r
+     *    project by purchasing a FreeRTOS tutorial book, reference          *\r
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
+     *                                                                       *\r
+     *    Thank you!                                                         *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+    >>! a combined work that includes FreeRTOS without being obliged to provide\r
+    >>! the source code for proprietary components outside of the FreeRTOS\r
+    >>! kernel.\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    Having a problem?  Start by reading the FAQ "My application does   *\r
+     *    not run, what could be wrong?"                                     *\r
+     *                                                                       *\r
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+    license and Real Time Engineers Ltd. contact details.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+       RSEG    CODE:CODE(2)\r
+       thumb\r
+\r
+       EXTERN ulRegTest1LoopCounter\r
+       EXTERN ulRegTest2LoopCounter\r
+\r
+       PUBLIC vRegTest1Task\r
+       PUBLIC vRegTest2Task\r
+\r
+/*-----------------------------------------------------------*/\r
+vRegTest1Task\r
+\r
+       /* Fill the core registers with known values.  This is only done once. */\r
+       movs r1, #101\r
+       movs r2, #102\r
+       movs r3, #103\r
+       movs r4, #104\r
+       movs r5, #105\r
+       movs r6, #106\r
+       movs r7, #107\r
+       movs r0, #108\r
+       mov      r8, r0\r
+       movs r0, #109\r
+       mov  r9, r0\r
+       movs r0, #110\r
+       mov      r10, r0\r
+       movs r0, #111\r
+       mov      r11, r0\r
+       movs r0, #112\r
+       mov  r12, r0\r
+       movs r0, #100\r
+\r
+reg1_loop\r
+       /* Repeatedly check that each register still contains the value written to\r
+       it when the task started. */\r
+       cmp     r0, #100\r
+       bne     reg1_error_loop\r
+       cmp     r1, #101\r
+       bne     reg1_error_loop\r
+       cmp     r2, #102\r
+       bne     reg1_error_loop\r
+       cmp r3, #103\r
+       bne     reg1_error_loop\r
+       cmp     r4, #104\r
+       bne     reg1_error_loop\r
+       cmp     r5, #105\r
+       bne     reg1_error_loop\r
+       cmp     r6, #106\r
+       bne     reg1_error_loop\r
+       cmp     r7, #107\r
+       bne     reg1_error_loop\r
+       movs r0, #108\r
+       cmp     r8, r0\r
+       bne     reg1_error_loop\r
+       movs r0, #109\r
+       cmp     r9, r0\r
+       bne     reg1_error_loop\r
+       movs r0, #110\r
+       cmp     r10, r0\r
+       bne     reg1_error_loop\r
+       movs r0, #111\r
+       cmp     r11, r0\r
+       bne     reg1_error_loop\r
+       movs r0, #112\r
+       cmp     r12, r0\r
+       bne     reg1_error_loop\r
+\r
+       /* Everything passed, increment the loop counter. */\r
+       push { r1 }\r
+       ldr     r0, =ulRegTest1LoopCounter\r
+       ldr r1, [r0]\r
+       adds r1, r1, #1\r
+       str r1, [r0]\r
+       pop { r1 }\r
+\r
+       /* Start again. */\r
+       movs r0, #100\r
+       b reg1_loop\r
+\r
+reg1_error_loop\r
+       /* If this line is hit then there was an error in a core register value.\r
+       The loop ensures the loop counter stops incrementing. */\r
+       b reg1_error_loop\r
+       nop\r
+\r
+\r
+\r
+vRegTest2Task\r
+\r
+       /* Fill the core registers with known values.  This is only done once. */\r
+       movs r1, #1\r
+       movs r2, #2\r
+       movs r3, #3\r
+       movs r4, #4\r
+       movs r5, #5\r
+       movs r6, #6\r
+       movs r7, #7\r
+       movs r0, #8\r
+       mov     r8, r0\r
+       movs r0, #9\r
+       mov r9, r0\r
+       movs r0, #10\r
+       mov     r10, r0\r
+       movs r0, #11\r
+       mov     r11, r0\r
+       movs r0, #12\r
+       mov r12, r0\r
+       movs r0, #10\r
+\r
+reg2_loop\r
+       /* Repeatedly check that each register still contains the value written to\r
+       it when the task started. */\r
+       cmp     r0, #10\r
+       bne     reg2_error_loop\r
+       cmp     r1, #1\r
+       bne     reg2_error_loop\r
+       cmp     r2, #2\r
+       bne     reg2_error_loop\r
+       cmp r3, #3\r
+       bne     reg2_error_loop\r
+       cmp     r4, #4\r
+       bne     reg2_error_loop\r
+       cmp     r5, #5\r
+       bne     reg2_error_loop\r
+       cmp     r6, #6\r
+       bne     reg2_error_loop\r
+       cmp     r7, #7\r
+       bne     reg2_error_loop\r
+       movs r0, #8\r
+       cmp     r8, r0\r
+       bne     reg2_error_loop\r
+       movs r0, #9\r
+       cmp     r9, r0\r
+       bne     reg2_error_loop\r
+       movs r0, #10\r
+       cmp     r10, r0\r
+       bne     reg2_error_loop\r
+       movs r0, #11\r
+       cmp     r11, r0\r
+       bne     reg2_error_loop\r
+       movs r0, #12\r
+       cmp     r12, r0\r
+       bne     reg2_error_loop\r
+\r
+       /* Everything passed, increment the loop counter. */\r
+       push { r1 }\r
+       ldr     r0, =ulRegTest2LoopCounter\r
+       ldr r1, [r0]\r
+       adds r1, r1, #1\r
+       str r1, [r0]\r
+       pop { r1 }\r
+\r
+       /* Start again. */\r
+       movs r0, #10\r
+       b reg2_loop\r
+\r
+reg2_error_loop\r
+       /* If this line is hit then there was an error in a core register value.\r
+       The loop ensures the loop counter stops incrementing. */\r
+       b reg2_error_loop\r
+       nop\r
+\r
+       END\r
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/main-blinky.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/main-blinky.c
new file mode 100644 (file)
index 0000000..fd925c5
--- /dev/null
@@ -0,0 +1,239 @@
+/*\r
+    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that has become a de facto standard.             *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly and support the FreeRTOS         *\r
+     *    project by purchasing a FreeRTOS tutorial book, reference          *\r
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
+     *                                                                       *\r
+     *    Thank you!                                                         *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+    >>! a combined work that includes FreeRTOS without being obliged to provide\r
+    >>! the source code for proprietary components outside of the FreeRTOS\r
+    >>! kernel.\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    Having a problem?  Start by reading the FAQ "My application does   *\r
+     *    not run, what could be wrong?"                                     *\r
+     *                                                                       *\r
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+    license and Real Time Engineers Ltd. contact details.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1:  This project provides two demo applications.  A simple blinky style\r
+ * project, and a more comprehensive test and demo application.  The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two.  See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c.  This file implements the simply blinky style version.\r
+ *\r
+ * NOTE 2:  This file only contains the source code that is specific to the\r
+ * basic demo.  Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_blinky() creates one queue, and two tasks.  It then starts the\r
+ * scheduler.\r
+ *\r
+ * The Queue Send Task:\r
+ * The queue send task is implemented by the prvQueueSendTask() function in\r
+ * this file.  prvQueueSendTask() sits in a loop that causes it to repeatedly\r
+ * block for 200 milliseconds, before sending the value 100 to the queue that\r
+ * was created within main_blinky().  Once the value is sent, the task loops\r
+ * back around to block for another 200 milliseconds.\r
+ *\r
+ * The Queue Receive Task:\r
+ * The queue receive task is implemented by the prvQueueReceiveTask() function\r
+ * in this file.  prvQueueReceiveTask() sits in a loop where it repeatedly\r
+ * blocks on attempts to read data from the queue that was created within\r
+ * main_blinky().  When data is received, the task checks the value of the\r
+ * data, and if the value equals the expected 100, toggles LED 1.  The 'block\r
+ * time' parameter passed to the queue receive function specifies that the\r
+ * task should be held in the Blocked state indefinitely to wait for data to\r
+ * be available on the queue.  The queue receive task will only leave the\r
+ * Blocked state when the queue send task writes to the queue.  As the queue\r
+ * send task writes to the queue every 200 milliseconds, the queue receive\r
+ * task leaves the Blocked state every 200 milliseconds, and therefore toggles\r
+ * the LED every 200 milliseconds.\r
+ */\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+\r
+/* Demo includes. */\r
+#include "ParTest.h"\r
+\r
+/* Priorities at which the tasks are created. */\r
+#define mainQUEUE_RECEIVE_TASK_PRIORITY                ( tskIDLE_PRIORITY + 2 )\r
+#define        mainQUEUE_SEND_TASK_PRIORITY            ( tskIDLE_PRIORITY + 1 )\r
+\r
+/* The rate at which data is sent to the queue.  The 200ms value is converted\r
+to ticks using the portTICK_RATE_MS constant. */\r
+#define mainQUEUE_SEND_FREQUENCY_MS                    ( 200 / portTICK_RATE_MS )\r
+\r
+/* The number of items the queue can hold.  This is 1 as the receive task\r
+will remove items as they are added, meaning the send task should always find\r
+the queue empty. */\r
+#define mainQUEUE_LENGTH                                       ( 1 )\r
+\r
+/* Values passed to the two tasks just to check the task parameter\r
+functionality. */\r
+#define mainQUEUE_SEND_PARAMETER                       ( 0x1111UL )\r
+#define mainQUEUE_RECEIVE_PARAMETER                    ( 0x22UL )\r
+\r
+/* The number of the LED that is toggled. */\r
+#define mainLED_TO_TOGGLE                                      ( 0 )\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The tasks as described in the comments at the top of this file.\r
+ */\r
+static void prvQueueReceiveTask( void *pvParameters );\r
+static void prvQueueSendTask( void *pvParameters );\r
+\r
+/*\r
+ * Called by main() to create the simply blinky style application if\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
+ */\r
+void main_blinky( void );\r
+\r
+/*\r
+ * The hardware only has a single LED.  Simply toggle it.\r
+ */\r
+extern void vMainToggleLED( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used by both tasks. */\r
+static xQueueHandle xQueue = NULL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_blinky( void )\r
+{\r
+       /* Create the queue. */\r
+       xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );\r
+\r
+       if( xQueue != NULL )\r
+       {\r
+               /* Start the two tasks as described in the comments at the top of this\r
+               file. */\r
+               xTaskCreate( prvQueueReceiveTask,                                       /* The function that implements the task. */\r
+                                       ( signed char * ) "Rx",                                 /* The text name assigned to the task - for debug only as it is not used by the kernel. */\r
+                                       configMINIMAL_STACK_SIZE,                               /* The size of the stack to allocate to the task. */\r
+                                       ( void * ) mainQUEUE_RECEIVE_PARAMETER, /* The parameter passed to the task - just to check the functionality. */\r
+                                       mainQUEUE_RECEIVE_TASK_PRIORITY,                /* The priority assigned to the task. */\r
+                                       NULL );                                                                 /* The task handle is not required, so NULL is passed. */\r
+\r
+               xTaskCreate( prvQueueSendTask, ( signed char * ) "TX", configMINIMAL_STACK_SIZE, ( void * ) mainQUEUE_SEND_PARAMETER, mainQUEUE_SEND_TASK_PRIORITY, NULL );\r
+\r
+               /* Start the tasks and timer running. */\r
+               vTaskStartScheduler();\r
+       }\r
+\r
+       /* If all is well, the scheduler will now be running, and the following\r
+       line will never be reached.  If the following line does execute, then\r
+       there was insufficient FreeRTOS heap memory available for the idle and/or\r
+       timer tasks     to be created.  See the memory management section on the\r
+       FreeRTOS web site for more details. */\r
+       for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueSendTask( void *pvParameters )\r
+{\r
+portTickType xNextWakeTime;\r
+const unsigned long ulValueToSend = 100UL;\r
+\r
+       /* Check the task parameter is as expected. */\r
+       configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_SEND_PARAMETER );\r
+\r
+       /* Initialise xNextWakeTime - this only needs to be done once. */\r
+       xNextWakeTime = xTaskGetTickCount();\r
+\r
+       for( ;; )\r
+       {\r
+               /* Place this task in the blocked state until it is time to run again.\r
+               The block time is specified in ticks, the constant used converts ticks\r
+               to ms.  While in the Blocked state this task will not consume any CPU\r
+               time. */\r
+               vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );\r
+\r
+               /* Send to the queue - causing the queue receive task to unblock and\r
+               toggle the LED.  0 is used as the block time so the sending operation\r
+               will not block - it shouldn't need to block as the queue should always\r
+               be empty at this point in the code. */\r
+               xQueueSend( xQueue, &ulValueToSend, 0U );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueReceiveTask( void *pvParameters )\r
+{\r
+unsigned long ulReceivedValue;\r
+\r
+       /* Check the task parameter is as expected. */\r
+       configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_RECEIVE_PARAMETER );\r
+\r
+       for( ;; )\r
+       {\r
+               /* Wait until something arrives in the queue - this task will block\r
+               indefinitely provided INCLUDE_vTaskSuspend is set to 1 in\r
+               FreeRTOSConfig.h. */\r
+               xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );\r
+\r
+               /*  To get here something must have been received from the queue, but\r
+               is it the expected value?  If it is, toggle the LED. */\r
+               if( ulReceivedValue == 100UL )\r
+               {\r
+                       vParTestToggleLED( mainLED_TO_TOGGLE );\r
+                       ulReceivedValue = 0U;\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/main-full.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/main-full.c
new file mode 100644 (file)
index 0000000..74bfa5a
--- /dev/null
@@ -0,0 +1,343 @@
+/*\r
+    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that has become a de facto standard.             *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly and support the FreeRTOS         *\r
+     *    project by purchasing a FreeRTOS tutorial book, reference          *\r
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
+     *                                                                       *\r
+     *    Thank you!                                                         *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+    >>! a combined work that includes FreeRTOS without being obliged to provide\r
+    >>! the source code for proprietary components outside of the FreeRTOS\r
+    >>! kernel.\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    Having a problem?  Start by reading the FAQ "My application does   *\r
+     *    not run, what could be wrong?"                                     *\r
+     *                                                                       *\r
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+    license and Real Time Engineers Ltd. contact details.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1:  This project provides two demo applications.  A simple blinky style\r
+ * project, and a more comprehensive test and demo application.  The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two.  See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c.  This file implements the comprehensive test and demo version.\r
+ *\r
+ * NOTE 2:  This file only contains the source code that is specific to the\r
+ * full demo.  Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_full() creates a set of standard demo tasks, some application specific\r
+ * tasks, and four timers.  It then starts the scheduler.  The web documentation\r
+ * provides more details of the standard demo application tasks, which provide\r
+ * no particular functionality, but do provide a good example of how to use the\r
+ * FreeRTOS API.\r
+ *\r
+ * In addition to the standard demo tasks, the following tasks and timer are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Reg test" tasks - These fill the registers with known values, then check\r
+ * that each register maintains its expected value for the lifetime of the\r
+ * task.  Each task uses a different set of values.  The reg test tasks execute\r
+ * with a very low priority, so get preempted very frequently.  A register\r
+ * containing an unexpected value is indicative of an error in the context\r
+ * switching mechanism.\r
+ *\r
+ * "Flash timers" - A software timer callback function is defined that does\r
+ * nothing but toggle an LED.  Three software timers are created that each\r
+ * use the same callback function, but each toggles a different LED at a\r
+ * different frequency.  One software timer uses LED1, another LED2 and the\r
+ * third LED3.\r
+ *\r
+ * "Check" software timer - The check timer period is initially set to three\r
+ * seconds.  Its callback function checks that all the standard demo tasks, and\r
+ * the register check tasks, are not only still executing, but are executing\r
+ * without reporting any errors.  If the check timer callback discovers that a\r
+ * task has either stalled, or reported an error, then it changes the period of\r
+ * the check timer from the initial three seconds, to just 200ms.  The callback\r
+ * function also toggles LED 4 each time it is called.  This provides a visual\r
+ * indication of the system status:  If the LED toggles every three seconds,\r
+ * then no issues have been discovered.  If the LED toggles every 200ms, then\r
+ * an issue has been discovered with at least one task.\r
+ */\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+#include "timers.h"\r
+\r
+/* Common demo includes. */\r
+#include "blocktim.h"\r
+#include "countsem.h"\r
+#include "recmutex.h"\r
+#include "ParTest.h"\r
+#include "dynamic.h"\r
+\r
+/* The period after which the check timer will expire provided no errors have\r
+been reported by any of the standard demo tasks.  ms are converted to the\r
+equivalent in ticks using the portTICK_RATE_MS constant. */\r
+#define mainCHECK_TIMER_PERIOD_MS                      ( 3000UL / portTICK_RATE_MS )\r
+\r
+/* The period at which the check timer will expire if an error has been\r
+reported in one of the standard demo tasks.  ms are converted to the equivalent\r
+in ticks using the portTICK_RATE_MS constant. */\r
+#define mainERROR_CHECK_TIMER_PERIOD_MS        ( 200UL / portTICK_RATE_MS )\r
+\r
+/* A block time of zero simply means "don't block". */\r
+#define mainDONT_BLOCK                                         ( 0UL )\r
+\r
+/* The base toggle rate used by the flash timers.  Each toggle rate is a\r
+multiple of this. */\r
+#define mainFLASH_TIMER_BASE_RATE                      ( 200UL / portTICK_RATE_MS )\r
+\r
+/* The LED toggle by the check timer. */\r
+#define mainCHECK_LED                                          ( 3 )\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Register check tasks, as described at the top of this file.  The nature of\r
+ * these files necessitates that they are written in an assembly.\r
+ */\r
+extern void vRegTest1Task( void *pvParameters );\r
+extern void vRegTest2Task( void *pvParameters );\r
+\r
+/*\r
+ * The hardware only has a single LED.  Simply toggle it.\r
+ */\r
+extern void vMainToggleLED( void );\r
+\r
+/*\r
+ * The check timer callback function, as described at the top of this file.\r
+ */\r
+static void prvCheckTimerCallback( xTimerHandle xTimer );\r
+\r
+/*\r
+ * The flash timer callback function, as described at the top of this file.\r
+ * This callback function is assigned to three separate software timers.\r
+ */\r
+static void prvFlashTimerCallback( xTimerHandle xTimer );\r
+\r
+/*\r
+ * Called by main() to create the comprehensive test/demo application if\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is not set to 1.\r
+ */\r
+void main_full( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The following two variables are used to communicate the status of the\r
+register check tasks to the check software timer.  If the variables keep\r
+incrementing, then the register check tasks has not discovered any errors.  If\r
+a variable stops incrementing, then an error has been found. */\r
+volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_full( void )\r
+{\r
+xTimerHandle xTimer = NULL;\r
+unsigned long ulTimer;\r
+const unsigned long ulTimersToCreate = 3L;\r
+/* The register test tasks are asm functions that don't use a stack.  The\r
+stack allocated just has to be large enough to hold the task context, and\r
+for the additional required for the stack overflow checking to work (if\r
+configured). */\r
+const size_t xRegTestStackSize = 25U;\r
+\r
+       /* Create the standard demo tasks */\r
+       vCreateBlockTimeTasks();\r
+       vStartCountingSemaphoreTasks();\r
+       vStartRecursiveMutexTasks();\r
+       vStartDynamicPriorityTasks();\r
+\r
+       /* Create the register test tasks as described at the top of this file.\r
+       These are naked functions that don't use any stack.  A stack still has\r
+       to be allocated to hold the task context. */\r
+       xTaskCreate(    vRegTest1Task,                  /* Function that implements the task. */\r
+                                       ( signed char * ) "Reg1", /* Text name of the task. */\r
+                                       xRegTestStackSize,              /* Stack allocated to the task. */\r
+                                       NULL,                                   /* The task parameter is not used. */\r
+                                       tskIDLE_PRIORITY,               /* The priority to assign to the task. */\r
+                                       NULL );                                 /* Don't receive a handle back, it is not needed. */\r
+\r
+       xTaskCreate(    vRegTest2Task,                  /* Function that implements the task. */\r
+                                       ( signed char * ) "Reg2", /* Text name of the task. */\r
+                                       xRegTestStackSize,              /* Stack allocated to the task. */\r
+                                       NULL,                                   /* The task parameter is not used. */\r
+                                       tskIDLE_PRIORITY,               /* The priority to assign to the task. */\r
+                                       NULL );                                 /* Don't receive a handle back, it is not needed. */\r
+\r
+       /* Create the three flash timers. */\r
+       for( ulTimer = 0UL; ulTimer < ulTimersToCreate; ulTimer++ )\r
+       {\r
+               xTimer = xTimerCreate(  ( const signed char * ) "FlashTimer",   /* A text name, purely to help debugging. */\r
+                                                               ( mainFLASH_TIMER_BASE_RATE * ( ulTimer + 1UL ) ),      /* The timer period, in this case 3000ms (3s). */\r
+                                                               pdTRUE,                                                                 /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */\r
+                                                               ( void * ) ulTimer,                                             /* The ID is used to hold the number of the LED that will be flashed. */\r
+                                                               prvFlashTimerCallback                                   /* The callback function that inspects the status of all the other tasks. */\r
+                                                       );\r
+               \r
+               if( xTimer != NULL )\r
+               {\r
+                       xTimerStart( xTimer, mainDONT_BLOCK );\r
+               }\r
+       }\r
+       \r
+       /* Create the software timer that performs the 'check' functionality,\r
+       as described at the top of this file. */\r
+       xTimer = xTimerCreate(  ( const signed char * ) "CheckTimer",/* A text name, purely to help debugging. */\r
+                                                       ( mainCHECK_TIMER_PERIOD_MS ),          /* The timer period, in this case 3000ms (3s). */\r
+                                                       pdTRUE,                                                         /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */\r
+                                                       ( void * ) 0,                                           /* The ID is not used, so can be set to anything. */\r
+                                                       prvCheckTimerCallback                           /* The callback function that inspects the status of all the other tasks. */\r
+                                               );\r
+\r
+       /* If the software timer was created successfully, start it.  It won't\r
+       actually start running until the scheduler starts.  A block time of\r
+       zero is used in this call, although any value could be used as the block\r
+       time will be ignored because the scheduler has not started yet. */\r
+       if( xTimer != NULL )\r
+       {\r
+               xTimerStart( xTimer, mainDONT_BLOCK );\r
+       }\r
+\r
+       /* Start the kernel.  From here on, only tasks and interrupts will run. */\r
+       vTaskStartScheduler();\r
+\r
+       /* If all is well, the scheduler will now be running, and the following\r
+       line will never be reached.  If the following line does execute, then there\r
+       was     insufficient FreeRTOS heap memory available for the idle and/or timer\r
+       tasks to be created.  See the memory management section on the FreeRTOS web\r
+       site, or the FreeRTOS tutorial books for more details. */\r
+       for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* See the description at the top of this file. */\r
+static void prvCheckTimerCallback( xTimerHandle xTimer )\r
+{\r
+static long lChangedTimerPeriodAlready = pdFALSE;\r
+static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
+unsigned long ulErrorFound = pdFALSE;\r
+\r
+       /* Check all the demo and test tasks to ensure that they are all still\r
+       running, and that none have detected an error. */\r
+       if( xAreDynamicPriorityTasksStillRunning() != pdPASS )\r
+       {\r
+               ulErrorFound |= ( 0x01UL << 0UL );\r
+       }\r
+\r
+       if( xAreBlockTimeTestTasksStillRunning() != pdPASS )\r
+       {\r
+               ulErrorFound |= ( 0x01UL << 1UL );\r
+       }\r
+\r
+       if( xAreCountingSemaphoreTasksStillRunning() != pdPASS )\r
+       {\r
+               ulErrorFound |= ( 0x01UL << 2UL );\r
+       }\r
+\r
+       if( xAreRecursiveMutexTasksStillRunning() != pdPASS )\r
+       {\r
+               ulErrorFound |= ( 0x01UL << 3UL );\r
+       }\r
+\r
+       /* Check that the register test 1 task is still running. */\r
+       if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
+       {\r
+               ulErrorFound |= ( 0x01UL << 4UL );\r
+       }\r
+       ulLastRegTest1Value = ulRegTest1LoopCounter;\r
+\r
+       /* Check that the register test 2 task is still running. */\r
+       if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
+       {\r
+               ulErrorFound |= ( 0x01UL << 5UL );\r
+       }\r
+       ulLastRegTest2Value = ulRegTest2LoopCounter;\r
+\r
+       /* Toggle the check LED to give an indication of the system status.  If\r
+       the LED toggles every mainCHECK_TIMER_PERIOD_MS milliseconds then\r
+       everything is ok.  A faster toggle indicates an error. */\r
+       vParTestToggleLED( mainCHECK_LED );\r
+\r
+       /* Have any errors been latched in ulErrorFound?  If so, shorten the\r
+       period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.\r
+       This will result in an increase in the rate at which mainCHECK_LED\r
+       toggles. */\r
+       if( ulErrorFound != pdFALSE )\r
+       {\r
+               if( lChangedTimerPeriodAlready == pdFALSE )\r
+               {\r
+                       lChangedTimerPeriodAlready = pdTRUE;\r
+\r
+                       /* This call to xTimerChangePeriod() uses a zero block time.\r
+                       Functions called from inside of a timer callback function must\r
+                       *never* attempt to block. */\r
+                       xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvFlashTimerCallback( xTimerHandle xTimer )\r
+{\r
+unsigned long ulLED;\r
+\r
+       /* This callback function is assigned to three separate software timers.\r
+       Each timer toggles a different LED.  Obtain the number of the LED that\r
+       this timer is toggling. */\r
+       ulLED = ( unsigned long ) pvTimerGetTimerID( xTimer );\r
+\r
+       /* Toggle the LED. */\r
+       vParTestToggleLED( ulLED );     \r
+}\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/main.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/main.c
new file mode 100644 (file)
index 0000000..08d2e4e
--- /dev/null
@@ -0,0 +1,223 @@
+/*\r
+    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that has become a de facto standard.             *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly and support the FreeRTOS         *\r
+     *    project by purchasing a FreeRTOS tutorial book, reference          *\r
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
+     *                                                                       *\r
+     *    Thank you!                                                         *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+    >>! a combined work that includes FreeRTOS without being obliged to provide\r
+    >>! the source code for proprietary components outside of the FreeRTOS\r
+    >>! kernel.\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    Having a problem?  Start by reading the FAQ "My application does   *\r
+     *    not run, what could be wrong?"                                     *\r
+     *                                                                       *\r
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+    license and Real Time Engineers Ltd. contact details.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+/******************************************************************************\r
+ * This project provides two demo applications.  A simple blinky style project,\r
+ * and a more comprehensive test and demo application.  The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting (defined in this file) is used to\r
+ * select between the two.  The simply blinky demo is implemented and described\r
+ * in main_blinky.c.  The more comprehensive test and demo application is\r
+ * implemented and described in main_full.c.\r
+ *\r
+ * This file implements the code that is not demo specific, including the\r
+ * hardware setup and FreeRTOS hook functions.  It also contains a dummy\r
+ * interrupt service routine called Dummy_IRQHandler() that is provided as an\r
+ * example of how to use interrupt safe FreeRTOS API functions (those that end\r
+ * in "FromISR").\r
+ *\r
+ *****************************************************************************/\r
+\r
+\r
+/* Standard includes. */\r
+#include "string.h"\r
+\r
+/* FreeRTOS includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Demo application include. */\r
+#include "ParTest.h"\r
+\r
+/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,\r
+or 0 to run the more comprehensive test and demo application. */\r
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY     1\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Perform any application specific hardware configuration.  The clocks,\r
+ * memory, etc. are configured before main() is called.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
+main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0. */\r
+extern void main_blinky( void );\r
+extern void main_full( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+int main( void )\r
+{\r
+       /* Prepare the hardware to run this demo. */\r
+       prvSetupHardware();\r
+\r
+       /* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top\r
+       of this file. */\r
+       #if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1\r
+       {\r
+               main_blinky();\r
+       }\r
+       #else\r
+       {\r
+               main_full();\r
+       }\r
+       #endif\r
+\r
+       return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupHardware( void )\r
+{\r
+       vParTestInitialise();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationMallocFailedHook( void )\r
+{\r
+       /* vApplicationMallocFailedHook() will only be called if\r
+       configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h.  It is a hook\r
+       function that will get called if a call to pvPortMalloc() fails.\r
+       pvPortMalloc() is called internally by the kernel whenever a task, queue,\r
+       timer or semaphore is created.  It is also called by various parts of the\r
+       demo application.  If heap_1.c or heap_2.c are used, then the size of the\r
+       heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in\r
+       FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used\r
+       to query the size of free heap space that remains (although it does not\r
+       provide information on how the remaining heap might be fragmented). */\r
+       taskDISABLE_INTERRUPTS();\r
+       for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationIdleHook( void )\r
+{\r
+       /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set\r
+       to 1 in FreeRTOSConfig.h.  It will be called on each iteration of the idle\r
+       task.  It is essential that code added to this hook function never attempts\r
+       to block in any way (for example, call xQueueReceive() with a block time\r
+       specified, or call vTaskDelay()).  If the application makes use of the\r
+       vTaskDelete() API function (as this demo application does) then it is also\r
+       important that vApplicationIdleHook() is permitted to return to its calling\r
+       function, because it is the responsibility of the idle task to clean up\r
+       memory allocated by the kernel to any task that has since been deleted. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName )\r
+{\r
+       ( void ) pcTaskName;\r
+       ( void ) pxTask;\r
+\r
+       /* Run time stack overflow checking is performed if\r
+       configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2.  This hook\r
+       function is called if a stack overflow is detected. */\r
+       taskDISABLE_INTERRUPTS();\r
+       for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationTickHook( void )\r
+{\r
+       /* This function will be called by each tick interrupt if\r
+       configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h.  User code can be\r
+       added here, but the tick hook is called from an interrupt context, so\r
+       code must not attempt to block, and only the interrupt safe FreeRTOS API\r
+       functions can be used (those that end in FromISR()). */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#ifdef JUST_AN_EXAMPLE_ISR\r
+\r
+void Dummy_IRQHandler(void)\r
+{\r
+long lHigherPriorityTaskWoken = pdFALSE;\r
+\r
+       /* Clear the interrupt if necessary. */\r
+       Dummy_ClearITPendingBit();\r
+\r
+       /* This interrupt does nothing more than demonstrate how to synchronise a\r
+       task with an interrupt.  A semaphore is used for this purpose.  Note\r
+       lHigherPriorityTaskWoken is initialised to zero. Only FreeRTOS API functions\r
+       that end in "FromISR" can be called from an ISR. */\r
+       xSemaphoreGiveFromISR( xTestSemaphore, &lHigherPriorityTaskWoken );\r
+\r
+       /* If there was a task that was blocked on the semaphore, and giving the\r
+       semaphore caused the task to unblock, and the unblocked task has a priority\r
+       higher than the current Running state task (the task that this interrupt\r
+       interrupted), then lHigherPriorityTaskWoken will have been set to pdTRUE\r
+       internally within xSemaphoreGiveFromISR().  Passing pdTRUE into the\r
+       portEND_SWITCHING_ISR() macro will result in a context switch being pended to\r
+       ensure this interrupt returns directly to the unblocked, higher priority,\r
+       task.  Passing pdFALSE into portEND_SWITCHING_ISR() has no effect. */\r
+       portEND_SWITCHING_ISR( lHigherPriorityTaskWoken );\r
+}\r
+\r
+#endif /* JUST_AN_EXAMPLE_ISR */\r
+\r
+\r
+\r
+\r
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/startup_XMC1300.s b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/startup_XMC1300.s
new file mode 100644 (file)
index 0000000..24c7cba
--- /dev/null
@@ -0,0 +1,397 @@
+;*****************************************************************************/\r
+; * @file     startup_XMC1300.s\r
+; * @brief    CMSIS Cortex-M4 Core Device Startup File for\r
+; *           Infineon XMC1300 Device Series\r
+; * @version  V1.00\r
+; * @date     21. Jan. 2013\r
+; *\r
+; * @note\r
+; * Copyright (C) 2009-2013 ARM Limited. All rights reserved.\r
+; *\r
+; * @par\r
+; * ARM Limited (ARM) is supplying this software for use with Cortex-M\r
+; * processor based microcontrollers.  This file can be freely distributed\r
+; * within development tools that are supporting such ARM based processors.\r
+; *\r
+; * @par\r
+; * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+; *\r
+; ******************************************************************************/\r
+\r
+\r
+;*  <<< Use Configuration Wizard in Context Menu >>>\r
+\r
+; Amount of memory (in bytes) allocated for Stack\r
+; Tailor this value to your application needs\r
+; <h> Stack Configuration\r
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
+; </h>\r
+\r
+Stack_Size      EQU     0x00000400\r
+\r
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3\r
+Stack_Mem       SPACE   Stack_Size\r
+__initial_sp\r
+\r
+\r
+; <h> Heap Configuration\r
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
+; </h>\r
+\r
+Heap_Size       EQU     0x00000200\r
+\r
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3\r
+__heap_base\r
+Heap_Mem        SPACE   Heap_Size\r
+__heap_limit\r
+\r
+; <h> Clock system handling by SSW\r
+;   <h> CLK_VAL1 Configuration\r
+;     <o0.0..7>    FDIV Fractional Divider Selection\r
+;     <o0.8..15>   IDIV Divider Selection\r
+;                     <0=> Divider is bypassed\r
+;                     <1=> MCLK = 32 MHz\r
+;                     <2=> MCLK = 16 MHz\r
+;                     <3=> MCLK = 10.67 MHz\r
+;                     <4=> MCLK = 8 MHz\r
+;                     <254=> MCLK = 126 kHz\r
+;                     <255=> MCLK = 125.5 kHz\r
+;     <o0.16>      PCLKSEL PCLK Clock Select\r
+;                     <0=> PCLK = MCLK\r
+;                     <1=> PCLK = 2 x MCLK\r
+;     <o0.17..19>  RTCCLKSEL RTC Clock Select\r
+;                     <0=> 32.768kHz standby clock\r
+;                     <1=> 32.768kHz external clock from ERU0.IOUT0\r
+;                     <2=> 32.768kHz external clock from ACMP0.OUT\r
+;                     <3=> 32.768kHz external clock from ACMP1.OUT\r
+;                     <4=> 32.768kHz external clock from ACMP2.OUT\r
+;                     <5=> Reserved\r
+;                     <6=> Reserved\r
+;                     <7=> Reserved\r
+;     <o0.31>      do not move CLK_VAL1 to SCU_CLKCR[0..19]\r
+;   </h>\r
+CLK_VAL1_Val    EQU     0x80000000      ; 0xF0000000\r
+\r
+;   <h> CLK_VAL2 Configuration\r
+;     <o0.0>    disable VADC and SHS Gating\r
+;     <o0.1>    disable CCU80 Gating\r
+;     <o0.2>    disable CCU40 Gating\r
+;     <o0.3>    disable USIC0 Gating\r
+;     <o0.4>    disable BCCU0 Gating\r
+;     <o0.5>    disable LEDTS0 Gating\r
+;     <o0.6>    disable LEDTS1 Gating\r
+;     <o0.7>    disable POSIF0 Gating\r
+;     <o0.8>    disable MATH Gating\r
+;     <o0.9>    disable WDT Gating\r
+;     <o0.10>   disable RTC Gating\r
+;     <o0.31>   do not move CLK_VAL2 to SCU_CGATCLR0[0..10]\r
+;   </h>\r
+CLK_VAL2_Val    EQU     0x80000000      ; 0xF0000000\r
+; </h>\r
+\r
+                PRESERVE8\r
+                THUMB\r
+\r
+;* ================== START OF VECTOR TABLE DEFINITION ====================== */\r
+;* Vector Table Mapped to Address 0 at Reset\r
+                AREA    RESET, DATA, READONLY\r
+                EXPORT  __Vectors\r
+                EXPORT  __Vectors_End\r
+                EXPORT  __Vectors_Size\r
+\r
+\r
+\r
+__Vectors\r
+    DCD   __initial_sp                ;* Top of Stack\r
+    DCD   Reset_Handler               ;* Reset Handler\r
+    DCD   0                           ;* Not used\r
+    DCD   0                           ;* Not Used\r
+    DCD   CLK_VAL1_Val                ;* CLK_VAL1\r
+    DCD   CLK_VAL2_Val                ;* CLK_VAL2\r
+__Vectors_End\r
+\r
+__Vectors_Size  EQU  __Vectors_End - __Vectors\r
+\r
+;* ================== END OF VECTOR TABLE DEFINITION ======================== */\r
+\r
+\r
+;* ================== START OF VECTOR ROUTINES ============================== */\r
+                AREA    |.text|, CODE, READONLY\r
+\r
+;* Reset Handler\r
+Reset_Handler    PROC\r
+                 EXPORT  Reset_Handler             [WEAK]\r
+        IMPORT  __main\r
+        IMPORT  SystemInit\r
+\r
+        ;* C routines are likely to be called. Setup the stack now\r
+        LDR     R0, =__initial_sp\r
+        MOV     SP, R0\r
+\r
+       ; Following code initializes the Veneers at address 0x20000000 with a "branch to itself"\r
+       ; The real veneers will be copied later from the scatter loader before reaching main.\r
+       ; This init code should handle an exception before the real veneers are copied.\r
+SRAM_BASE            EQU     0x20000000\r
+VENEER_INIT_CODE     EQU     0xE7FEBF00             ; NOP, B .\r
+\r
+        LDR     R1, =SRAM_BASE\r
+        LDR     R2, =VENEER_INIT_CODE                \r
+        MOVS    R0, #48                     ; Veneer 0..47\r
+Init_Veneers\r
+        STR     R2, [R1]\r
+        ADDS    R1, #4\r
+        SUBS    R0, R0, #1\r
+        BNE     Init_Veneers\r
+\r
+\r
+        LDR     R0, =SystemInit\r
+        BLX     R0\r
+\r
+\r
+        ; SystemInit_DAVE3() is provided by DAVE3 code generation engine. It is\r
+        ; weakly defined here though for a potential override.\r
+\r
+        LDR     R0, = SystemInit_DAVE3\r
+        BLX     R0\r
+\r
+\r
+        LDR     R0, =__main\r
+        BX      R0\r
+\r
+\r
+        ALIGN\r
+        ENDP\r
+\r
+;* ========================================================================== */\r
+\r
+\r
+\r
+;* ========== START OF EXCEPTION HANDLER DEFINITION ========================= */\r
+;* Default exception Handlers - Users may override this default functionality\r
+\r
+NMI_Handler     PROC\r
+                EXPORT  NMI_Handler                   [WEAK]\r
+                B       .\r
+                ENDP\r
+HardFault_Handler\\r
+                PROC\r
+                EXPORT  HardFault_Handler             [WEAK]\r
+                B       .\r
+                ENDP\r
+SVC_Handler\\r
+                PROC\r
+                EXPORT  SVC_Handler                   [WEAK]\r
+                B       .\r
+                ENDP\r
+PendSV_Handler\\r
+                PROC\r
+                EXPORT  PendSV_Handler                [WEAK]\r
+                B       .\r
+                ENDP\r
+SysTick_Handler\\r
+                PROC\r
+                EXPORT  SysTick_Handler               [WEAK]\r
+                B       .\r
+                ENDP\r
+\r
+;* ============= END OF EXCEPTION HANDLER DEFINITION ======================== */\r
+\r
+\r
+;* ============= START OF INTERRUPT HANDLER DEFINITION ====================== */\r
+;* IRQ Handlers\r
+\r
+Default_Handler PROC\r
+               EXPORT     SCU_0_IRQHandler            [WEAK]\r
+               EXPORT     SCU_1_IRQHandler            [WEAK]\r
+               EXPORT     SCU_2_IRQHandler            [WEAK]\r
+               EXPORT     ERU0_0_IRQHandler           [WEAK]\r
+               EXPORT     ERU0_1_IRQHandler           [WEAK]\r
+               EXPORT     ERU0_2_IRQHandler           [WEAK]\r
+               EXPORT     ERU0_3_IRQHandler           [WEAK]\r
+               EXPORT     MATH0_0_IRQHandler          [WEAK]\r
+               EXPORT     USIC0_0_IRQHandler          [WEAK]\r
+               EXPORT     USIC0_1_IRQHandler          [WEAK]\r
+               EXPORT     USIC0_2_IRQHandler          [WEAK]\r
+               EXPORT     USIC0_3_IRQHandler          [WEAK]\r
+               EXPORT     USIC0_4_IRQHandler          [WEAK]\r
+               EXPORT     USIC0_5_IRQHandler          [WEAK]\r
+               EXPORT     VADC0_C0_0_IRQHandler       [WEAK]\r
+               EXPORT     VADC0_C0_1_IRQHandler       [WEAK]\r
+               EXPORT     VADC0_G0_0_IRQHandler       [WEAK]\r
+               EXPORT     VADC0_G0_1_IRQHandler       [WEAK]\r
+               EXPORT     VADC0_G1_0_IRQHandler       [WEAK]\r
+               EXPORT     VADC0_G1_1_IRQHandler       [WEAK]\r
+               EXPORT     CCU40_0_IRQHandler          [WEAK]\r
+               EXPORT     CCU40_1_IRQHandler          [WEAK]\r
+               EXPORT     CCU40_2_IRQHandler          [WEAK]\r
+               EXPORT     CCU40_3_IRQHandler          [WEAK]\r
+               EXPORT     CCU80_0_IRQHandler          [WEAK]\r
+               EXPORT     CCU80_1_IRQHandler          [WEAK]\r
+               EXPORT     POSIF0_0_IRQHandler         [WEAK]\r
+               EXPORT     POSIF0_1_IRQHandler         [WEAK]\r
+               EXPORT     LEDTS0_0_IRQHandler         [WEAK]\r
+               EXPORT     LEDTS1_0_IRQHandler         [WEAK]\r
+               EXPORT     BCCU0_0_IRQHandler          [WEAK]\r
+\r
+SCU_0_IRQHandler\r
+SCU_1_IRQHandler\r
+SCU_2_IRQHandler\r
+ERU0_0_IRQHandler\r
+ERU0_1_IRQHandler\r
+ERU0_2_IRQHandler\r
+ERU0_3_IRQHandler\r
+MATH0_0_IRQHandler\r
+USIC0_0_IRQHandler\r
+USIC0_1_IRQHandler\r
+USIC0_2_IRQHandler\r
+USIC0_3_IRQHandler\r
+USIC0_4_IRQHandler\r
+USIC0_5_IRQHandler\r
+VADC0_C0_0_IRQHandler\r
+VADC0_C0_1_IRQHandler\r
+VADC0_G0_0_IRQHandler\r
+VADC0_G0_1_IRQHandler\r
+VADC0_G1_0_IRQHandler\r
+VADC0_G1_1_IRQHandler\r
+CCU40_0_IRQHandler\r
+CCU40_1_IRQHandler\r
+CCU40_2_IRQHandler\r
+CCU40_3_IRQHandler\r
+CCU80_0_IRQHandler\r
+CCU80_1_IRQHandler\r
+POSIF0_0_IRQHandler\r
+POSIF0_1_IRQHandler\r
+LEDTS0_0_IRQHandler\r
+LEDTS1_0_IRQHandler\r
+BCCU0_0_IRQHandler\r
+\r
+                B       .\r
+\r
+                ENDP\r
+\r
+                ALIGN\r
+\r
+;* ============= END OF INTERRUPT HANDLER DEFINITION ======================== */\r
+\r
+;*  Definition of the default weak SystemInit_DAVE3 function.\r
+;*  This function will be called by the CMSIS SystemInit function.\r
+;*  If DAVE3 requires an extended SystemInit it will create its own SystemInit_DAVE3\r
+;*  which will overule this weak definition\r
+SystemInit_DAVE3    PROC\r
+                  EXPORT  SystemInit_DAVE3             [WEAK]\r
+                  NOP\r
+                  BX LR\r
+        ENDP\r
+\r
+;*  Definition of the default weak DAVE3 function for clock App usage.\r
+;*  AllowClkInitByStartup Handler */\r
+AllowClkInitByStartup    PROC\r
+                  EXPORT  AllowClkInitByStartup        [WEAK]\r
+                  MOVS R0,#1\r
+                  BX LR\r
+        ENDP\r
+\r
+\r
+;*******************************************************************************\r
+; User Stack and Heap initialization\r
+;*******************************************************************************\r
+                 IF      :DEF:__MICROLIB\r
+\r
+                 EXPORT  __initial_sp\r
+                 EXPORT  __heap_base\r
+                 EXPORT  __heap_limit\r
+\r
+                 ELSE\r
+\r
+                 IMPORT  __use_two_region_memory\r
+                 EXPORT  __user_initial_stackheap\r
+\r
+__user_initial_stackheap\r
+\r
+                 LDR     R0, =  Heap_Mem\r
+                 LDR     R1, =(Stack_Mem + Stack_Size)\r
+                 LDR     R2, = (Heap_Mem +  Heap_Size)\r
+                 LDR     R3, = Stack_Mem\r
+                 BX      LR\r
+\r
+                 ALIGN\r
+\r
+                 ENDIF\r
+\r
+\r
+;* ================== START OF INTERRUPT HANDLER VENEERS ==================== */\r
+; Veneers are located to fix SRAM Address 0x2000'0000\r
+                AREA    |.ARM.__at_0x20000000|, CODE, READWRITE\r
+\r
+; Each Veneer has exactly a lengs of 4 Byte\r
+\r
+                MACRO\r
+                STAYHERE $IrqNumber\r
+                LDR  R0, =$IrqNumber\r
+                B    .\r
+                MEND\r
+\r
+                MACRO\r
+                JUMPTO $Handler\r
+                LDR  R0, =$Handler\r
+                BX   R0\r
+                MEND\r
+\r
+                STAYHERE 0x0                          ;* Reserved\r
+                STAYHERE 0x1                          ;* Reserved \r
+                STAYHERE 0x2                          ;* Reserved \r
+                JUMPTO   HardFault_Handler            ;* HardFault Veneer  \r
+                STAYHERE 0x4                          ;* Reserved \r
+                STAYHERE 0x5                          ;* Reserved \r
+                STAYHERE 0x6                          ;* Reserved \r
+                STAYHERE 0x7                          ;* Reserved \r
+                STAYHERE 0x8                          ;* Reserved \r
+                STAYHERE 0x9                          ;* Reserved \r
+                STAYHERE 0xA                          ;* Reserved\r
+                JUMPTO   SVC_Handler                  ;* SVC Veneer        \r
+                STAYHERE 0xC                          ;* Reserved\r
+                STAYHERE 0xD                          ;* Reserved\r
+                JUMPTO   PendSV_Handler               ;* PendSV Veneer     \r
+                JUMPTO   SysTick_Handler              ;* SysTick Veneer    \r
+                JUMPTO   SCU_0_IRQHandler             ;* SCU_0 Veneer      \r
+                JUMPTO   SCU_1_IRQHandler             ;* SCU_1 Veneer      \r
+                JUMPTO   SCU_2_IRQHandler             ;* SCU_2 Veneer      \r
+                JUMPTO   ERU0_0_IRQHandler            ;* SCU_3 Veneer      \r
+                JUMPTO   ERU0_1_IRQHandler            ;* SCU_4 Veneer      \r
+                JUMPTO   ERU0_2_IRQHandler            ;* SCU_5 Veneer      \r
+                JUMPTO   ERU0_3_IRQHandler            ;* SCU_6 Veneer      \r
+                JUMPTO   MATH0_0_IRQHandler           ;* SCU_7 Veneer      \r
+                STAYHERE 0x18                         ;* Reserved\r
+                JUMPTO   USIC0_0_IRQHandler           ;* USIC0_0 Veneer    \r
+                JUMPTO   USIC0_1_IRQHandler           ;* USIC0_1 Veneer    \r
+                JUMPTO   USIC0_2_IRQHandler           ;* USIC0_2 Veneer    \r
+                JUMPTO   USIC0_3_IRQHandler           ;* USIC0_3 Veneer    \r
+                JUMPTO   USIC0_4_IRQHandler           ;* USIC0_4 Veneer    \r
+                JUMPTO   LEDTS0_0_IRQHandler          ;* USIC0_5 Veneer    \r
+                JUMPTO   VADC0_C0_0_IRQHandler        ;* VADC0_C0_0 Veneer \r
+                JUMPTO   VADC0_C0_1_IRQHandler        ;* VADC0_C0_1 Veneer \r
+                JUMPTO   VADC0_G0_0_IRQHandler        ;* VADC0_G0_0 Veneer \r
+                JUMPTO   VADC0_G0_1_IRQHandler        ;* VADC0_G0_1 Veneer \r
+                JUMPTO   VADC0_G1_0_IRQHandler        ;* VADC0_G1_0 Veneer \r
+                JUMPTO   VADC0_G1_1_IRQHandler        ;* VADC0_G1_1 Veneer \r
+                JUMPTO   CCU40_0_IRQHandler           ;* CCU40_0 Veneer    \r
+                JUMPTO   CCU40_1_IRQHandler           ;* CCU40_1 Veneer    \r
+                JUMPTO   CCU40_2_IRQHandler           ;* CCU40_2 Veneer    \r
+                JUMPTO   CCU40_3_IRQHandler           ;* CCU40_3 Veneer    \r
+                JUMPTO   CCU80_0_IRQHandler           ;* CCU80_0 Veneer    \r
+                JUMPTO   CCU80_1_IRQHandler           ;* CCU80_1 Veneer    \r
+                JUMPTO   POSIF0_0_IRQHandler          ;* POSIF0_0 Veneer   \r
+                JUMPTO   POSIF0_1_IRQHandler          ;* POSIF0_1 Veneer   \r
+                JUMPTO   LEDTS0_0_IRQHandler          ;* LEDTS0_0 Veneer   \r
+                JUMPTO   LEDTS1_0_IRQHandler          ;* LEDTS1_0 Veneer   \r
+                JUMPTO   BCCU0_0_IRQHandler           ;* BCCU0_0 Veneer    \r
+\r
+                ALIGN\r
+\r
+;* ================== END OF INTERRUPT HANDLER VENEERS ====================== */\r
+\r
+                END\r
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/system_XMC1300.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/system_XMC1300.c
new file mode 100644 (file)
index 0000000..c83e3fe
--- /dev/null
@@ -0,0 +1,99 @@
+/******************************************************************************\r
+ * @file     system_XMC1300.c\r
+ * @brief    Device specific initialization for the XMC1300-Series according \r
+ * to CMSIS\r
+ * @version  V1.2\r
+ * @date     13 Dec 2012\r
+ *\r
+ * @note\r
+ * Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.\r
+\r
+ *\r
+ * @par\r
+ * Infineon Technologies AG (Infineon) is supplying this software for use with \r
+ * Infineon\92s microcontrollers.\r
+ *   \r
+ * This file can be freely distributed within development tools that are \r
+ * supporting such microcontrollers.\r
+ *  \r
+ *\r
+ * @par\r
+ * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+ * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,\r
+ * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+ *\r
+ ******************************************************************************/\r
+/*\r
+ * ************************** Change history *********************************\r
+ * V1.2, 13 Dec 2012, PKB, Created this table, Changed System_ to system_\r
+ */\r
+\r
+#include "system_XMC1300.h"\r
+#include <XMC1300.h>\r
+\r
+/*---------------------------------------------------------------------------\r
+ Extern definitions \r
+ *--------------------------------------------------------------------------*/\r
+extern uint32_t AllowClkInitByStartup(void);\r
+\r
+/*----------------------------------------------------------------------------\r
+  Clock Global defines\r
+ *----------------------------------------------------------------------------*/\r
+#define DCO_DCLK       64000000UL\r
+\r
+/*----------------------------------------------------------------------------\r
+  Clock Variable definitions\r
+ *----------------------------------------------------------------------------*/\r
+/*!< System Clock Frequency (Core Clock)*/\r
+uint32_t SystemCoreClock;\r
+\r
+\r
+/**\r
+  * @brief  Setup the microcontroller system.\r
+  * @param  None\r
+  * @retval None\r
+  */\r
+void SystemInit(void)\r
+{    \r
+  /*\r
+   * Clock tree setup by CMSIS routines is allowed only in the absence of DAVE\r
+   * Clock app.\r
+   */ \r
+  if(AllowClkInitByStartup()){ \r
+  /* Do not change default values of IDIV,FDIV and RTCCLKSEL */\r
+  /* ====== Default configuration ======= */\r
+  /*\r
+   * MCLK    = DCO_DCLK\r
+   * PCLK    = MCLK\r
+   * RTC CLK = Standby clock\r
+   */\r
+  }\r
+}\r
+\r
+/**\r
+  * @brief  Update SystemCoreClock according to Clock Register Values\r
+  * @note   -  \r
+  * @param  None\r
+  * @retval None\r
+  */\r
+void SystemCoreClockUpdate(void)\r
+{\r
+  uint32_t IDIV, CLKCR;\r
+\r
+  CLKCR = SCU_CLOCK -> CLKCR;\r
+  \r
+  IDIV = (CLKCR & SCU_CLOCK_CLKCR_IDIV_Msk) >> SCU_CLOCK_CLKCR_IDIV_Pos;\r
+  \r
+  if(IDIV)\r
+  {\r
+    SystemCoreClock = DCO_DCLK / (2 * IDIV );\r
+  }\r
+  else\r
+  {\r
+    /* Divider bypassed */\r
+    SystemCoreClock = DCO_DCLK;\r
+  }\r
+}\r
+\r