#define emacBUFFER_WAIT_ATTEMPTS ( 30 )\r
\r
/* The number of Rx descriptors. */\r
-#define emacNUM_RX_DESCRIPTORS 3\r
+#define emacNUM_RX_DESCRIPTORS 8\r
\r
/* The number of Tx descriptors. When using uIP there is not point in having\r
more than two. */\r
\r
/* The total number of times to wait emacTX_WAIT_DELAY_ms for the Tx descriptor to\r
become free. */\r
-#define emacTX_WAIT_ATTEMPTS ( 5 )\r
+#define emacTX_WAIT_ATTEMPTS ( 50 )\r
\r
/* Only Rx end and Tx end interrupts are used by this driver. */\r
#define emacTX_END_INTERRUPT ( 1UL << 21UL )\r
{\r
/* The descriptor contains a frame. Because of the size of the buffers\r
the frame should always be complete. */\r
- if( (xCurrentRxDesc->status & FP0) == FP0 )\r
+ if( ( xCurrentRxDesc->status & FP0 ) == FP0 )\r
{\r
ulReturn = xCurrentRxDesc->size;\r
}\r