aarch64: report the correct reason for halting after singlestep

Don't report breakpoint as debug reason when halt is due to a
single-step event.

Change-Id: Ie6c3ca1e5427c73eb726a038301b6a29a47d1217
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 8c085d58e5ff59d97a43451eaeeb5582272d34bb..b1534e3630be773fa565f71db6a03c0997de834f 100644 (file)
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -1246,7 +1246,7 @@ static int aarch64_step(struct target *target, int current, target_addr_t addres
 {
        struct armv8_common *armv8 = target_to_armv8(target);
        int retval;
-       uint32_t tmp;
+       uint32_t edecr;
 
        if (target->state != TARGET_HALTED) {
                LOG_WARNING("target not halted");
@@ -1254,25 +1254,26 @@ static int aarch64_step(struct target *target, int current, target_addr_t addres
        }
 
        retval = mem_ap_read_atomic_u32(armv8->debug_ap,
-                       armv8->debug_base + CPUV8_DBG_EDECR, &tmp);
+                       armv8->debug_base + CPUV8_DBG_EDECR, &edecr);
        if (retval != ERROR_OK)
                return retval;
 
+       /* make sure EDECR.SS is not set when restoring the register */
+       edecr &= ~0x4;
+
+       /* set EDECR.SS to enter hardware step mode */
        retval = mem_ap_write_atomic_u32(armv8->debug_ap,
-                       armv8->debug_base + CPUV8_DBG_EDECR, (tmp|0x4));
+                       armv8->debug_base + CPUV8_DBG_EDECR, (edecr|0x4));
        if (retval != ERROR_OK)
                return retval;
 
-       target->debug_reason = DBG_REASON_SINGLESTEP;
+       /* resume the target */
        retval = aarch64_resume(target, current, address, 0, 0);
        if (retval != ERROR_OK)
                return retval;
 
        long long then = timeval_ms();
        while (target->state != TARGET_HALTED) {
-               mem_ap_read_atomic_u32(armv8->debug_ap,
-                       armv8->debug_base + CPUV8_DBG_EDESR, &tmp);
-               LOG_DEBUG("DESR = %#x", tmp);
                retval = aarch64_poll(target);
                if (retval != ERROR_OK)
                        return retval;
@@ -1282,15 +1283,12 @@ static int aarch64_step(struct target *target, int current, target_addr_t addres
                }
        }
 
+       /* restore EDECR */
        retval = mem_ap_write_atomic_u32(armv8->debug_ap,
-                       armv8->debug_base + CPUV8_DBG_EDECR, (tmp&(~0x4)));
+                       armv8->debug_base + CPUV8_DBG_EDECR, edecr);
        if (retval != ERROR_OK)
                return retval;
 
-       target_call_event_callbacks(target, TARGET_EVENT_HALTED);
-       if (target->state == TARGET_HALTED)
-               LOG_DEBUG("target stepped");
-
        return ERROR_OK;
 }
 

diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 493ccca7ed774df76b0032e10745a889d837af7a..08b1a204eacfe96d444dd9f4cba39ffea792c89b 100644 (file)
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -874,11 +874,14 @@ void armv8_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dscr)
                        target->debug_reason = DBG_REASON_DBGRQ;
                        break;
                case DSCRV8_ENTRY_HALT_STEP_EXECLU:     /* HALT step */
+               case DSCRV8_ENTRY_HALT_STEP_NORMAL: /* Halt step*/
+               case DSCRV8_ENTRY_HALT_STEP:
+                       target->debug_reason = DBG_REASON_SINGLESTEP;
+                       break;
                case DSCRV8_ENTRY_BKPT: /* SW BKPT */
                case DSCRV8_ENTRY_RESET_CATCH:  /* Reset catch */
                case DSCRV8_ENTRY_OS_UNLOCK:  /*OS unlock catch*/
                case DSCRV8_ENTRY_EXCEPTION_CATCH:  /*exception catch*/
-               case DSCRV8_ENTRY_HALT_STEP_NORMAL: /* Halt step*/
                case DSCRV8_ENTRY_SW_ACCESS_DBG: /*SW access dbg register*/
                        target->debug_reason = DBG_REASON_BREAKPOINT;
                        break;