New demo being added - work in progress.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@587 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Source/portable/IAR/AtmelSAM9XE/ISR_Support.h b/Source/portable/IAR/AtmelSAM9XE/ISR_Support.h
new file mode 100644 (file)
index 0000000..4a32f39
--- /dev/null
+++ b/Source/portable/IAR/AtmelSAM9XE/ISR_Support.h
@@ -0,0 +1,78 @@
+       EXTERN pxCurrentTCB\r
+       EXTERN ulCriticalNesting\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+; Context save and restore macro definitions\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+\r
+portSAVE_CONTEXT MACRO\r
+\r
+       ; Push R0 as we are going to use the register.                                  \r
+       STMDB   SP!, {R0}\r
+\r
+       ; Set R0 to point to the task stack pointer.                                    \r
+       STMDB   SP, {SP}^\r
+       NOP\r
+       SUB             SP, SP, #4\r
+       LDMIA   SP!, {R0}\r
+\r
+       ; Push the return address onto the stack.                                               \r
+       STMDB   R0!, {LR}\r
+\r
+       ; Now we have saved LR we can use it instead of R0.                             \r
+       MOV             LR, R0\r
+\r
+       ; Pop R0 so we can save it onto the system mode stack.                  \r
+       LDMIA   SP!, {R0}\r
+\r
+       ; Push all the system mode registers onto the task stack.               \r
+       STMDB   LR, {R0-LR}^\r
+       NOP\r
+       SUB             LR, LR, #60\r
+\r
+       ; Push the SPSR onto the task stack.                                                    \r
+       MRS             R0, SPSR\r
+       STMDB   LR!, {R0}\r
+\r
+       LDR             R0, =ulCriticalNesting \r
+       LDR             R0, [R0]\r
+       STMDB   LR!, {R0}\r
+\r
+       ; Store the new top of stack for the task.                                              \r
+       LDR             R1, =pxCurrentTCB\r
+       LDR             R0, [R1]\r
+       STR             LR, [R0]\r
+\r
+       ENDM\r
+\r
+\r
+portRESTORE_CONTEXT MACRO\r
+\r
+       ; Set the LR to the task stack.                                                                         \r
+       LDR             R1, =pxCurrentTCB\r
+       LDR             R0, [R1]\r
+       LDR             LR, [R0]\r
+\r
+       ; The critical nesting depth is the first item on the stack.    \r
+       ; Load it into the ulCriticalNesting variable.                                  \r
+       LDR             R0, =ulCriticalNesting\r
+       LDMFD   LR!, {R1}\r
+       STR             R1, [R0]\r
+\r
+       ; Get the SPSR from the stack.                                                                  \r
+       LDMFD   LR!, {R0}\r
+       MSR             SPSR_cxsf, R0\r
+\r
+       ; Restore all system mode registers for the task.                               \r
+       LDMFD   LR, {R0-R14}^\r
+       NOP\r
+\r
+       ; Restore the return address.                                                                   \r
+       LDR             LR, [LR, #+60]\r
+\r
+       ; And return - correcting the offset in the LR to obtain the    \r
+       ; correct address.                                                                                              \r
+       SUBS    PC, LR, #4\r
+\r
+       ENDM\r
+\r

diff --git a/Source/portable/IAR/AtmelSAM9XE/port.c b/Source/portable/IAR/AtmelSAM9XE/port.c
new file mode 100644 (file)
index 0000000..0004c97
--- /dev/null
+++ b/Source/portable/IAR/AtmelSAM9XE/port.c
@@ -0,0 +1,280 @@
+/*\r
+       FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
+    * and even write all or part of your application on your behalf.          *\r
+    * See http://www.OpenRTOS.com for details of the services we provide to   *\r
+    * expedite your project.                                                  *\r
+    *                                                                         *\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+\r
+       Please ensure to read the configuration and relevant port sections of the\r
+       online documentation.\r
+\r
+       http://www.FreeRTOS.org - Documentation, latest information, license and\r
+       contact details.\r
+\r
+       http://www.SafeRTOS.com - A version that is certified for use in safety\r
+       critical systems.\r
+\r
+       http://www.OpenRTOS.com - Commercial support, development, porting,\r
+       licensing and training services.\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Implementation of functions defined in portable.h for the Atmel ARM7 port.\r
+ *----------------------------------------------------------*/\r
+\r
+\r
+/* Standard includes. */\r
+#include <stdlib.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Hardware includes. */\r
+#include <board.h>\r
+#include <pio/pio.h>\r
+#include <pio/pio_it.h>\r
+#include <pit/pit.h>\r
+#include <aic/aic.h>\r
+#include <tc/tc.h>\r
+#include <utility/led.h>\r
+#include <utility/trace.h>\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Constants required to setup the initial stack. */\r
+#define portINITIAL_SPSR                               ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */\r
+#define portINSTRUCTION_SIZE                   ( ( portSTACK_TYPE ) 4 )\r
+\r
+/* Constants required to setup the PIT. */\r
+#define port1MHz_IN_Hz                                         ( 1000000ul )\r
+#define port1SECOND_IN_uS                              ( 1000000ul )\r
+\r
+/* Constants required to handle critical sections. */\r
+#define portNO_CRITICAL_NESTING                ( ( unsigned portLONG ) 0 )\r
+\r
+\r
+#define portINT_LEVEL_SENSITIVE  0\r
+#define portPIT_ENABLE         ( ( unsigned portSHORT ) 0x1 << 24 )\r
+#define portPIT_INT_ENABLE             ( ( unsigned portSHORT ) 0x1 << 25 )\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Setup the PIT to generate the tick interrupts. */\r
+static void prvSetupTimerInterrupt( void );\r
+\r
+/* ulCriticalNesting will get set to zero when the first task starts.  It\r
+cannot be initialised to 0 as this will cause interrupts to be enabled\r
+during the kernel initialisation process. */\r
+unsigned portLONG ulCriticalNesting = ( unsigned portLONG ) 9999;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Initialise the stack of a task to look exactly as if a call to\r
+ * portSAVE_CONTEXT had been called.\r
+ *\r
+ * See header file for description.\r
+ */\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+portSTACK_TYPE *pxOriginalTOS;\r
+\r
+       pxOriginalTOS = pxTopOfStack;\r
+\r
+       /* Setup the initial stack of the task.  The stack is set exactly as\r
+       expected by the portRESTORE_CONTEXT() macro. */\r
+\r
+       /* First on the stack is the return address - which in this case is the\r
+       start of the task.  The offset is added to make the return address appear\r
+       as it would within an IRQ ISR. */\r
+       *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;               \r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa;  /* R14 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+       pxTopOfStack--;\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212;  /* R12 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111;  /* R11 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010;  /* R10 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909;  /* R9 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808;  /* R8 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707;  /* R7 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606;  /* R6 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505;  /* R5 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404;  /* R4 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303;  /* R3 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202;  /* R2 */\r
+       pxTopOfStack--; \r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101;  /* R1 */\r
+       pxTopOfStack--; \r
+\r
+       /* When the task starts is will expect to find the function parameter in\r
+       R0. */\r
+       *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+       pxTopOfStack--;\r
+\r
+       /* The status register is set for system mode, with interrupts enabled. */\r
+       *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+       pxTopOfStack--;\r
+\r
+       /* Interrupt flags cannot always be stored on the stack and will\r
+       instead be stored in a variable, which is then saved as part of the\r
+       tasks context. */\r
+       *pxTopOfStack = portNO_CRITICAL_NESTING;\r
+\r
+       return pxTopOfStack;    \r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+extern void vPortStartFirstTask( void );\r
+\r
+       /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
+       here already. */\r
+       prvSetupTimerInterrupt();\r
+\r
+       /* Start the first task. */\r
+       vPortStartFirstTask();  \r
+\r
+       /* Should not get here! */\r
+       return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+       /* It is unlikely that the ARM port will require this function as there\r
+       is nothing to return to.  */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configUSE_PREEMPTION == 0\r
+\r
+       /* The cooperative scheduler requires a normal IRQ service routine to\r
+       simply increment the system tick. */\r
+       static __arm __irq void vPortNonPreemptiveTick( void );\r
+       static __arm __irq void vPortNonPreemptiveTick( void )\r
+       {\r
+               unsigned portLONG ulDummy;\r
+               \r
+               /* Increment the tick count - which may wake some tasks but as the\r
+               preemptive scheduler is not being used any woken task is not given\r
+               processor time no matter what its priority. */\r
+               vTaskIncrementTick();\r
+               \r
+               /* Clear the PIT interrupt. */\r
+               ulDummy = AT91C_BASE_PITC->PITC_PIVR;\r
+               \r
+               /* End the interrupt in the AIC. */\r
+               AT91C_BASE_AIC->AIC_EOICR = ulDummy;\r
+       }\r
+\r
+#else\r
+\r
+       /* Currently the IAR port requires the preemptive tick function to be\r
+       defined in an asm file. */\r
+\r
+#endif\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupTimerInterrupt( void )\r
+{\r
+const unsigned portLONG ulPeriodIn_uS = ( 1 / configTICK_RATE_HZ ) * port1SECOND_IN_uS;\r
+\r
+       /* Setup the PIT for the required frequency. */\r
+       PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );\r
+       \r
+       /* Setup the PIT interrupt. */\r
+       AIC_DisableIT( AT91C_ID_SYS );\r
+\r
+       #if configUSE_PREEMPTION == 0   \r
+               AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortNonPreemptiveTick );\r
+       #else\r
+               extern void ( vPortPreemptiveTick )( void );\r
+               AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortPreemptiveTick );           \r
+       #endif\r
+\r
+       AIC_EnableIT( AT91C_ID_SYS );\r
+       PIT_EnableIT();\r
+       \r
+       /* Enable the PIT itself. */\r
+       PIT_Enable();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEnterCritical( void )\r
+{\r
+       /* Disable interrupts first! */\r
+       __disable_irq();\r
+\r
+       /* Now interrupts are disabled ulCriticalNesting can be accessed\r
+       directly.  Increment ulCriticalNesting to keep a count of how many times\r
+       portENTER_CRITICAL() has been called. */\r
+       ulCriticalNesting++;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortExitCritical( void )\r
+{\r
+       if( ulCriticalNesting > portNO_CRITICAL_NESTING )\r
+       {\r
+               /* Decrement the nesting count as we are leaving a critical section. */\r
+               ulCriticalNesting--;\r
+\r
+               /* If the nesting level has reached zero then interrupts should be\r
+               re-enabled. */\r
+               if( ulCriticalNesting == portNO_CRITICAL_NESTING )\r
+               {\r
+                       __enable_irq();\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+\r
+\r
+\r
+\r

diff --git a/Source/portable/IAR/AtmelSAM9XE/portasm.s79 b/Source/portable/IAR/AtmelSAM9XE/portasm.s79
new file mode 100644 (file)
index 0000000..da118fb
--- /dev/null
+++ b/Source/portable/IAR/AtmelSAM9XE/portasm.s79
@@ -0,0 +1,58 @@
+               RSEG ICODE:CODE\r
+               CODE32\r
+\r
+       EXTERN vTaskSwitchContext\r
+       EXTERN vTaskIncrementTick\r
+\r
+       PUBLIC vPortYieldProcessor\r
+       PUBLIC vPortPreemptiveTick\r
+       PUBLIC vPortStartFirstTask\r
+\r
+#include "ISR_Support.h"\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+; Starting the first task is just a matter of restoring the context that\r
+; was created by pxPortInitialiseStack().\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+vPortStartFirstTask:\r
+       portRESTORE_CONTEXT\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+; Manual context switch function.  This is the SWI hander.\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+vPortYieldProcessor:\r
+       ADD             LR, LR, #4                      ; Add 4 to the LR to make the LR appear exactly\r
+                                                               ; as if the context was saved during and IRQ\r
+                                                               ; handler.\r
+                                                               \r
+       portSAVE_CONTEXT                        ; Save the context of the current task...\r
+       LDR R0, =vTaskSwitchContext     ; before selecting the next task to execute.\r
+       mov     lr, pc\r
+       BX R0\r
+       portRESTORE_CONTEXT                     ; Restore the context of the selected task.\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+; Preemptive context switch function.  This will only ever get installed if\r
+; portUSE_PREEMPTION is set to 1 in portmacro.h.\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+vPortPreemptiveTick:\r
+       portSAVE_CONTEXT                        ; Save the context of the current task.\r
+\r
+       LDR R0, =vTaskIncrementTick ; Increment the tick count - this may wake a task.\r
+       mov lr, pc\r
+       BX R0\r
+       LDR R0, =vTaskSwitchContext ; Select the next task to execute.\r
+       mov lr, pc\r
+       BX R0\r
+#if 0\r
+       LDR     R14, =AT91C_BASE_PITC   ; Clear the PIT interrupt\r
+       LDR     R0, [R14, #PITC_PIVR ]\r
+\r
+       LDR R14, =AT91C_BASE_AIC        ; Mark the End of Interrupt on the AIC\r
+    STR        R14, [R14, #AIC_EOICR]\r
+#endif\r
+       portRESTORE_CONTEXT                     ; Restore the context of the selected task.\r
+\r
+\r
+       END\r
+\r

diff --git a/Source/portable/IAR/AtmelSAM9XE/portmacro.h b/Source/portable/IAR/AtmelSAM9XE/portmacro.h
new file mode 100644 (file)
index 0000000..089ad8e
--- /dev/null
+++ b/Source/portable/IAR/AtmelSAM9XE/portmacro.h
@@ -0,0 +1,131 @@
+/*\r
+       FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
+    * and even write all or part of your application on your behalf.          *\r
+    * See http://www.OpenRTOS.com for details of the services we provide to   *\r
+    * expedite your project.                                                  *\r
+    *                                                                         *\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+\r
+       Please ensure to read the configuration and relevant port sections of the\r
+       online documentation.\r
+\r
+       http://www.FreeRTOS.org - Documentation, latest information, license and\r
+       contact details.\r
+\r
+       http://www.SafeRTOS.com - A version that is certified for use in safety\r
+       critical systems.\r
+\r
+       http://www.OpenRTOS.com - Commercial support, development, porting,\r
+       licensing and training services.\r
+*/\r
+\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#include <intrinsics.h>\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions.\r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR               char\r
+#define portFLOAT              float\r
+#define portDOUBLE             double\r
+#define portLONG               long\r
+#define portSHORT              short\r
+#define portSTACK_TYPE unsigned portLONG\r
+#define portBASE_TYPE  portLONG\r
+\r
+#if( configUSE_16_BIT_TICKS == 1 )\r
+       typedef unsigned portSHORT portTickType;\r
+       #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+       typedef unsigned portLONG portTickType;\r
+       #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/        \r
+\r
+/* Hardware specifics. */\r
+#define portSTACK_GROWTH                       ( -1 )\r
+#define portTICK_RATE_MS                       ( ( portTickType ) 1000 / configTICK_RATE_HZ )          \r
+#define portBYTE_ALIGNMENT                     8\r
+#define portYIELD()                                    asm ( "SWI 0" )\r
+#define portNOP()                                      asm ( "NOP" )\r
+/*-----------------------------------------------------------*/        \r
+\r
+/* Critical section handling. */\r
+__arm __interwork void vPortDisableInterruptsFromThumb( void );\r
+__arm __interwork void vPortEnableInterruptsFromThumb( void );\r
+__arm __interwork void vPortEnterCritical( void );\r
+__arm __interwork void vPortExitCritical( void );\r
+\r
+#define portDISABLE_INTERRUPTS()       __disable_irq()\r
+#define portENABLE_INTERRUPTS()                __enable_irq()\r
+#define portENTER_CRITICAL()           vPortEnterCritical()\r
+#define portEXIT_CRITICAL()                    vPortExitCritical()\r
+/*-----------------------------------------------------------*/        \r
+\r
+/* Task utilities. */\r
+#define portEND_SWITCHING_ISR( xSwitchRequired )       \\r
+{                                                                                                      \\r
+extern void vTaskSwitchContext( void );                                \\r
+                                                                                                       \\r
+       if( xSwitchRequired )                                                   \\r
+       {                                                                                               \\r
+               vTaskSwitchContext();                                           \\r
+       }                                                                                               \\r
+}\r
+/*-----------------------------------------------------------*/        \r
+\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
+\r