]> git.sur5r.net Git - openocd/commitdiff
ETM: start cleaning up ETM_CTRL bit handling
authorDavid Brownell <dbrownell@users.sourceforge.net>
Sat, 19 Dec 2009 21:07:25 +0000 (13:07 -0800)
committerDavid Brownell <dbrownell@users.sourceforge.net>
Sat, 19 Dec 2009 21:07:25 +0000 (13:07 -0800)
Provide better comments for the ETM_CTRL bits; use the correct bit
for half/full clock mode; and define a few more of the bits available
from the earliest ETM versions.

The new bit defintions use ETM_CTRL_* names to match their register
(instead of ETM_PORT_* or ETMV1_*).  For clarity, and better matching
to docs, they are defined with bitshifting not pre-computed masks.

Stop abusing typdefs for ETM_CTRL values; such values are not limited
to the enumerated set of individual bit values.

Rename etm->portmode to etm->control ... and start morphing it into a
single generic shadow of ETM_CTRL.  Eventually etm->tracemode should
vanish, so we can just write etm->control to ETM_CTRL.

Restore an "if" that somehow got dropped.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
src/target/etb.c
src/target/etm.c
src/target/etm.h

index a789777baa64e8f6bce650f3e124b78746c7c160..fb2dd60995de25bb98ba887b6d67f414ce7b5c83 100644 (file)
@@ -579,9 +579,9 @@ static int etb_read_trace(struct etm_context *etm_ctx)
                free(etm_ctx->trace_data);
        }
 
-       if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
+       if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
                etm_ctx->trace_depth = num_frames * 3;
-       else if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
+       else if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
                etm_ctx->trace_depth = num_frames * 2;
        else
                etm_ctx->trace_depth = num_frames;
@@ -590,7 +590,7 @@ static int etb_read_trace(struct etm_context *etm_ctx)
 
        for (i = 0, j = 0; i < num_frames; i++)
        {
-               if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
+               if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
                {
                        /* trace word j */
                        etm_ctx->trace_data[j].pipestat = trace_data[i] & 0x7;
@@ -636,7 +636,7 @@ static int etb_read_trace(struct etm_context *etm_ctx)
 
                        j += 3;
                }
-               else if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
+               else if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
                {
                        /* trace word j */
                        etm_ctx->trace_data[j].pipestat = trace_data[i] & 0x7;
@@ -699,9 +699,9 @@ static int etb_start_capture(struct etm_context *etm_ctx)
        uint32_t etb_ctrl_value = 0x1;
        uint32_t trigger_count;
 
-       if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_DEMUXED)
+       if ((etm_ctx->control & ETM_PORT_MODE_MASK) == ETM_PORT_DEMUXED)
        {
-               if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) != ETM_PORT_8BIT)
+               if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) != ETM_PORT_8BIT)
                {
                        LOG_ERROR("ETB can't run in demultiplexed mode with a 4 or 16 bit port");
                        return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
@@ -709,7 +709,7 @@ static int etb_start_capture(struct etm_context *etm_ctx)
                etb_ctrl_value |= 0x2;
        }
 
-       if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) {
+       if ((etm_ctx->control & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) {
                LOG_ERROR("ETB: can't run in multiplexed mode");
                return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
        }
index fff94949470d74bfada734c0424233a11dd1b86f..aaa02197a4ee466ad4351deb79948883b34fb10e 100644 (file)
@@ -435,10 +435,10 @@ int etm_setup(struct target *target)
 
        /* initialize some ETM control register settings */
        etm_get_reg(etm_ctrl_reg);
-       etm_ctrl_value = buf_get_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size);
+       etm_ctrl_value = buf_get_u32(etm_ctrl_reg->value, 0, 32);
 
        /* clear the ETM powerdown bit (0) */
-       etm_ctrl_value &= ~0x1;
+       etm_ctrl_value &= ~ETM_CTRL_POWERDOWN;
 
        /* configure port width (21,6:4), mode (13,17:16) and
         * for older modules clocking (13)
@@ -447,9 +447,9 @@ int etm_setup(struct target *target)
                        & ~ETM_PORT_WIDTH_MASK
                        & ~ETM_PORT_MODE_MASK
                        & ~ETM_PORT_CLOCK_MASK)
-               | etm_ctx->portmode;
+               | etm_ctx->control;
 
-       buf_set_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size, etm_ctrl_value);
+       buf_set_u32(etm_ctrl_reg->value, 0, 32, etm_ctrl_value);
        etm_store_reg(etm_ctrl_reg);
 
        if ((retval = jtag_execute_queue()) != ERROR_OK)
@@ -727,7 +727,8 @@ static int etmv1_next_packet(struct etm_context *ctx, uint8_t *packet, int apo)
                        continue;
                }
 
-               if ((ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_16BIT)
+               /* FIXME there are more port widths than these... */
+               if ((ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_16BIT)
                {
                        if (ctx->data_half == 0)
                        {
@@ -741,7 +742,7 @@ static int etmv1_next_packet(struct etm_context *ctx, uint8_t *packet, int apo)
                                ctx->data_index++;
                        }
                }
-               else if ((ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
+               else if ((ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
                {
                        *packet = ctx->trace_data[ctx->data_index].packet & 0xff;
                        ctx->data_index++;
@@ -1171,9 +1172,9 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_context *
 }
 
 static COMMAND_HELPER(handle_etm_tracemode_command_update,
-               etmv1_tracemode_t *mode)
+               uint32_t *mode)
 {
-       etmv1_tracemode_t tracemode;
+       uint32_t tracemode;
 
        /* what parts of data access are traced? */
        if (strcmp(CMD_ARGV[0], "none") == 0)
@@ -1218,6 +1219,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
 
        bool etmv1_branch_output;
        COMMAND_PARSE_ENABLE(CMD_ARGV[3], etmv1_branch_output);
+       if (etmv1_branch_output)
                tracemode |= ETMV1_BRANCH_OUTPUT;
 
        /* IGNORED:
@@ -1247,7 +1249,7 @@ COMMAND_HANDLER(handle_etm_tracemode_command)
                return ERROR_FAIL;
        }
 
-       etmv1_tracemode_t tracemode = etm->tracemode;
+       uint32_t tracemode = etm->tracemode;
 
        switch (CMD_ARGC)
        {
@@ -1356,7 +1358,7 @@ COMMAND_HANDLER(handle_etm_config_command)
 {
        struct target *target;
        struct arm *arm;
-       etm_portmode_t portmode = 0x0;
+       uint32_t portmode = 0x0;
        struct etm_context *etm_ctx;
        int i;
 
@@ -1495,7 +1497,7 @@ COMMAND_HANDLER(handle_etm_config_command)
 
        etm_ctx->target = target;
        etm_ctx->trace_data = NULL;
-       etm_ctx->portmode = portmode;
+       etm_ctx->control = portmode;
        etm_ctx->core_state = ARM_STATE_ARM;
 
        arm->etm = etm_ctx;
@@ -1822,7 +1824,7 @@ COMMAND_HANDLER(handle_etm_dump_command)
        }
 
        fileio_write_u32(&file, etm_ctx->capture_status);
-       fileio_write_u32(&file, etm_ctx->portmode);
+       fileio_write_u32(&file, etm_ctx->control);
        fileio_write_u32(&file, etm_ctx->tracemode);
        fileio_write_u32(&file, etm_ctx->trace_depth);
 
@@ -1894,7 +1896,7 @@ COMMAND_HANDLER(handle_etm_load_command)
        {
          uint32_t tmp;
          fileio_read_u32(&file, &tmp); etm_ctx->capture_status = tmp;
-         fileio_read_u32(&file, &tmp); etm_ctx->portmode = tmp;
+         fileio_read_u32(&file, &tmp); etm_ctx->control = tmp;
          fileio_read_u32(&file, &tmp); etm_ctx->tracemode = tmp;
          fileio_read_u32(&file, &etm_ctx->trace_depth);
        }
index 78a5996ca974db7fc9e8639193b3261590682403..e4d468528d584379c8315e27893927314db8bb2c 100644 (file)
@@ -78,9 +78,20 @@ struct etm_reg
        struct arm_jtag *jtag_info;
 };
 
-typedef enum
+/* Subset of ETM_CTRL bit assignments.  Many of these
+ * control the configuration of trace output, which
+ * hooks up either to ETB or to an external device.
+ *
+ * NOTE that these have evolved since the ~v1.3 defns ...
+ */
+enum
 {
-       /* Port width */
+       ETM_CTRL_POWERDOWN      = (1 << 0),
+       ETM_CTRL_MONITOR_CPRT   = (1 << 1),
+
+       // bits 3:2 == trace type (ETMV1_TRACE_* << 2)
+
+       /* Port width (bits 21 and 6:4) */
        ETM_PORT_4BIT           = 0x00,
        ETM_PORT_8BIT           = 0x10,
        ETM_PORT_16BIT          = 0x20,
@@ -91,18 +102,32 @@ typedef enum
        ETM_PORT_1BIT           = 0x00 | (1 << 21),
        ETM_PORT_2BIT           = 0x10 | (1 << 21),
        ETM_PORT_WIDTH_MASK     = 0x70 | (1 << 21),
-       /* Port modes */
-       ETM_PORT_NORMAL    = 0x00000,
-       ETM_PORT_MUXED     = 0x10000,
-       ETM_PORT_DEMUXED   = 0x20000,
-       ETM_PORT_MODE_MASK = 0x30000,
-       /* Clocking modes */
-       ETM_PORT_FULL_CLOCK = 0x0000,
-       ETM_PORT_HALF_CLOCK = 0x1000,
-       ETM_PORT_CLOCK_MASK = 0x1000,
-} etm_portmode_t;
 
-typedef enum
+       ETM_CTRL_FIFOFULL_STALL = (1 << 7),
+       ETM_CTRL_BRANCH_OUTPUT  = (1 << 8),
+       ETM_CTRL_DBGRQ          = (1 << 9),
+       ETM_CTRL_ETM_PROG       = (1 << 10),
+       ETM_CTRL_ETMEN          = (1 << 11),
+       ETM_CTRL_CYCLE_ACCURATE = (1 << 12),
+
+       /* Clocking modes -- up to v2.1, bit 13 */
+       ETM_PORT_FULL_CLOCK     = (0 << 13),
+       ETM_PORT_HALF_CLOCK     = (1 << 13),
+       ETM_PORT_CLOCK_MASK     = (1 << 13),
+
+       // bits 15:14 == context ID size used in tracing
+       // ETMV1_CONTEXTID_* << 8
+
+       /* Port modes -- bits 17:16, tied to clocking mode */
+       ETM_PORT_NORMAL         = (0 << 16),
+       ETM_PORT_MUXED          = (1 << 16),
+       ETM_PORT_DEMUXED        = (2 << 16),
+       ETM_PORT_MODE_MASK      = (3 << 16),
+
+       // bits 31:18 defined in v3.0 and later (e.g. ARM11+)
+};
+
+enum
 {
        /* Data trace */
        ETMV1_TRACE_NONE         = 0x00,
@@ -118,7 +143,7 @@ typedef enum
        /* Misc */
        ETMV1_CYCLE_ACCURATE = 0x100,
        ETMV1_BRANCH_OUTPUT = 0x200
-} etmv1_tracemode_t;
+};
 
 /* forward-declare ETM context */
 struct etm_context;
@@ -161,8 +186,8 @@ struct etm_context
        trace_status_t capture_status;  /* current state of capture run */
        struct etmv1_trace_data *trace_data;    /* trace data */
        uint32_t trace_depth;           /* number of cycles to be analyzed, 0 if no data available */
-       etm_portmode_t portmode;        /* normal, multiplexed or demultiplexed */
-       etmv1_tracemode_t tracemode;    /* type of info trace contains */
+       uint32_t control;       /* shadow of ETM_CTRL */
+       uint32_t tracemode;     /* type of info trace contains */
        int /*arm_state*/ core_state;   /* current core state */
        struct image *image;            /* source for target opcodes */
        uint32_t pipe_index;            /* current trace cycle */