Update the Keil and IAR CM0 port layers to match the changes made to the GCC version.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2072 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
index 7af19599ea56bfcfc7c6b292e7437306ef95c188..0f99dd5f9d2f5d1426be30b2bf1202fb67c92f2d 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
@@ -161,7 +161,7 @@ static void prvTaskExitError( void )
 \r
 void vPortSVCHandler( void )\r
 {\r
-       /* This function is no longer used, but returned for backward\r
+       /* This function is no longer used, but retained for backward\r
        compatibility. */\r
 }\r
 /*-----------------------------------------------------------*/\r

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s
index 02b6f143545d55208c4a5abf97b996fb1bca7fca..1448df91298ae9c79593442c106d66b821fce56f 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s
@@ -1,5 +1,5 @@
 /*\r
-    FreeRTOS V7.5.3 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+    FreeRTOS V7.5.3 - Copyright (C) 2013 Real Time Engineers Ltd.\r
     All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
@@ -127,24 +127,9 @@ xPortPendSVHandler:
 /*-----------------------------------------------------------*/\r
 \r
 vPortSVCHandler;\r
-       ldr     r3, =pxCurrentTCB       /* Restore the context. */\r
-       ldr r1, [r3]                    /* Get the pxCurrentTCB address. */\r
-       ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
-       adds r0, r0, #16                /* Move to the high registers. */\r
-       ldmia r0!, {r4-r7}              /* Pop the high registers. */\r
-       mov r8, r4\r
-       mov r9, r5\r
-       mov r10, r6\r
-       mov r11, r7\r
-\r
-       msr psp, r0                             /* Remember the new top of stack for the task. */\r
-\r
-       subs r0, r0, #32                /* Go back for the low registers that are not automatically restored. */\r
-       ldmia r0!, {r4-r7}              /* Pop low registers.  */\r
-       mov r1, r14                             /* OR R14 with 0x0d. */\r
-       movs r0, #0x0d\r
-       orrs r1, r0\r
-       bx r1\r
+       /* This function is no longer used, but retained for backward\r
+       compatibility. */\r
+       bx lr\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
@@ -152,9 +137,18 @@ vPortStartFirstTask
        /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector\r
        table offset register that can be used to locate the initial stack value.\r
        Not all M0 parts have the application vector table at address 0. */\r
-       cpsie i                                 /* Globally enable interrupts. */\r
-       svc 0                                   /* System call to start first task. */\r
-       nop\r
+\r
+       ldr     r3, =pxCurrentTCB       /* Obtain location of pxCurrentTCB. */\r
+       ldr r1, [r3]\r
+       ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
+       adds r0, #32                    /* Discard everything up to r0. */\r
+       msr psp, r0                             /* This is now the new top of stack to use in the task. */\r
+       movs r0, #2                             /* Switch to the psp stack. */\r
+       msr CONTROL, r0\r
+       pop {r0-r5}                             /* Pop the registers that are saved automatically. */\r
+       mov lr, r5                              /* lr is now in r5. */\r
+       cpsie i                                 /* The first task has its context and interrupts can be enabled. */\r
+       pop {pc}                                /* Finally, pop the PC to jump to the user defined task code. */\r
 \r
 /*-----------------------------------------------------------*/\r
 \r

diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
index e7994cbf91440f373ec2a903f736a0af3a62311d..fa16e83b8b85fc3b3dcdf26b6aa113915e377cc1 100644 (file)
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
@@ -153,43 +153,35 @@ static void prvTaskExitError( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-__asm void vPortSVCHandler( void )\r
+void vPortSVCHandler( void )\r
 {\r
-       extern pxCurrentTCB;\r
-\r
-       PRESERVE8\r
-\r
-       ldr     r3, =pxCurrentTCB       /* Obtain location of pxCurrentTCB. */\r
-       ldr r1, [r3]                    \r
-       ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
-       adds r0, #16                    /* Pop the high registers. */\r
-       ldmia r0!, {r4-r7}              \r
-       mov r8, r4\r
-       mov r9, r5\r
-       mov r10, r6\r
-       mov r11, r7\r
-\r
-       msr psp, r0                             /* Remember the new top of stack for the task. */\r
-\r
-       subs r0, #32                    /* Go back for the low registers that are not automatically restored. */\r
-       ldmia r0!, {r4-r7}      /* Pop low registers.  */\r
-       mov r1, r14                             /* OR R14 with 0x0d. */\r
-       movs r0, #0x0d\r
-       orrs r1, r0\r
-       bx r1\r
-       ALIGN\r
+       /* This function is no longer used, but retained for backward \r
+       compatibility. */\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
 __asm void prvPortStartFirstTask( void )\r
 {\r
+       extern pxCurrentTCB;\r
+       \r
        PRESERVE8\r
        \r
        /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector\r
        table offset register that can be used to locate the initial stack value.\r
        Not all M0 parts have the application vector table at address 0. */\r
-       cpsie i                         /* Globally enable interrupts. */\r
-       svc 0                           /* System call to start first task. */\r
+       \r
+       ldr     r3, =pxCurrentTCB       /* Obtain location of pxCurrentTCB. */\r
+       ldr r1, [r3]                    \r
+       ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
+       adds r0, #32                    /* Discard everything up to r0. */\r
+       msr psp, r0                             /* This is now the new top of stack to use in the task. */\r
+       movs r0, #2                             /* Switch to the psp stack. */\r
+       msr CONTROL, r0\r
+       pop {r0-r5}                             /* Pop the registers that are saved automatically. */\r
+       mov lr, r5                              /* lr is now in r5. */\r
+       cpsie i                                 /* The first task has its context and interrupts can be enabled. */\r
+       pop {pc}                                /* Finally, pop the PC to jump to the user defined task code. */\r
+\r
        ALIGN\r
 }\r
 /*-----------------------------------------------------------*/\r