#include "lpc3180_nand_controller.h"
#include "nand.h"
-static int lpc3180_reset(struct nand_device_s *device);
-static int lpc3180_controller_ready(struct nand_device_s *device, int timeout);
+static int lpc3180_reset(struct nand_device_s *nand);
+static int lpc3180_controller_ready(struct nand_device_s *nand, int timeout);
/* nand device lpc3180 <target#> <oscillator_frequency>
*/
-static int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device)
+static int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *nand)
{
if (argc < 3)
{
lpc3180_nand_controller_t *lpc3180_info;
lpc3180_info = malloc(sizeof(lpc3180_nand_controller_t));
- device->controller_priv = lpc3180_info;
+ nand->controller_priv = lpc3180_info;
lpc3180_info->target = target;
lpc3180_info->osc_freq = osc_freq;
return cycle;
}
-static int lpc3180_init(struct nand_device_s *device)
+static int lpc3180_init(struct nand_device_s *nand)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
- int bus_width = (device->bus_width) ? (device->bus_width) : 8;
- int address_cycles = (device->address_cycles) ? (device->address_cycles) : 3;
- int page_size = (device->page_size) ? (device->page_size) : 512;
+ int bus_width = nand->bus_width ? : 8;
+ int address_cycles = nand->address_cycles ? : 3;
+ int page_size = nand->page_size ? : 512;
if (target->state != TARGET_HALTED)
{
}
/* inform calling code about selected bus width */
- device->bus_width = bus_width;
+ nand->bus_width = bus_width;
if ((address_cycles != 3) && (address_cycles != 4))
{
((trp & 0xf) << 8) | ((treh & 0xf) << 12) | ((trhz & 0x7) << 16) |
((trbwb & 0x1f) << 19) | ((tcea & 0x3) << 24));
- lpc3180_reset(device);
+ lpc3180_reset(nand);
}
else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
((r_width & 0xf) << 8) | ((r_rdy & 0xf) << 12) | ((w_setup & 0xf) << 16) |
((w_hold & 0xf) << 20) | ((w_width & 0xf) << 24) | ((w_rdy & 0xf) << 28));
- lpc3180_reset(device);
+ lpc3180_reset(nand);
}
return ERROR_OK;
}
-static int lpc3180_reset(struct nand_device_s *device)
+static int lpc3180_reset(struct nand_device_s *nand)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
/* MLC_CMD = 0xff (reset controller and NAND device) */
target_write_u32(target, 0x200b8000, 0xff);
- if (!lpc3180_controller_ready(device, 100))
+ if (!lpc3180_controller_ready(nand, 100))
{
LOG_ERROR("LPC3180 NAND controller timed out after reset");
return ERROR_NAND_OPERATION_TIMEOUT;
/* SLC_CTRL = 0x6 (ECC_CLEAR, SW_RESET) */
target_write_u32(target, 0x20020010, 0x6);
- if (!lpc3180_controller_ready(device, 100))
+ if (!lpc3180_controller_ready(nand, 100))
{
LOG_ERROR("LPC3180 NAND controller timed out after reset");
return ERROR_NAND_OPERATION_TIMEOUT;
return ERROR_OK;
}
-static int lpc3180_command(struct nand_device_s *device, uint8_t command)
+static int lpc3180_command(struct nand_device_s *nand, uint8_t command)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
return ERROR_OK;
}
-static int lpc3180_address(struct nand_device_s *device, uint8_t address)
+static int lpc3180_address(struct nand_device_s *nand, uint8_t address)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
return ERROR_OK;
}
-static int lpc3180_write_data(struct nand_device_s *device, uint16_t data)
+static int lpc3180_write_data(struct nand_device_s *nand, uint16_t data)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
return ERROR_OK;
}
-static int lpc3180_read_data(struct nand_device_s *device, void *data)
+static int lpc3180_read_data(struct nand_device_s *nand, void *data)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
{
/* data = MLC_DATA, use sized access */
- if (device->bus_width == 8)
+ if (nand->bus_width == 8)
{
uint8_t *data8 = data;
target_read_u8(target, 0x200b0000, data8);
}
- else if (device->bus_width == 16)
+ else if (nand->bus_width == 16)
{
uint16_t *data16 = data;
target_read_u16(target, 0x200b0000, data16);
/* data = SLC_DATA, must use 32-bit access */
target_read_u32(target, 0x20020000, &data32);
- if (device->bus_width == 8)
+ if (nand->bus_width == 8)
{
uint8_t *data8 = data;
*data8 = data32 & 0xff;
}
- else if (device->bus_width == 16)
+ else if (nand->bus_width == 16)
{
uint16_t *data16 = data;
*data16 = data32 & 0xffff;
return ERROR_OK;
}
-static int lpc3180_write_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+static int lpc3180_write_page(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
int retval;
uint8_t status;
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
- if (data_size > (uint32_t)device->page_size)
+ if (data_size > (uint32_t)nand->page_size)
{
LOG_ERROR("data size exceeds page size");
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
page_buffer = malloc(512);
oob_buffer = malloc(6);
- if (device->page_size == 512)
+ if (nand->page_size == 512)
{
/* MLC_ADDR = 0x0 (one column cycle) */
target_write_u32(target, 0x200b8004, 0x0);
target_write_u32(target, 0x200b8004, page & 0xff);
target_write_u32(target, 0x200b8004, (page >> 8) & 0xff);
- if (device->address_cycles == 4)
+ if (nand->address_cycles == 4)
target_write_u32(target, 0x200b8004, (page >> 16) & 0xff);
}
else
/* when using the MLC controller, we have to treat a large page device
* as being made out of four quarters, each the size of a small page device
*/
- num_quarters = (device->page_size == 2048) ? 4 : 1;
+ num_quarters = (nand->page_size == 2048) ? 4 : 1;
for (quarter = 0; quarter < num_quarters; quarter++)
{
data += thisrun_data_size;
}
- memset(oob_buffer, 0xff, (device->page_size == 512) ? 6 : 24);
+ memset(oob_buffer, 0xff, (nand->page_size == 512) ? 6 : 24);
if (oob)
{
memcpy(page_buffer, oob, thisrun_oob_size);
/* write MLC_ECC_AUTO_ENC_REG to start auto encode */
target_write_u32(target, 0x200b8010, 0x0);
- if (!lpc3180_controller_ready(device, 1000))
+ if (!lpc3180_controller_ready(nand, 1000))
{
LOG_ERROR("timeout while waiting for completion of auto encode cycle");
return ERROR_NAND_OPERATION_FAILED;
/* MLC_CMD = auto program command */
target_write_u32(target, 0x200b8000, NAND_CMD_PAGEPROG);
- if ((retval = nand_read_status(device, &status)) != ERROR_OK)
+ if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
{
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
- return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
+ return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
}
return ERROR_OK;
}
-static int lpc3180_read_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+static int lpc3180_read_page(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
}
#endif
- if (data_size > (uint32_t)device->page_size)
+ if (data_size > (uint32_t)nand->page_size)
{
LOG_ERROR("data size exceeds page size");
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
- if (device->page_size == 2048)
+ if (nand->page_size == 2048)
{
page_buffer = malloc(2048);
oob_buffer = malloc(64);
target_write_u32(target, 0x200b8000, NAND_CMD_READ0);
}
- if (device->page_size == 512)
+ if (nand->page_size == 512)
{
/* small page device */
/* MLC_ADDR = 0x0 (one column cycle) */
target_write_u32(target, 0x200b8004, page & 0xff);
target_write_u32(target, 0x200b8004, (page >> 8) & 0xff);
- if (device->address_cycles == 4)
+ if (nand->address_cycles == 4)
target_write_u32(target, 0x200b8004, (page >> 16) & 0xff);
}
else
target_write_u32(target, 0x200b8000, NAND_CMD_READSTART);
}
- while (page_bytes_done < (uint32_t)device->page_size)
+ while (page_bytes_done < (uint32_t)nand->page_size)
{
/* MLC_ECC_AUTO_DEC_REG = dummy */
target_write_u32(target, 0x200b8014, 0xaa55aa55);
- if (!lpc3180_controller_ready(device, 1000))
+ if (!lpc3180_controller_ready(nand, 1000))
{
LOG_ERROR("timeout while waiting for completion of auto decode cycle");
return ERROR_NAND_OPERATION_FAILED;
}
else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
- return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
+ return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
}
return ERROR_OK;
}
-static int lpc3180_controller_ready(struct nand_device_s *device, int timeout)
+static int lpc3180_controller_ready(struct nand_device_s *nand, int timeout)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
uint8_t status = 0x0;
return 0;
}
-static int lpc3180_nand_ready(struct nand_device_s *device, int timeout)
+static int lpc3180_nand_ready(struct nand_device_s *nand, int timeout)
{
- lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
+ lpc3180_nand_controller_t *lpc3180_info = nand->controller_priv;
target_t *target = lpc3180_info->target;
if (target->state != TARGET_HALTED)
unsigned num;
COMMAND_PARSE_NUMBER(uint, args[1], num);
- nand_device_t *device = get_nand_device_by_num(num);
- if (!device)
+ nand_device_t *nand = get_nand_device_by_num(num);
+ if (!nand)
{
command_print(cmd_ctx, "nand device '#%s' is out of bounds", args[0]);
return ERROR_OK;
}
- lpc3180_info = device->controller_priv;
+ lpc3180_info = nand->controller_priv;
if (argc == 2)
{
static int test_iomux_settings (target_t * target, uint32_t value,
uint32_t mask, const char *text);
-static int initialize_nf_controller (struct nand_device_s *device);
+static int initialize_nf_controller (struct nand_device_s *nand);
static int get_next_byte_from_sram_buffer (target_t * target, uint8_t * value);
static int get_next_halfword_from_sram_buffer (target_t * target,
uint16_t * value);
static int poll_for_complete_op (target_t * target, const char *text);
-static int validate_target_state (struct nand_device_s *device);
-static int do_data_output (struct nand_device_s *device);
+static int validate_target_state (struct nand_device_s *nand);
+static int do_data_output (struct nand_device_s *nand);
-static int imx31_command (struct nand_device_s *device, uint8_t command);
-static int imx31_address (struct nand_device_s *device, uint8_t address);
-static int imx31_controller_ready (struct nand_device_s *device, int tout);
+static int imx31_command (struct nand_device_s *nand, uint8_t command);
+static int imx31_address (struct nand_device_s *nand, uint8_t address);
+static int imx31_controller_ready (struct nand_device_s *nand, int tout);
static int imx31_nand_device_command (struct command_context_s *cmd_ctx,
char *cmd, char **args, int argc,
- struct nand_device_s *device)
+ struct nand_device_s *nand)
{
mx3_nf_controller_t *mx3_nf_info;
mx3_nf_info = malloc (sizeof (mx3_nf_controller_t));
return ERROR_FAIL;
}
- device->controller_priv = mx3_nf_info;
+ nand->controller_priv = mx3_nf_info;
mx3_nf_info->target = get_target (args[1]);
if (mx3_nf_info->target == NULL)
return ERROR_OK;
}
-static int imx31_init (struct nand_device_s *device)
+static int imx31_init (struct nand_device_s *nand)
{
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
{
* validate target state
*/
int validate_target_result;
- validate_target_result = validate_target_state (device);
+ validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
{
return validate_target_result;
{
uint32_t pcsr_register_content;
target_read_u32 (target, MX3_PCSR, &pcsr_register_content);
- if (!device->bus_width)
+ if (!nand->bus_width)
{
- device->bus_width =
+ nand->bus_width =
(pcsr_register_content & 0x80000000) ? 16 : 8;
}
else
{
pcsr_register_content |=
- ((device->bus_width == 16) ? 0x80000000 : 0x00000000);
+ ((nand->bus_width == 16) ? 0x80000000 : 0x00000000);
target_write_u32 (target, MX3_PCSR, pcsr_register_content);
}
- if (!device->page_size)
+ if (!nand->page_size)
{
- device->page_size =
+ nand->page_size =
(pcsr_register_content & 0x40000000) ? 2048 : 512;
}
else
{
pcsr_register_content |=
- ((device->page_size == 2048) ? 0x40000000 : 0x00000000);
+ ((nand->page_size == 2048) ? 0x40000000 : 0x00000000);
target_write_u32 (target, MX3_PCSR, pcsr_register_content);
}
- if (mx3_nf_info->flags.one_kb_sram && (device->page_size == 2048))
+ if (mx3_nf_info->flags.one_kb_sram && (nand->page_size == 2048))
{
LOG_ERROR
("NAND controller have only 1 kb SRAM, so pagesize 2048 is incompatible with it");
test_iomux_settings (target, 0x43fac0c4, 0x7f7f7f7f, "d3,d4,d5,d6");
test_iomux |=
test_iomux_settings (target, 0x43fac0c8, 0x0000007f, "d7");
- if (device->bus_width == 16)
+ if (nand->bus_width == 16)
{
test_iomux |=
test_iomux_settings (target, 0x43fac0c8, 0x7f7f7f00,
}
}
- initialize_nf_controller (device);
+ initialize_nf_controller (nand);
{
int retval;
uint16_t nand_status_content;
retval = ERROR_OK;
- retval |= imx31_command (device, NAND_CMD_STATUS);
- retval |= imx31_address (device, 0x00);
- retval |= do_data_output (device);
+ retval |= imx31_command (nand, NAND_CMD_STATUS);
+ retval |= imx31_address (nand, 0x00);
+ retval |= do_data_output (nand);
if (retval != ERROR_OK)
{
LOG_ERROR (get_status_register_err_msg);
return ERROR_OK;
}
-static int imx31_read_data (struct nand_device_s *device, void *data)
+static int imx31_read_data (struct nand_device_s *nand, void *data)
{
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
{
/*
* validate target state
*/
int validate_target_result;
- validate_target_result = validate_target_state (device);
+ validate_target_result = validate_target_state (nand);
if (validate_target_result != ERROR_OK)
{
return validate_target_result;
* get data from nand chip
*/
int try_data_output_from_nand_chip;
- try_data_output_from_nand_chip = do_data_output (device);
+ try_data_output_from_nand_chip = do_data_output (nand);
if (try_data_output_from_nand_chip != ERROR_OK)
{
return try_data_output_from_nand_chip;
}
}
- if (device->bus_width == 16)
+ if (nand->bus_width == 16)
{
get_next_halfword_from_sram_buffer (target, data);
}
return ERROR_OK;
}
-static int imx31_write_data (struct nand_device_s *device, uint16_t data)
+static int imx31_write_data (struct nand_device_s *nand, uint16_t data)
{
LOG_ERROR ("write_data() not implemented");
return ERROR_NAND_OPERATION_FAILED;
}
-static int imx31_nand_ready (struct nand_device_s *device, int timeout)
+static int imx31_nand_ready (struct nand_device_s *nand, int timeout)
{
- return imx31_controller_ready (device, timeout);
+ return imx31_controller_ready (nand, timeout);
}
static int imx31_register_commands (struct command_context_s *cmd_ctx)
return ERROR_OK;
}
-static int imx31_reset (struct nand_device_s *device)
+static int imx31_reset (struct nand_device_s *nand)
{
/*
* validate target state
*/
int validate_target_result;
- validate_target_result = validate_target_state (device);
+ validate_target_result = validate_target_state (nand);
if (validate_target_result != ERROR_OK)
{
return validate_target_result;
}
- initialize_nf_controller (device);
+ initialize_nf_controller (nand);
return ERROR_OK;
}
-static int imx31_command (struct nand_device_s *device, uint8_t command)
+static int imx31_command (struct nand_device_s *nand, uint8_t command)
{
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
{
/*
* validate target state
*/
int validate_target_result;
- validate_target_result = validate_target_state (device);
+ validate_target_result = validate_target_state (nand);
if (validate_target_result != ERROR_OK)
{
return validate_target_result;
* offset == one half of page size
*/
in_sram_address =
- MX3_NF_MAIN_BUFFER0 + (device->page_size >> 1);
+ MX3_NF_MAIN_BUFFER0 + (nand->page_size >> 1);
default:
in_sram_address = MX3_NF_MAIN_BUFFER0;
}
return ERROR_OK;
}
-static int imx31_address (struct nand_device_s *device, uint8_t address)
+static int imx31_address (struct nand_device_s *nand, uint8_t address)
{
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
{
/*
* validate target state
*/
int validate_target_result;
- validate_target_result = validate_target_state (device);
+ validate_target_result = validate_target_state (nand);
if (validate_target_result != ERROR_OK)
{
return validate_target_result;
return ERROR_OK;
}
-static int imx31_controller_ready (struct nand_device_s *device, int tout)
+static int imx31_controller_ready (struct nand_device_s *nand, int tout)
{
uint16_t poll_complete_status;
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
{
* validate target state
*/
int validate_target_result;
- validate_target_result = validate_target_state (device);
+ validate_target_result = validate_target_state (nand);
if (validate_target_result != ERROR_OK)
{
return validate_target_result;
return tout;
}
-static int imx31_write_page (struct nand_device_s *device, uint32_t page,
+static int imx31_write_page (struct nand_device_s *nand, uint32_t page,
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
if (data_size % 2)
* validate target state
*/
int retval;
- retval = validate_target_state (device);
+ retval = validate_target_state (nand);
if (retval != ERROR_OK)
{
return retval;
}
{
int retval = ERROR_OK;
- retval |= imx31_command (device, NAND_CMD_SEQIN);
- retval |= imx31_address (device, 0x00);
- retval |= imx31_address (device, page & 0xff);
- retval |= imx31_address (device, (page >> 8) & 0xff);
- if (device->address_cycles >= 4)
- {
- retval |= imx31_address (device, (page >> 16) & 0xff);
- if (device->address_cycles >= 5)
+ retval |= imx31_command(nand, NAND_CMD_SEQIN);
+ retval |= imx31_address(nand, 0x00);
+ retval |= imx31_address(nand, page & 0xff);
+ retval |= imx31_address(nand, (page >> 8) & 0xff);
+ if (nand->address_cycles >= 4)
+ {
+ retval |= imx31_address (nand, (page >> 16) & 0xff);
+ if (nand->address_cycles >= 5)
{
- retval |= imx31_address (device, (page >> 24) & 0xff);
+ retval |= imx31_address (nand, (page >> 24) & 0xff);
}
}
target_write_buffer (target, MX3_NF_MAIN_BUFFER0, data_size, data);
return poll_result;
}
}
- retval |= imx31_command (device, NAND_CMD_PAGEPROG);
+ retval |= imx31_command (nand, NAND_CMD_PAGEPROG);
if (retval != ERROR_OK)
{
return retval;
{
uint16_t nand_status_content;
retval = ERROR_OK;
- retval |= imx31_command (device, NAND_CMD_STATUS);
- retval |= imx31_address (device, 0x00);
- retval |= do_data_output (device);
+ retval |= imx31_command(nand, NAND_CMD_STATUS);
+ retval |= imx31_address(nand, 0x00);
+ retval |= do_data_output(nand);
if (retval != ERROR_OK)
{
LOG_ERROR (get_status_register_err_msg);
return ERROR_OK;
}
-static int imx31_read_page (struct nand_device_s *device, uint32_t page,
+static int imx31_read_page (struct nand_device_s *nand, uint32_t page,
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
if (data_size % 2)
* validate target state
*/
int retval;
- retval = validate_target_state (device);
+ retval = validate_target_state(nand);
if (retval != ERROR_OK)
{
return retval;
}
{
int retval = ERROR_OK;
- retval |= imx31_command (device, NAND_CMD_READ0);
- retval |= imx31_address (device, 0x00);
- retval |= imx31_address (device, page & 0xff);
- retval |= imx31_address (device, (page >> 8) & 0xff);
- if (device->address_cycles >= 4)
- {
- retval |= imx31_address (device, (page >> 16) & 0xff);
- if (device->address_cycles >= 5)
+ retval |= imx31_command(nand, NAND_CMD_READ0);
+ retval |= imx31_address(nand, 0x00);
+ retval |= imx31_address(nand, page & 0xff);
+ retval |= imx31_address(nand, (page >> 8) & 0xff);
+ if (nand->address_cycles >= 4)
+ {
+ retval |= imx31_address(nand, (page >> 16) & 0xff);
+ if (nand->address_cycles >= 5)
{
- retval |= imx31_address (device, (page >> 24) & 0xff);
- retval |= imx31_command (device, NAND_CMD_READSTART);
+ retval |= imx31_address(nand, (page >> 24) & 0xff);
+ retval |= imx31_command(nand, NAND_CMD_READSTART);
}
}
- retval |= do_data_output (device);
+ retval |= do_data_output (nand);
if (retval != ERROR_OK)
{
return retval;
return ERROR_OK;
}
-static int initialize_nf_controller (struct nand_device_s *device)
+static int initialize_nf_controller (struct nand_device_s *nand)
{
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
/*
* resets NAND flash controller in zero time ? I dont know.
return ERROR_OK;
}
-static int validate_target_state (struct nand_device_s *device)
+static int validate_target_state (struct nand_device_s *nand)
{
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
if (target->state != TARGET_HALTED)
return ERROR_OK;
}
-static int do_data_output (struct nand_device_s *device)
+static int do_data_output (struct nand_device_s *nand)
{
- mx3_nf_controller_t *mx3_nf_info = device->controller_priv;
+ mx3_nf_controller_t *mx3_nf_info = nand->controller_priv;
target_t *target = mx3_nf_info->target;
switch (mx3_nf_info->fin)
{
#include "time_support.h"
#include "fileio.h"
-static int nand_read_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
-//static int nand_read_plain(struct nand_device_s *device, uint32_t address, uint8_t *data, uint32_t data_size);
+static int nand_read_page(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
+//static int nand_read_plain(struct nand_device_s *nand, uint32_t address, uint8_t *data, uint32_t data_size);
-static int nand_write_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
+static int nand_write_page(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
/* NAND flash controller
*/
}
int nand_command_get_device_by_num(struct command_context_s *cmd_ctx,
- const char *str, nand_device_t **device)
+ const char *str, nand_device_t **nand)
{
unsigned num;
COMMAND_PARSE_NUMBER(uint, str, num);
- *device = get_nand_device_by_num(num);
- if (!*device) {
+ *nand = get_nand_device_by_num(num);
+ if (!*nand) {
command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", str);
return ERROR_INVALID_ARGUMENTS;
}
return ERROR_OK;
}
-static int nand_build_bbt(struct nand_device_s *device, int first, int last)
+static int nand_build_bbt(struct nand_device_s *nand, int first, int last)
{
uint32_t page = 0x0;
int i;
uint8_t oob[6];
- if ((first < 0) || (first >= device->num_blocks))
+ if ((first < 0) || (first >= nand->num_blocks))
first = 0;
- if ((last >= device->num_blocks) || (last == -1))
- last = device->num_blocks - 1;
+ if ((last >= nand->num_blocks) || (last == -1))
+ last = nand->num_blocks - 1;
for (i = first; i < last; i++)
{
- nand_read_page(device, page, NULL, 0, oob, 6);
+ nand_read_page(nand, page, NULL, 0, oob, 6);
- if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
- || (((device->page_size == 512) && (oob[5] != 0xff)) ||
- ((device->page_size == 2048) && (oob[0] != 0xff))))
+ if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
+ || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
+ ((nand->page_size == 2048) && (oob[0] != 0xff))))
{
LOG_WARNING("bad block: %i", i);
- device->blocks[i].is_bad = 1;
+ nand->blocks[i].is_bad = 1;
}
else
{
- device->blocks[i].is_bad = 0;
+ nand->blocks[i].is_bad = 0;
}
- page += (device->erase_size / device->page_size);
+ page += (nand->erase_size / nand->page_size);
}
return ERROR_OK;
}
-int nand_read_status(struct nand_device_s *device, uint8_t *status)
+int nand_read_status(struct nand_device_s *nand, uint8_t *status)
{
- if (!device->device)
+ if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
/* Send read status command */
- device->controller->command(device, NAND_CMD_STATUS);
+ nand->controller->command(nand, NAND_CMD_STATUS);
alive_sleep(1);
/* read status */
- if (device->device->options & NAND_BUSWIDTH_16)
+ if (nand->device->options & NAND_BUSWIDTH_16)
{
uint16_t data;
- device->controller->read_data(device, &data);
+ nand->controller->read_data(nand, &data);
*status = data & 0xff;
}
else
{
- device->controller->read_data(device, status);
+ nand->controller->read_data(nand, status);
}
return ERROR_OK;
}
-static int nand_poll_ready(struct nand_device_s *device, int timeout)
+static int nand_poll_ready(struct nand_device_s *nand, int timeout)
{
uint8_t status;
- device->controller->command(device, NAND_CMD_STATUS);
+ nand->controller->command(nand, NAND_CMD_STATUS);
do {
- if (device->device->options & NAND_BUSWIDTH_16) {
+ if (nand->device->options & NAND_BUSWIDTH_16) {
uint16_t data;
- device->controller->read_data(device, &data);
+ nand->controller->read_data(nand, &data);
status = data & 0xff;
} else {
- device->controller->read_data(device, &status);
+ nand->controller->read_data(nand, &status);
}
if (status & NAND_STATUS_READY)
break;
return (status & NAND_STATUS_READY) != 0;
}
-int nand_probe(struct nand_device_s *device)
+int nand_probe(struct nand_device_s *nand)
{
uint8_t manufacturer_id, device_id;
uint8_t id_buff[6];
int i;
/* clear device data */
- device->device = NULL;
- device->manufacturer = NULL;
+ nand->device = NULL;
+ nand->manufacturer = NULL;
/* clear device parameters */
- device->bus_width = 0;
- device->address_cycles = 0;
- device->page_size = 0;
- device->erase_size = 0;
+ nand->bus_width = 0;
+ nand->address_cycles = 0;
+ nand->page_size = 0;
+ nand->erase_size = 0;
/* initialize controller (device parameters are zero, use controller default) */
- if ((retval = device->controller->init(device) != ERROR_OK))
+ if ((retval = nand->controller->init(nand) != ERROR_OK))
{
switch (retval)
{
}
}
- device->controller->command(device, NAND_CMD_RESET);
- device->controller->reset(device);
+ nand->controller->command(nand, NAND_CMD_RESET);
+ nand->controller->reset(nand);
- device->controller->command(device, NAND_CMD_READID);
- device->controller->address(device, 0x0);
+ nand->controller->command(nand, NAND_CMD_READID);
+ nand->controller->address(nand, 0x0);
- if (device->bus_width == 8)
+ if (nand->bus_width == 8)
{
- device->controller->read_data(device, &manufacturer_id);
- device->controller->read_data(device, &device_id);
+ nand->controller->read_data(nand, &manufacturer_id);
+ nand->controller->read_data(nand, &device_id);
}
else
{
uint16_t data_buf;
- device->controller->read_data(device, &data_buf);
+ nand->controller->read_data(nand, &data_buf);
manufacturer_id = data_buf & 0xff;
- device->controller->read_data(device, &data_buf);
+ nand->controller->read_data(nand, &data_buf);
device_id = data_buf & 0xff;
}
{
if (nand_flash_ids[i].id == device_id)
{
- device->device = &nand_flash_ids[i];
+ nand->device = &nand_flash_ids[i];
break;
}
}
{
if (nand_manuf_ids[i].id == manufacturer_id)
{
- device->manufacturer = &nand_manuf_ids[i];
+ nand->manufacturer = &nand_manuf_ids[i];
break;
}
}
- if (!device->manufacturer)
+ if (!nand->manufacturer)
{
- device->manufacturer = &nand_manuf_ids[0];
- device->manufacturer->id = manufacturer_id;
+ nand->manufacturer = &nand_manuf_ids[0];
+ nand->manufacturer->id = manufacturer_id;
}
- if (!device->device)
+ if (!nand->device)
{
LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
manufacturer_id, device_id);
return ERROR_NAND_OPERATION_FAILED;
}
- LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
+ LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
/* initialize device parameters */
/* bus width */
- if (device->device->options & NAND_BUSWIDTH_16)
- device->bus_width = 16;
+ if (nand->device->options & NAND_BUSWIDTH_16)
+ nand->bus_width = 16;
else
- device->bus_width = 8;
+ nand->bus_width = 8;
/* Do we need extended device probe information? */
- if (device->device->page_size == 0 ||
- device->device->erase_size == 0)
+ if (nand->device->page_size == 0 ||
+ nand->device->erase_size == 0)
{
- if (device->bus_width == 8)
+ if (nand->bus_width == 8)
{
- device->controller->read_data(device, id_buff + 3);
- device->controller->read_data(device, id_buff + 4);
- device->controller->read_data(device, id_buff + 5);
+ nand->controller->read_data(nand, id_buff + 3);
+ nand->controller->read_data(nand, id_buff + 4);
+ nand->controller->read_data(nand, id_buff + 5);
}
else
{
uint16_t data_buf;
- device->controller->read_data(device, &data_buf);
+ nand->controller->read_data(nand, &data_buf);
id_buff[3] = data_buf;
- device->controller->read_data(device, &data_buf);
+ nand->controller->read_data(nand, &data_buf);
id_buff[4] = data_buf;
- device->controller->read_data(device, &data_buf);
+ nand->controller->read_data(nand, &data_buf);
id_buff[5] = data_buf >> 8;
}
}
/* page size */
- if (device->device->page_size == 0)
+ if (nand->device->page_size == 0)
{
- device->page_size = 1 << (10 + (id_buff[4] & 3));
+ nand->page_size = 1 << (10 + (id_buff[4] & 3));
}
- else if (device->device->page_size == 256)
+ else if (nand->device->page_size == 256)
{
LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
return ERROR_NAND_OPERATION_FAILED;
}
else
{
- device->page_size = device->device->page_size;
+ nand->page_size = nand->device->page_size;
}
/* number of address cycles */
- if (device->page_size <= 512)
+ if (nand->page_size <= 512)
{
/* small page devices */
- if (device->device->chip_size <= 32)
- device->address_cycles = 3;
- else if (device->device->chip_size <= 8*1024)
- device->address_cycles = 4;
+ if (nand->device->chip_size <= 32)
+ nand->address_cycles = 3;
+ else if (nand->device->chip_size <= 8*1024)
+ nand->address_cycles = 4;
else
{
LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
- device->address_cycles = 5;
+ nand->address_cycles = 5;
}
}
else
{
/* large page devices */
- if (device->device->chip_size <= 128)
- device->address_cycles = 4;
- else if (device->device->chip_size <= 32*1024)
- device->address_cycles = 5;
+ if (nand->device->chip_size <= 128)
+ nand->address_cycles = 4;
+ else if (nand->device->chip_size <= 32*1024)
+ nand->address_cycles = 5;
else
{
LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
- device->address_cycles = 6;
+ nand->address_cycles = 6;
}
}
/* erase size */
- if (device->device->erase_size == 0)
+ if (nand->device->erase_size == 0)
{
switch ((id_buff[4] >> 4) & 3) {
case 0:
- device->erase_size = 64 << 10;
+ nand->erase_size = 64 << 10;
break;
case 1:
- device->erase_size = 128 << 10;
+ nand->erase_size = 128 << 10;
break;
case 2:
- device->erase_size = 256 << 10;
+ nand->erase_size = 256 << 10;
break;
case 3:
- device->erase_size =512 << 10;
+ nand->erase_size =512 << 10;
break;
}
}
else
{
- device->erase_size = device->device->erase_size;
+ nand->erase_size = nand->device->erase_size;
}
/* initialize controller, but leave parameters at the controllers default */
- if ((retval = device->controller->init(device) != ERROR_OK))
+ if ((retval = nand->controller->init(nand) != ERROR_OK))
{
switch (retval)
{
return ERROR_NAND_OPERATION_FAILED;
case ERROR_NAND_OPERATION_NOT_SUPPORTED:
LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
- device->bus_width, device->address_cycles, device->page_size);
+ nand->bus_width, nand->address_cycles, nand->page_size);
return ERROR_NAND_OPERATION_FAILED;
default:
LOG_ERROR("BUG: unknown controller initialization failure");
}
}
- device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
- device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
+ nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
+ nand->blocks = malloc(sizeof(nand_block_t) * nand->num_blocks);
- for (i = 0; i < device->num_blocks; i++)
+ for (i = 0; i < nand->num_blocks; i++)
{
- device->blocks[i].size = device->erase_size;
- device->blocks[i].offset = i * device->erase_size;
- device->blocks[i].is_erased = -1;
- device->blocks[i].is_bad = -1;
+ nand->blocks[i].size = nand->erase_size;
+ nand->blocks[i].offset = i * nand->erase_size;
+ nand->blocks[i].is_erased = -1;
+ nand->blocks[i].is_bad = -1;
}
return ERROR_OK;
}
-static int nand_erase(struct nand_device_s *device, int first_block, int last_block)
+static int nand_erase(struct nand_device_s *nand, int first_block, int last_block)
{
int i;
uint32_t page;
uint8_t status;
int retval;
- if (!device->device)
+ if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
- if ((first_block < 0) || (last_block > device->num_blocks))
+ if ((first_block < 0) || (last_block > nand->num_blocks))
return ERROR_INVALID_ARGUMENTS;
/* make sure we know if a block is bad before erasing it */
for (i = first_block; i <= last_block; i++)
{
- if (device->blocks[i].is_bad == -1)
+ if (nand->blocks[i].is_bad == -1)
{
- nand_build_bbt(device, i, last_block);
+ nand_build_bbt(nand, i, last_block);
break;
}
}
for (i = first_block; i <= last_block; i++)
{
/* Send erase setup command */
- device->controller->command(device, NAND_CMD_ERASE1);
+ nand->controller->command(nand, NAND_CMD_ERASE1);
- page = i * (device->erase_size / device->page_size);
+ page = i * (nand->erase_size / nand->page_size);
/* Send page address */
- if (device->page_size <= 512)
+ if (nand->page_size <= 512)
{
/* row */
- device->controller->address(device, page & 0xff);
- device->controller->address(device, (page >> 8) & 0xff);
+ nand->controller->address(nand, page & 0xff);
+ nand->controller->address(nand, (page >> 8) & 0xff);
/* 3rd cycle only on devices with more than 32 MiB */
- if (device->address_cycles >= 4)
- device->controller->address(device, (page >> 16) & 0xff);
+ if (nand->address_cycles >= 4)
+ nand->controller->address(nand, (page >> 16) & 0xff);
/* 4th cycle only on devices with more than 8 GiB */
- if (device->address_cycles >= 5)
- device->controller->address(device, (page >> 24) & 0xff);
+ if (nand->address_cycles >= 5)
+ nand->controller->address(nand, (page >> 24) & 0xff);
}
else
{
/* row */
- device->controller->address(device, page & 0xff);
- device->controller->address(device, (page >> 8) & 0xff);
+ nand->controller->address(nand, page & 0xff);
+ nand->controller->address(nand, (page >> 8) & 0xff);
/* 3rd cycle only on devices with more than 128 MiB */
- if (device->address_cycles >= 5)
- device->controller->address(device, (page >> 16) & 0xff);
+ if (nand->address_cycles >= 5)
+ nand->controller->address(nand, (page >> 16) & 0xff);
}
/* Send erase confirm command */
- device->controller->command(device, NAND_CMD_ERASE2);
+ nand->controller->command(nand, NAND_CMD_ERASE2);
- retval = device->controller->nand_ready ?
- device->controller->nand_ready(device, 1000) :
- nand_poll_ready(device, 1000);
+ retval = nand->controller->nand_ready ?
+ nand->controller->nand_ready(nand, 1000) :
+ nand_poll_ready(nand, 1000);
if (!retval) {
LOG_ERROR("timeout waiting for NAND flash block erase to complete");
return ERROR_NAND_OPERATION_TIMEOUT;
}
- if ((retval = nand_read_status(device, &status)) != ERROR_OK)
+ if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
{
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
if (status & 0x1)
{
LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
- (device->blocks[i].is_bad == 1)
+ (nand->blocks[i].is_bad == 1)
? "bad " : "",
i, status);
/* continue; other blocks might still be erasable */
}
- device->blocks[i].is_erased = 1;
+ nand->blocks[i].is_erased = 1;
}
return ERROR_OK;
}
#if 0
-static int nand_read_plain(struct nand_device_s *device, uint32_t address, uint8_t *data, uint32_t data_size)
+static int nand_read_plain(struct nand_device_s *nand, uint32_t address, uint8_t *data, uint32_t data_size)
{
uint8_t *page;
- if (!device->device)
+ if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
- if (address % device->page_size)
+ if (address % nand->page_size)
{
LOG_ERROR("reads need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
- page = malloc(device->page_size);
+ page = malloc(nand->page_size);
while (data_size > 0)
{
- uint32_t thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
+ uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
uint32_t page_address;
- page_address = address / device->page_size;
+ page_address = address / nand->page_size;
- nand_read_page(device, page_address, page, device->page_size, NULL, 0);
+ nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
memcpy(data, page, thisrun_size);
return ERROR_OK;
}
-static int nand_write_plain(struct nand_device_s *device, uint32_t address, uint8_t *data, uint32_t data_size)
+static int nand_write_plain(struct nand_device_s *nand, uint32_t address, uint8_t *data, uint32_t data_size)
{
uint8_t *page;
- if (!device->device)
+ if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
- if (address % device->page_size)
+ if (address % nand->page_size)
{
LOG_ERROR("writes need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
- page = malloc(device->page_size);
+ page = malloc(nand->page_size);
while (data_size > 0)
{
- uint32_t thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
+ uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
uint32_t page_address;
- memset(page, 0xff, device->page_size);
+ memset(page, 0xff, nand->page_size);
memcpy(page, data, thisrun_size);
- page_address = address / device->page_size;
+ page_address = address / nand->page_size;
- nand_write_page(device, page_address, page, device->page_size, NULL, 0);
+ nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
address += thisrun_size;
data += thisrun_size;
}
#endif
-int nand_write_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+int nand_write_page(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
uint32_t block;
- if (!device->device)
+ if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
- block = page / (device->erase_size / device->page_size);
- if (device->blocks[block].is_erased == 1)
- device->blocks[block].is_erased = 0;
+ block = page / (nand->erase_size / nand->page_size);
+ if (nand->blocks[block].is_erased == 1)
+ nand->blocks[block].is_erased = 0;
- if (device->use_raw || device->controller->write_page == NULL)
- return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
+ if (nand->use_raw || nand->controller->write_page == NULL)
+ return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
else
- return device->controller->write_page(device, page, data, data_size, oob, oob_size);
+ return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
}
-static int nand_read_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+static int nand_read_page(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
- if (!device->device)
+ if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
- if (device->use_raw || device->controller->read_page == NULL)
- return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
+ if (nand->use_raw || nand->controller->read_page == NULL)
+ return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
else
- return device->controller->read_page(device, page, data, data_size, oob, oob_size);
+ return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
}
-int nand_read_page_raw(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+int nand_read_page_raw(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
uint32_t i;
- if (!device->device)
+ if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
- if (device->page_size <= 512)
+ if (nand->page_size <= 512)
{
/* small page device */
if (data)
- device->controller->command(device, NAND_CMD_READ0);
+ nand->controller->command(nand, NAND_CMD_READ0);
else
- device->controller->command(device, NAND_CMD_READOOB);
+ nand->controller->command(nand, NAND_CMD_READOOB);
/* column (always 0, we start at the beginning of a page/OOB area) */
- device->controller->address(device, 0x0);
+ nand->controller->address(nand, 0x0);
/* row */
- device->controller->address(device, page & 0xff);
- device->controller->address(device, (page >> 8) & 0xff);
+ nand->controller->address(nand, page & 0xff);
+ nand->controller->address(nand, (page >> 8) & 0xff);
/* 4th cycle only on devices with more than 32 MiB */
- if (device->address_cycles >= 4)
- device->controller->address(device, (page >> 16) & 0xff);
+ if (nand->address_cycles >= 4)
+ nand->controller->address(nand, (page >> 16) & 0xff);
/* 5th cycle only on devices with more than 8 GiB */
- if (device->address_cycles >= 5)
- device->controller->address(device, (page >> 24) & 0xff);
+ if (nand->address_cycles >= 5)
+ nand->controller->address(nand, (page >> 24) & 0xff);
}
else
{
/* large page device */
- device->controller->command(device, NAND_CMD_READ0);
+ nand->controller->command(nand, NAND_CMD_READ0);
/* column (0 when we start at the beginning of a page,
* or 2048 for the beginning of OOB area)
*/
- device->controller->address(device, 0x0);
+ nand->controller->address(nand, 0x0);
if (data)
- device->controller->address(device, 0x0);
+ nand->controller->address(nand, 0x0);
else
- device->controller->address(device, 0x8);
+ nand->controller->address(nand, 0x8);
/* row */
- device->controller->address(device, page & 0xff);
- device->controller->address(device, (page >> 8) & 0xff);
+ nand->controller->address(nand, page & 0xff);
+ nand->controller->address(nand, (page >> 8) & 0xff);
/* 5th cycle only on devices with more than 128 MiB */
- if (device->address_cycles >= 5)
- device->controller->address(device, (page >> 16) & 0xff);
+ if (nand->address_cycles >= 5)
+ nand->controller->address(nand, (page >> 16) & 0xff);
/* large page devices need a start command */
- device->controller->command(device, NAND_CMD_READSTART);
+ nand->controller->command(nand, NAND_CMD_READSTART);
}
- if (device->controller->nand_ready) {
- if (!device->controller->nand_ready(device, 100))
+ if (nand->controller->nand_ready) {
+ if (!nand->controller->nand_ready(nand, 100))
return ERROR_NAND_OPERATION_TIMEOUT;
} else {
alive_sleep(1);
if (data)
{
- if (device->controller->read_block_data != NULL)
- (device->controller->read_block_data)(device, data, data_size);
+ if (nand->controller->read_block_data != NULL)
+ (nand->controller->read_block_data)(nand, data, data_size);
else
{
for (i = 0; i < data_size;)
{
- if (device->device->options & NAND_BUSWIDTH_16)
+ if (nand->device->options & NAND_BUSWIDTH_16)
{
- device->controller->read_data(device, data);
+ nand->controller->read_data(nand, data);
data += 2;
i += 2;
}
else
{
- device->controller->read_data(device, data);
+ nand->controller->read_data(nand, data);
data += 1;
i += 1;
}
if (oob)
{
- if (device->controller->read_block_data != NULL)
- (device->controller->read_block_data)(device, oob, oob_size);
+ if (nand->controller->read_block_data != NULL)
+ (nand->controller->read_block_data)(nand, oob, oob_size);
else
{
for (i = 0; i < oob_size;)
{
- if (device->device->options & NAND_BUSWIDTH_16)
+ if (nand->device->options & NAND_BUSWIDTH_16)
{
- device->controller->read_data(device, oob);
+ nand->controller->read_data(nand, oob);
oob += 2;
i += 2;
}
else
{
- device->controller->read_data(device, oob);
+ nand->controller->read_data(nand, oob);
oob += 1;
i += 1;
}
return ERROR_OK;
}
-int nand_write_page_raw(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+int nand_write_page_raw(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
uint32_t i;
int retval;
uint8_t status;
- if (!device->device)
+ if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
- device->controller->command(device, NAND_CMD_SEQIN);
+ nand->controller->command(nand, NAND_CMD_SEQIN);
- if (device->page_size <= 512)
+ if (nand->page_size <= 512)
{
/* column (always 0, we start at the beginning of a page/OOB area) */
- device->controller->address(device, 0x0);
+ nand->controller->address(nand, 0x0);
/* row */
- device->controller->address(device, page & 0xff);
- device->controller->address(device, (page >> 8) & 0xff);
+ nand->controller->address(nand, page & 0xff);
+ nand->controller->address(nand, (page >> 8) & 0xff);
/* 4th cycle only on devices with more than 32 MiB */
- if (device->address_cycles >= 4)
- device->controller->address(device, (page >> 16) & 0xff);
+ if (nand->address_cycles >= 4)
+ nand->controller->address(nand, (page >> 16) & 0xff);
/* 5th cycle only on devices with more than 8 GiB */
- if (device->address_cycles >= 5)
- device->controller->address(device, (page >> 24) & 0xff);
+ if (nand->address_cycles >= 5)
+ nand->controller->address(nand, (page >> 24) & 0xff);
}
else
{
/* column (0 when we start at the beginning of a page,
* or 2048 for the beginning of OOB area)
*/
- device->controller->address(device, 0x0);
+ nand->controller->address(nand, 0x0);
if (data)
- device->controller->address(device, 0x0);
+ nand->controller->address(nand, 0x0);
else
- device->controller->address(device, 0x8);
+ nand->controller->address(nand, 0x8);
/* row */
- device->controller->address(device, page & 0xff);
- device->controller->address(device, (page >> 8) & 0xff);
+ nand->controller->address(nand, page & 0xff);
+ nand->controller->address(nand, (page >> 8) & 0xff);
/* 5th cycle only on devices with more than 128 MiB */
- if (device->address_cycles >= 5)
- device->controller->address(device, (page >> 16) & 0xff);
+ if (nand->address_cycles >= 5)
+ nand->controller->address(nand, (page >> 16) & 0xff);
}
if (data)
{
- if (device->controller->write_block_data != NULL)
- (device->controller->write_block_data)(device, data, data_size);
+ if (nand->controller->write_block_data != NULL)
+ (nand->controller->write_block_data)(nand, data, data_size);
else
{
for (i = 0; i < data_size;)
{
- if (device->device->options & NAND_BUSWIDTH_16)
+ if (nand->device->options & NAND_BUSWIDTH_16)
{
uint16_t data_buf = le_to_h_u16(data);
- device->controller->write_data(device, data_buf);
+ nand->controller->write_data(nand, data_buf);
data += 2;
i += 2;
}
else
{
- device->controller->write_data(device, *data);
+ nand->controller->write_data(nand, *data);
data += 1;
i += 1;
}
if (oob)
{
- if (device->controller->write_block_data != NULL)
- (device->controller->write_block_data)(device, oob, oob_size);
+ if (nand->controller->write_block_data != NULL)
+ (nand->controller->write_block_data)(nand, oob, oob_size);
else
{
for (i = 0; i < oob_size;)
{
- if (device->device->options & NAND_BUSWIDTH_16)
+ if (nand->device->options & NAND_BUSWIDTH_16)
{
uint16_t oob_buf = le_to_h_u16(data);
- device->controller->write_data(device, oob_buf);
+ nand->controller->write_data(nand, oob_buf);
oob += 2;
i += 2;
}
else
{
- device->controller->write_data(device, *oob);
+ nand->controller->write_data(nand, *oob);
oob += 1;
i += 1;
}
}
}
- device->controller->command(device, NAND_CMD_PAGEPROG);
+ nand->controller->command(nand, NAND_CMD_PAGEPROG);
- retval = device->controller->nand_ready ?
- device->controller->nand_ready(device, 100) :
- nand_poll_ready(device, 100);
+ retval = nand->controller->nand_ready ?
+ nand->controller->nand_ready(nand, 100) :
+ nand_poll_ready(nand, 100);
if (!retval)
return ERROR_NAND_OPERATION_TIMEOUT;
- if ((retval = nand_read_status(device, &status)) != ERROR_OK)
+ if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
{
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
typedef struct nand_flash_controller_s
{
char *name;
- int (*nand_device_command)(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
+ int (*nand_device_command)(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *nand);
int (*register_commands)(struct command_context_s *cmd_ctx);
- int (*init)(struct nand_device_s *device);
- int (*reset)(struct nand_device_s *device);
- int (*command)(struct nand_device_s *device, uint8_t command);
- int (*address)(struct nand_device_s *device, uint8_t address);
- int (*write_data)(struct nand_device_s *device, uint16_t data);
- int (*read_data)(struct nand_device_s *device, void *data);
- int (*write_block_data)(struct nand_device_s *device, uint8_t *data, int size);
- int (*read_block_data)(struct nand_device_s *device, uint8_t *data, int size);
- int (*write_page)(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
- int (*read_page)(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
- int (*controller_ready)(struct nand_device_s *device, int timeout);
- int (*nand_ready)(struct nand_device_s *device, int timeout);
+ int (*init)(struct nand_device_s *nand);
+ int (*reset)(struct nand_device_s *nand);
+ int (*command)(struct nand_device_s *nand, uint8_t command);
+ int (*address)(struct nand_device_s *nand, uint8_t address);
+ int (*write_data)(struct nand_device_s *nand, uint16_t data);
+ int (*read_data)(struct nand_device_s *nand, void *data);
+ int (*write_block_data)(struct nand_device_s *nand, uint8_t *data, int size);
+ int (*read_block_data)(struct nand_device_s *nand, uint8_t *data, int size);
+ int (*write_page)(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
+ int (*read_page)(struct nand_device_s *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
+ int (*controller_ready)(struct nand_device_s *nand, int timeout);
+ int (*nand_ready)(struct nand_device_s *nand, int timeout);
} nand_flash_controller_t;
typedef struct nand_block_s
nand_device_t *get_nand_device_by_num(int num);
-int nand_read_page_raw(struct nand_device_s *device, uint32_t page,
+int nand_read_page_raw(struct nand_device_s *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
-int nand_write_page_raw(struct nand_device_s *device, uint32_t page,
+int nand_write_page_raw(struct nand_device_s *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
-int nand_read_status(struct nand_device_s *device, uint8_t *status);
+int nand_read_status(struct nand_device_s *nand, uint8_t *status);
-int nand_calculate_ecc(struct nand_device_s *device,
+int nand_calculate_ecc(struct nand_device_s *nand,
const uint8_t *dat, uint8_t *ecc_code);
-int nand_calculate_ecc_kw(struct nand_device_s *device,
+int nand_calculate_ecc_kw(struct nand_device_s *nand,
const uint8_t *dat, uint8_t *ecc_code);
int nand_register_commands(struct command_context_s *cmd_ctx);
/// helper for parsing a nand device command argument string
int nand_command_get_device_by_num(struct command_context_s *cmd_ctx,
- const char *str, nand_device_t **device);
+ const char *str, nand_device_t **nand);
#define ERROR_NAND_DEVICE_INVALID (-1100)
/*
* nand_calculate_ecc - Calculate 3-byte ECC for 256-byte block
*/
-int nand_calculate_ecc(struct nand_device_s *device, const uint8_t *dat, uint8_t *ecc_code)
+int nand_calculate_ecc(struct nand_device_s *nand, const uint8_t *dat, uint8_t *ecc_code)
{
uint8_t idx, reg1, reg2, reg3, tmp1, tmp2;
int i;
* expects the ECC to be computed backward, i.e. from the last byte down
* to the first one.
*/
-int nand_calculate_ecc_kw(struct nand_device_s *device, const uint8_t *data, uint8_t *ecc)
+int nand_calculate_ecc_kw(struct nand_device_s *nand, const uint8_t *data, uint8_t *ecc)
{
unsigned int r7, r6, r5, r4, r3, r2, r1, r0;
int i;
} \
} while (0)
-static int orion_nand_command(struct nand_device_s *device, uint8_t command)
+static int orion_nand_command(struct nand_device_s *nand, uint8_t command)
{
- orion_nand_controller_t *hw = device->controller_priv;
+ orion_nand_controller_t *hw = nand->controller_priv;
target_t *target = hw->target;
CHECK_HALTED;
return ERROR_OK;
}
-static int orion_nand_address(struct nand_device_s *device, uint8_t address)
+static int orion_nand_address(struct nand_device_s *nand, uint8_t address)
{
- orion_nand_controller_t *hw = device->controller_priv;
+ orion_nand_controller_t *hw = nand->controller_priv;
target_t *target = hw->target;
CHECK_HALTED;
return ERROR_OK;
}
-static int orion_nand_read(struct nand_device_s *device, void *data)
+static int orion_nand_read(struct nand_device_s *nand, void *data)
{
- orion_nand_controller_t *hw = device->controller_priv;
+ orion_nand_controller_t *hw = nand->controller_priv;
target_t *target = hw->target;
CHECK_HALTED;
return ERROR_OK;
}
-static int orion_nand_write(struct nand_device_s *device, uint16_t data)
+static int orion_nand_write(struct nand_device_s *nand, uint16_t data)
{
- orion_nand_controller_t *hw = device->controller_priv;
+ orion_nand_controller_t *hw = nand->controller_priv;
target_t *target = hw->target;
CHECK_HALTED;
return ERROR_OK;
}
-static int orion_nand_slow_block_write(struct nand_device_s *device, uint8_t *data, int size)
+static int orion_nand_slow_block_write(struct nand_device_s *nand, uint8_t *data, int size)
{
while (size--)
- orion_nand_write(device, *data++);
+ orion_nand_write(nand, *data++);
return ERROR_OK;
}
-static int orion_nand_fast_block_write(struct nand_device_s *device, uint8_t *data, int size)
+static int orion_nand_fast_block_write(struct nand_device_s *nand, uint8_t *data, int size)
{
- orion_nand_controller_t *hw = device->controller_priv;
+ orion_nand_controller_t *hw = nand->controller_priv;
int retval;
- hw->io.chunk_size = device->page_size;
+ hw->io.chunk_size = nand->page_size;
retval = arm_nandwrite(&hw->io, data, size);
if (retval == ERROR_NAND_NO_BUFFER)
- retval = orion_nand_slow_block_write(device, data, size);
+ retval = orion_nand_slow_block_write(nand, data, size);
return retval;
}
-static int orion_nand_reset(struct nand_device_s *device)
+static int orion_nand_reset(struct nand_device_s *nand)
{
- return orion_nand_command(device, NAND_CMD_RESET);
+ return orion_nand_command(nand, NAND_CMD_RESET);
}
-static int orion_nand_controller_ready(struct nand_device_s *device, int timeout)
+static int orion_nand_controller_ready(struct nand_device_s *nand, int timeout)
{
return 1;
}
int orion_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
- struct nand_device_s *device)
+ struct nand_device_s *nand)
{
orion_nand_controller_t *hw;
uint32_t base;
return ERROR_NAND_DEVICE_INVALID;
}
- device->controller_priv = hw;
+ nand->controller_priv = hw;
hw->target = get_target(args[1]);
if (!hw->target) {
LOG_ERROR("target '%s' not defined", args[1]);
return ERROR_OK;
}
-static int orion_nand_init(struct nand_device_s *device)
+static int orion_nand_init(struct nand_device_s *nand)
{
return ERROR_OK;
}
static int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
- struct nand_device_s *device)
+ struct nand_device_s *nand)
{
s3c24xx_nand_controller_t *info;
- info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
+ info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, nand);
if (info == NULL) {
return ERROR_NAND_DEVICE_INVALID;
}
return ERROR_OK;
}
-static int s3c2410_init(struct nand_device_s *device)
+static int s3c2410_init(struct nand_device_s *nand)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
target_write_u32(target, S3C2410_NFCONF,
return ERROR_OK;
}
-static int s3c2410_write_data(struct nand_device_s *device, uint16_t data)
+static int s3c2410_write_data(struct nand_device_s *nand, uint16_t data)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
return ERROR_OK;
}
-static int s3c2410_read_data(struct nand_device_s *device, void *data)
+static int s3c2410_read_data(struct nand_device_s *nand, void *data)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
return ERROR_OK;
}
-static int s3c2410_nand_ready(struct nand_device_s *device, int timeout)
+static int s3c2410_nand_ready(struct nand_device_s *nand, int timeout)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
uint8_t status;
static int s3c2412_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
- struct nand_device_s *device)
+ struct nand_device_s *nand)
{
s3c24xx_nand_controller_t *info;
- info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
+ info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, nand);
if (info == NULL) {
return ERROR_NAND_DEVICE_INVALID;
}
return ERROR_OK;
}
-static int s3c2412_init(struct nand_device_s *device)
+static int s3c2412_init(struct nand_device_s *nand)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
target_write_u32(target, S3C2410_NFCONF,
static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
- struct nand_device_s *device)
+ struct nand_device_s *nand)
{
s3c24xx_nand_controller_t *info;
- info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
+ info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, nand);
if (info == NULL) {
return ERROR_NAND_DEVICE_INVALID;
}
return ERROR_OK;
}
-static int s3c2440_init(struct nand_device_s *device)
+static int s3c2440_init(struct nand_device_s *nand)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
target_write_u32(target, S3C2410_NFCONF,
return ERROR_OK;
}
-int s3c2440_nand_ready(struct nand_device_s *device, int timeout)
+int s3c2440_nand_ready(struct nand_device_s *nand, int timeout)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
uint8_t status;
/* use the fact we can read/write 4 bytes in one go via a single 32bit op */
-int s3c2440_read_block_data(struct nand_device_s *device, uint8_t *data, int data_size)
+int s3c2440_read_block_data(struct nand_device_s *nand, uint8_t *data, int data_size)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
uint32_t nfdata = s3c24xx_info->data;
uint32_t tmp;
- LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size);
+ LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, nand, data, data_size);
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
return ERROR_OK;
}
-int s3c2440_write_block_data(struct nand_device_s *device, uint8_t *data, int data_size)
+int s3c2440_write_block_data(struct nand_device_s *nand, uint8_t *data, int data_size)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
uint32_t nfdata = s3c24xx_info->data;
uint32_t tmp;
static int s3c2443_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
- struct nand_device_s *device)
+ struct nand_device_s *nand)
{
s3c24xx_nand_controller_t *info;
- info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
+ info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, nand);
if (info == NULL) {
return ERROR_NAND_DEVICE_INVALID;
}
return ERROR_OK;
}
-static int s3c2443_init(struct nand_device_s *device)
+static int s3c2443_init(struct nand_device_s *nand)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
target_write_u32(target, S3C2410_NFCONF,
s3c24xx_nand_controller_t *
s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
- struct nand_device_s *device)
+ struct nand_device_s *nand)
{
s3c24xx_nand_controller_t *s3c24xx_info;
return NULL;
}
- device->controller_priv = s3c24xx_info;
+ nand->controller_priv = s3c24xx_info;
s3c24xx_info->target = get_target(args[1]);
if (s3c24xx_info->target == NULL) {
return ERROR_OK;
}
-int s3c24xx_reset(struct nand_device_s *device)
+int s3c24xx_reset(struct nand_device_s *nand)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
return ERROR_OK;
}
-int s3c24xx_command(struct nand_device_s *device, uint8_t command)
+int s3c24xx_command(struct nand_device_s *nand, uint8_t command)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
}
-int s3c24xx_address(struct nand_device_s *device, uint8_t address)
+int s3c24xx_address(struct nand_device_s *nand, uint8_t address)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
return ERROR_OK;
}
-int s3c24xx_write_data(struct nand_device_s *device, uint16_t data)
+int s3c24xx_write_data(struct nand_device_s *nand, uint16_t data)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
return ERROR_OK;
}
-int s3c24xx_read_data(struct nand_device_s *device, void *data)
+int s3c24xx_read_data(struct nand_device_s *nand, void *data)
{
- s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+ s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
target_t *target = s3c24xx_info->target;
if (target->state != TARGET_HALTED) {
return ERROR_OK;
}
-int s3c24xx_controller_ready(struct nand_device_s *device, int timeout)
+int s3c24xx_controller_ready(struct nand_device_s *nand, int timeout)
{
return 1;
}
s3c24xx_nand_controller_t *s3c24xx_nand_device_command(
struct command_context_s *cmd_ctx, char *cmd,
- char **args, int argc, struct nand_device_s *device);
+ char **args, int argc, struct nand_device_s *nand);
int s3c24xx_register_commands(struct command_context_s *cmd_ctx);
-int s3c24xx_reset(struct nand_device_s *device);
+int s3c24xx_reset(struct nand_device_s *nand);
-int s3c24xx_command(struct nand_device_s *device, uint8_t command);
-int s3c24xx_address(struct nand_device_s *device, uint8_t address);
+int s3c24xx_command(struct nand_device_s *nand, uint8_t command);
+int s3c24xx_address(struct nand_device_s *nand, uint8_t address);
-int s3c24xx_write_data(struct nand_device_s *device, uint16_t data);
-int s3c24xx_read_data(struct nand_device_s *device, void *data);
+int s3c24xx_write_data(struct nand_device_s *nand, uint16_t data);
+int s3c24xx_read_data(struct nand_device_s *nand, void *data);
-int s3c24xx_controller_ready(struct nand_device_s *device, int tout);
+int s3c24xx_controller_ready(struct nand_device_s *nand, int tout);
#define s3c24xx_write_page NULL
#define s3c24xx_read_page NULL
/* code shared between different controllers */
-int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
+int s3c2440_nand_ready(struct nand_device_s *nand, int timeout);
-int s3c2440_read_block_data(struct nand_device_s *device,
+int s3c2440_read_block_data(struct nand_device_s *nand,
uint8_t *data, int data_size);
-int s3c2440_write_block_data(struct nand_device_s *device,
+int s3c2440_write_block_data(struct nand_device_s *nand,
uint8_t *data, int data_size);
#endif // S3C24xx_NAND_H
projects / openocd / commitdiff