]> git.sur5r.net Git - freertos/commitdiff
Continue work on new AVR32 port and demo.
authorrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 21 Jun 2010 14:57:05 +0000 (14:57 +0000)
committerrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 21 Jun 2010 14:57:05 +0000 (14:57 +0000)
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1034 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

Demo/AVR32_UC3A_GCC/FreeRTOSConfig.h
Demo/AVR32_UC3A_GCC/RegTest.c [new file with mode: 0644]
Demo/AVR32_UC3A_GCC/RegTest.h [new file with mode: 0644]

index 8909c1e0cbf8ffbf8caa45b4e4f04cda5bc27a0b..81df282d83631413e17d83a707f413b70274764e 100644 (file)
@@ -72,7 +72,7 @@
  * See http://www.freertos.org/a00110.html.\r
  *----------------------------------------------------------*/\r
 \r
-#define configUSE_PREEMPTION      0\r
+#define configUSE_PREEMPTION      1\r
 #define configUSE_IDLE_HOOK       0\r
 #define configUSE_TICK_HOOK       0\r
 #define configCPU_CLOCK_HZ        ( FOSC0 ) /* Hz clk gen */\r
diff --git a/Demo/AVR32_UC3A_GCC/RegTest.c b/Demo/AVR32_UC3A_GCC/RegTest.c
new file mode 100644 (file)
index 0000000..553f2b2
--- /dev/null
@@ -0,0 +1,246 @@
+/*\r
+    FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
+\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * If you are:                                                             *\r
+    *                                                                         *\r
+    *    + New to FreeRTOS,                                                   *\r
+    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *\r
+    *    + Looking for basic training,                                        *\r
+    *    + Wanting to improve your FreeRTOS skills and productivity           *\r
+    *                                                                         *\r
+    * then take a look at the FreeRTOS eBook                                  *\r
+    *                                                                         *\r
+    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *\r
+    *                  http://www.FreeRTOS.org/Documentation                  *\r
+    *                                                                         *\r
+    * A pdf reference manual is also available.  Both are usually delivered   *\r
+    * to your inbox within 20 minutes to two hours when purchased between 8am *\r
+    * and 8pm GMT (although please allow up to 24 hours in case of            *\r
+    * exceptional circumstances).  Thank you for your support!                *\r
+    *                                                                         *\r
+    ***************************************************************************\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+    ***NOTE*** The exception to the GPL is included to allow you to distribute\r
+    a combined work that includes FreeRTOS without being obliged to provide the\r
+    source code for proprietary components outside of the FreeRTOS kernel.\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
+    more details. You should have received a copy of the GNU General Public\r
+    License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+    can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+    by writing to Richard Barry, contact details for whom are available on the\r
+    FreeRTOS WEB site.\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    http://www.FreeRTOS.org - Documentation, latest information, license and\r
+    contact details.\r
+\r
+    http://www.SafeRTOS.com - A version that is certified for use in safety\r
+    critical systems.\r
+\r
+    http://www.OpenRTOS.com - Commercial support, development, porting,\r
+    licensing and training services.\r
+*/\r
+\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/*\r
+ * Two test tasks that fill the CPU registers with known values before\r
+ * continuously looping round checking that each register still contains its\r
+ * expected value.  Both tasks use a separate set of values, with an incorrect\r
+ * value being found at any time being indicative of an error in the context\r
+ * switch mechanism.  One of the tasks uses a yield instruction to increase the\r
+ * test coverage.  The nature of these tasks necessitates that they are written\r
+ * in assembly code.\r
+ */\r
+static void vRegTest1( void *pvParameters );\r
+static void vRegTest2( void *pvParameters );\r
+\r
+/* Counters used to ensure the tasks are still running. */\r
+static volatile unsigned long ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vStartRegTestTasks( void )\r
+{\r
+       xTaskCreate( vRegTest1, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+//     xTaskCreate( vRegTest2, ( signed char * ) "RTest2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vRegTest1( void *pvParameters )\r
+{\r
+       __asm__ __volatile__\r
+       (\r
+               /* Fill the registers with known values. */\r
+               "       mov             r0, 0                                                   \n"\r
+               "       mov             r1, 1                                                   \n"\r
+               "       mov             r2, 2                                                   \n"\r
+               "       mov             r3, 3                                                   \n"\r
+               "       mov             r4, 4                                                   \n"\r
+               "       mov             r5, 5                                                   \n"\r
+               "       mov             r6, 6                                                   \n" /* r7 is the frame pointer. */\r
+               "       mov             r10, 10                                                 \n"\r
+               "       mov             r11, 11                                                 \n"\r
+               "       mov             r12, 12                                                 \n" /* r13 is the stack pointer, and r14 the link register. */\r
+               "                                                                                       \n"\r
+               "reg_check_loop_1:                                                      \n"\r
+               "                                                                                       \n"\r
+               "       mov             r8, 8                                                   \n" /* Reset the registers that are likely to be clobbered when incrementing the check variable. */\r
+               "       mov             r9, 9                                                   \n"\r
+               "                                                                                       \n"\r
+               "       cp.w    r0, 0                                                   \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r1, 1                                                   \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r2, 2                                                   \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r3, 3                                                   \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r4, 4                                                   \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r5, 5                                                   \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r6, 6                                                   \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r8, 8                                                   \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r9, 9                                                   \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r10, 10                                                 \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r11, 11                                                 \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "       cp.w    r12, 12                                                 \n"\r
+               "       brne    reg_check_error_1                               \n"\r
+               "                                                                                       \n"\r
+               "       ld.w    r8, ulRegTest1CounterConst              \n"\r
+               "       ld.w    r8, r8[ 0x00 ]                                  \n"\r
+               "       sub     r9, r8, -1                                              \n"\r
+               "       ld.w    r8, ulRegTest1CounterConst              \n"\r
+               "       st.w    r8[ 0x00 ], r9                                  \n"\r
+               "                                                                                       \n"\r
+               "       bral    reg_check_loop_1                                \n"\r
+               "                                                                                       \n"\r
+               "reg_check_error_1:                                                     \n"\r
+               "       bral    .                                                               \n" /* If an error is discovered, just loop here so the check variable stops incrementing. */\r
+               "                                                                                       \n"\r
+               "ulRegTest1CounterConst: .word ulRegTest1Counter        \n"\r
+       );\r
+}\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+#if 0\r
+static void vRegTest2( void *pvParameters )\r
+{\r
+       __asm volatile\r
+       (\r
+               "       mov             r2, #0x12                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
+               "       mov             r3, #0x13                                                       \n"\r
+               "       mov             r4, #0x14                                                       \n"\r
+               "       mov             r5, #0x15                                                       \n"\r
+               "       mov             r6, #0x16                                                       \n"\r
+               "       mov             r7, #0x17                                                       \n"\r
+               "       mov             r8, #0x18                                                       \n"\r
+               "       mov             r9, #0x19                                                       \n"\r
+               "       mov             r10, #0x1a                                                      \n"\r
+               "       mov             r11, #0x1b                                                      \n"\r
+               "       mov             r12, #0x1c                                                      \n"\r
+               "       mov             r13, #0x1d                                                      \n"\r
+               "       mov             r14, #0x1e                                                      \n"\r
+               "       mov             r15, #0x1f                                                      \n"\r
+               "                                                                                               \n"\r
+               "reg_check_loop_2:                                                              \n"\r
+               "       cp.w            r2, #0x12                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r3, #0x13                                                       \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r4, #0x14                                                       \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r5, #0x15                                                       \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r6, #0x16                                                       \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r7, #0x17                                                       \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r8, #0x18                                                       \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r9, #0x19                                                       \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r10, #0x1a                                                      \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r11, #0x1b                                                      \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r12, #0x1c                                                      \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r13, #0x1d                                                      \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r14, #0x1e                                                      \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "       cp.w            r15, #0x1f                                                      \n"\r
+               "       brne            reg_check_error_2                                       \n"\r
+               "                                                                                               \n"\r
+               "       ld              r2, [r0]+short(ulRegTest2Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
+               "       add             r2, #1                                                          \n"\r
+               "       st              r2, [r0]+short(ulRegTest2Counter)       \n"\r
+               "       mov             r2, #0x12                                                       \n"\r
+               "                                                                                               \n"\r
+               "       bra.s   reg_check_loop_2                                        \n" /* Do it all again. */\r
+               "                                                                                               \n"\r
+               "reg_check_error_2:                                                             \n"\r
+                       "bra.s          .                                                               \n"\r
+       );\r
+}\r
+/*-----------------------------------------------------------*/\r
+#endif\r
+\r
+portBASE_TYPE xAreRegTestTasksStillRunning( void )\r
+{\r
+static unsigned long ulLastCounter1 = 0UL, ulLastCounter2 = 0UL;\r
+long lReturn;\r
+\r
+       /* Check that both loop counters are still incrementing, indicating that\r
+       both reg test tasks are still running error free. */\r
+       if( ulLastCounter1 == ulRegTest1Counter )\r
+       {\r
+               lReturn = pdFAIL;\r
+       }\r
+//     else if( ulLastCounter2 == ulRegTest2Counter )\r
+//     {\r
+//             lReturn = pdFAIL;\r
+//     }\r
+       else\r
+       {\r
+               lReturn = pdPASS;\r
+       }\r
+\r
+       ulLastCounter1 = ulRegTest1Counter;\r
+       ulLastCounter2 = ulRegTest2Counter;\r
+\r
+       return lReturn;\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
diff --git a/Demo/AVR32_UC3A_GCC/RegTest.h b/Demo/AVR32_UC3A_GCC/RegTest.h
new file mode 100644 (file)
index 0000000..9d9dd8f
--- /dev/null
@@ -0,0 +1,61 @@
+/*\r
+    FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
+\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * If you are:                                                             *\r
+    *                                                                         *\r
+    *    + New to FreeRTOS,                                                   *\r
+    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *\r
+    *    + Looking for basic training,                                        *\r
+    *    + Wanting to improve your FreeRTOS skills and productivity           *\r
+    *                                                                         *\r
+    * then take a look at the FreeRTOS eBook                                  *\r
+    *                                                                         *\r
+    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *\r
+    *                  http://www.FreeRTOS.org/Documentation                  *\r
+    *                                                                         *\r
+    * A pdf reference manual is also available.  Both are usually delivered   *\r
+    * to your inbox within 20 minutes to two hours when purchased between 8am *\r
+    * and 8pm GMT (although please allow up to 24 hours in case of            *\r
+    * exceptional circumstances).  Thank you for your support!                *\r
+    *                                                                         *\r
+    ***************************************************************************\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+    ***NOTE*** The exception to the GPL is included to allow you to distribute\r
+    a combined work that includes FreeRTOS without being obliged to provide the\r
+    source code for proprietary components outside of the FreeRTOS kernel.\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
+    more details. You should have received a copy of the GNU General Public\r
+    License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+    can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+    by writing to Richard Barry, contact details for whom are available on the\r
+    FreeRTOS WEB site.\r
+\r
+    1 tab == 4 spaces!\r
+\r
+    http://www.FreeRTOS.org - Documentation, latest information, license and\r
+    contact details.\r
+\r
+    http://www.SafeRTOS.com - A version that is certified for use in safety\r
+    critical systems.\r
+\r
+    http://www.OpenRTOS.com - Commercial support, development, porting,\r
+    licensing and training services.\r
+*/\r
+\r
+#ifndef REG_TEST_H\r
+#define REG_TEST_H\r
+\r
+void vStartRegTestTasks( void );\r
+portBASE_TYPE xAreRegTestTasksStillRunning( void );\r
+\r
+#endif\r
+\r