<tool id="cdt.managedbuild.tool.gnu.c.compiler.cross.cortexm3.exe.debug.1071303895" name="GNU C Compiler" superClass="cdt.managedbuild.tool.gnu.c.compiler.cross.cortexm3.exe.debug">\r
<option defaultValue="gnu.c.optimization.level.none" id="gnu.c.compiler.cross.cortexm3.exe.debug.option.optimization.level.510955399" name="Optimization Level" superClass="gnu.c.compiler.cross.cortexm3.exe.debug.option.optimization.level" valueType="enumerated"/>\r
<option defaultValue="gnu.c.optimization.level.none" id="gnu.c.compiler.cross.cortexm3.exe.debug.option.debugging.level.779446663" name="Debug Level" superClass="gnu.c.compiler.cross.cortexm3.exe.debug.option.debugging.level" value="gnu.c.debugging.level.max" valueType="enumerated"/>\r
-<option id="gnu.c.compiler.option.include.paths.1134958080" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath"/>\r
+<option id="gnu.c.compiler.option.include.paths.1134958080" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths"/>\r
<inputType id="cdt.managedbuild.tool.gnu.c.compiler.input.1656219383" superClass="cdt.managedbuild.tool.gnu.c.compiler.input"/>\r
</tool>\r
<tool id="cdt.managedbuild.tool.gnu.cpp.compiler.cross.cortexm3.exe.debug.1468299398" name="GNU C++ Compiler" superClass="cdt.managedbuild.tool.gnu.cpp.compiler.cross.cortexm3.exe.debug">\r
<option defaultValue="gnu.c.optimization.level.none" id="gnu.c.compiler.cross.cortexm3.exe.debug.option.debugging.level.455246761" name="Debug Level" superClass="gnu.c.compiler.cross.cortexm3.exe.debug.option.debugging.level" value="gnu.c.debugging.level.max" valueType="enumerated"/>\r
<option id="gnu.c.compiler.option.include.paths.1331265337" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">\r
<listOptionValue builtIn="false" value=""${workspace_loc:/RTOSDemo}""/>\r
+<listOptionValue builtIn="false" value=""${workspace_loc:/RTOSDemo/FreeTCPIP/apps/httpd}""/>\r
+<listOptionValue builtIn="false" value=""${workspace_loc:/RTOSDemo/WebServer}""/>\r
+<listOptionValue builtIn="false" value=""${workspace_loc:/RTOSDemo/FreeTCPIP}""/>\r
<listOptionValue builtIn="false" value=""${workspace_loc:/RTOSDemo/Common_Demo_Tasks/include}""/>\r
<listOptionValue builtIn="false" value=""${workspace_loc:/RTOSDemo/FreeRTOS_Source/include}""/>\r
<listOptionValue builtIn="false" value=""${workspace_loc:/RTOSDemo/FreeRTOS_Source/portable/GCC/ARM_CM3}""/>\r
</toolChain>\r
</folderInfo>\r
<sourceEntries>\r
-<entry excluding="main-blinky.c|FreeTCPIP|WebServer|MicroSemi_Code/drivers/mss_uart|MicroSemi_Code/drivers/mss_spi|MicroSemi_Code/drivers/mss_pdma|MicroSemi_Code/drivers/mss_ethernet_mac|MicroSemi_Code/drivers/mss_ace|MicroSemi_Code/drivers/mac|Debug/FreeRTOS_Source/portable/GCC/ARM_CM3|Debug/FreeRTOS_Source/portable/MemMang" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>\r
+<entry excluding="WebServer/httpd-fsdata.c|main-blinky.c|MicroSemi_Code/drivers/mss_uart|MicroSemi_Code/drivers/mss_spi|MicroSemi_Code/drivers/mss_pdma|MicroSemi_Code/drivers/mss_ethernet_mac|MicroSemi_Code/drivers/mss_ace|MicroSemi_Code/drivers/mac|Debug/FreeRTOS_Source/portable/GCC/ARM_CM3|Debug/FreeRTOS_Source/portable/MemMang" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>\r
</sourceEntries>\r
</configuration>\r
</storageModule>\r
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 )\r
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 45 * 1024 ) )\r
#define configMAX_TASK_NAME_LEN ( 10 )\r
-#define configUSE_TRACE_FACILITY 0\r
+#define configUSE_TRACE_FACILITY 1\r
#define configUSE_16_BIT_TICKS 0\r
#define configIDLE_SHOULD_YIELD 1\r
#define configUSE_MUTEXES 1\r
#define vPortSVCHandler SVC_Handler\r
#define xPortSysTickHandler SysTick_Handler\r
\r
+/* MAC address configuration. */\r
+#define configMAC_ADDR0 0x00\r
+#define configMAC_ADDR1 0x12\r
+#define configMAC_ADDR2 0x13\r
+#define configMAC_ADDR3 0x10\r
+#define configMAC_ADDR4 0x15\r
+#define configMAC_ADDR5 0x11\r
+\r
+/* IP address configuration. */\r
+#define configIP_ADDR0 192\r
+#define configIP_ADDR1 168\r
+#define configIP_ADDR2 0\r
+#define configIP_ADDR3 200\r
+\r
+/* Netmask configuration. */\r
+#define configNET_MASK0 255\r
+#define configNET_MASK1 255\r
+#define configNET_MASK2 255\r
+#define configNET_MASK3 0\r
+\r
#endif /* FREERTOS_CONFIG_H */\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
+long lParTestGetLEDState( unsigned long ulLED )\r
+{\r
+long lReturn = pdFALSE;\r
+\r
+ if( ulLED < partstMAX_LEDS )\r
+ {\r
+ taskENTER_CRITICAL();\r
+ {\r
+ if( ( ulGPIOState & ( 1UL << ulLED ) ) == 0UL )\r
+ {\r
+ lReturn = pdTRUE;\r
+ }\r
+ }\r
+ }\r
+\r
+ return lReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
licensing and training services.\r
*/\r
\r
-/* Hardware specific includes. */\r
-#include <iorx62n.h>\r
-#include "typedefine.h"\r
-#include "r_ether.h"\r
-#include "phy.h"\r
-\r
/* FreeRTOS includes. */\r
#include "FreeRTOS.h"\r
#include "task.h"\r
/* uIP includes. */\r
#include "net/uip.h"\r
\r
-/* The time to wait between attempts to obtain a free buffer. */\r
-#define emacBUFFER_WAIT_DELAY_ms ( 3 / portTICK_RATE_MS )\r
-\r
-/* The number of times emacBUFFER_WAIT_DELAY_ms should be waited before giving\r
-up on attempting to obtain a free buffer all together. */\r
-#define emacBUFFER_WAIT_ATTEMPTS ( 30 )\r
-\r
-/* The number of Rx descriptors. */\r
-#define emacNUM_RX_DESCRIPTORS 8\r
-\r
-/* The number of Tx descriptors. When using uIP there is not point in having\r
-more than two. */\r
-#define emacNUM_TX_BUFFERS 2\r
-\r
-/* The total number of EMAC buffers to allocate. */\r
-#define emacNUM_BUFFERS ( emacNUM_RX_DESCRIPTORS + emacNUM_TX_BUFFERS )\r
-\r
-/* The time to wait for the Tx descriptor to become free. */\r
-#define emacTX_WAIT_DELAY_ms ( 10 / portTICK_RATE_MS )\r
-\r
-/* The total number of times to wait emacTX_WAIT_DELAY_ms for the Tx descriptor to\r
-become free. */\r
-#define emacTX_WAIT_ATTEMPTS ( 50 )\r
-\r
-/* Only Rx end and Tx end interrupts are used by this driver. */\r
-#define emacTX_END_INTERRUPT ( 1UL << 21UL )\r
-#define emacRX_END_INTERRUPT ( 1UL << 18UL )\r
-\r
/*-----------------------------------------------------------*/\r
\r
-/* The buffers and descriptors themselves. */\r
-#pragma data_alignment=32\r
-volatile ethfifo xRxDescriptors[ emacNUM_RX_DESCRIPTORS ];\r
-\r
-#pragma data_alignment=32\r
-volatile ethfifo xTxDescriptors[ emacNUM_TX_BUFFERS ];\r
-\r
-#pragma data_alignment=32\r
-char xEthernetBuffers[ emacNUM_BUFFERS ][ UIP_BUFSIZE ];\r
-\r
-\r
-/* Used to indicate which buffers are free and which are in use. If an index\r
-contains 0 then the corresponding buffer in xEthernetBuffers is free, otherwise\r
-the buffer is in use or about to be used. */\r
-static unsigned char ucBufferInUse[ emacNUM_BUFFERS ];\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * Initialise both the Rx and Tx descriptors.\r
- */\r
-static void prvInitialiseDescriptors( void );\r
-\r
-/*\r
- * Return a pointer to a free buffer within xEthernetBuffers.\r
- */\r
-static unsigned char *prvGetNextBuffer( void );\r
-\r
-/*\r
- * Return a buffer to the list of free buffers.\r
- */\r
-static void prvReturnBuffer( unsigned char *pucBuffer );\r
-\r
-/*\r
- * Examine the status of the next Rx FIFO to see if it contains new data.\r
- */\r
-static unsigned long prvCheckRxFifoStatus( void );\r
-\r
-/*\r
- * Setup the microcontroller for communication with the PHY.\r
- */\r
-static void prvResetMAC( void );\r
-\r
-/*\r
- * Configure the Ethernet interface peripherals.\r
- */\r
-static void prvConfigureEtherCAndEDMAC( void );\r
-\r
-/*\r
- * Something has gone wrong with the descriptor usage. Reset all the buffers\r
- * and descriptors.\r
- */\r
-static void prvResetEverything( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Points to the Rx descriptor currently in use. */\r
-static volatile ethfifo *pxCurrentDesc = NULL;\r
-\r
/* The buffer used by the uIP stack to both receive and send. This points to\r
one of the Ethernet buffers when its actually in use. */\r
unsigned char *uip_buf = NULL;\r
\r
void vInitEmac( void )\r
{\r
- /* Software reset. */\r
- prvResetMAC();\r
- \r
- /* Set the Rx and Tx descriptors into their initial state. */\r
- prvInitialiseDescriptors();\r
-\r
- /* Set the MAC address into the ETHERC */\r
- ETHERC.MAHR = ( ( unsigned long ) configMAC_ADDR0 << 24UL ) |\r
- ( ( unsigned long ) configMAC_ADDR1 << 16UL ) |\r
- ( ( unsigned long ) configMAC_ADDR2 << 8UL ) |\r
- ( unsigned long ) configMAC_ADDR3;\r
- \r
- ETHERC.MALR.BIT.MA = ( ( unsigned long ) configMAC_ADDR4 << 8UL ) |\r
- ( unsigned long ) configMAC_ADDR5;\r
-\r
- /* Perform rest of interface hardware configuration. */\r
- prvConfigureEtherCAndEDMAC();\r
- \r
- /* Nothing received yet, so uip_buf points nowhere. */\r
- uip_buf = NULL;\r
-\r
- /* Initialize the PHY */\r
- phy_init();\r
}\r
/*-----------------------------------------------------------*/\r
\r
void vEMACWrite( void )\r
{\r
-long x;\r
-\r
- /* Wait until the second transmission of the last packet has completed. */\r
- for( x = 0; x < emacTX_WAIT_ATTEMPTS; x++ )\r
- {\r
- if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )\r
- {\r
- /* Descriptor is still active. */\r
- vTaskDelay( emacTX_WAIT_DELAY_ms );\r
- }\r
- else\r
- {\r
- break;\r
- }\r
- }\r
- \r
- /* Is the descriptor free after waiting for it? */\r
- if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )\r
- {\r
- /* Something has gone wrong. */\r
- prvResetEverything();\r
- }\r
- \r
- /* Setup both descriptors to transmit the frame. */\r
- xTxDescriptors[ 0 ].buf_p = ( char * ) uip_buf;\r
- xTxDescriptors[ 0 ].bufsize = uip_len; \r
- xTxDescriptors[ 1 ].buf_p = ( char * ) uip_buf;\r
- xTxDescriptors[ 1 ].bufsize = uip_len;\r
-\r
- /* uip_buf is being sent by the Tx descriptor. Allocate a new buffer\r
- for use by the stack. */\r
- uip_buf = prvGetNextBuffer();\r
-\r
- /* Clear previous settings and go. */\r
- xTxDescriptors[0].status &= ~( FP1 | FP0 );\r
- xTxDescriptors[0].status |= ( FP1 | FP0 | ACT );\r
- xTxDescriptors[1].status &= ~( FP1 | FP0 );\r
- xTxDescriptors[1].status |= ( FP1 | FP0 | ACT );\r
-\r
- EDMAC.EDTRR.LONG = 0x00000001;\r
}\r
/*-----------------------------------------------------------*/\r
\r
unsigned long ulEMACRead( void )\r
{\r
-unsigned long ulBytesReceived;\r
-\r
- ulBytesReceived = prvCheckRxFifoStatus();\r
-\r
- if( ulBytesReceived > 0 )\r
- {\r
- pxCurrentDesc->status &= ~( FP1 | FP0 );\r
- pxCurrentDesc->status |= ACT; \r
-\r
- if( EDMAC.EDRRR.LONG == 0x00000000L )\r
- {\r
- /* Restart Ethernet if it has stopped */\r
- EDMAC.EDRRR.LONG = 0x00000001L;\r
- }\r
-\r
- /* Mark the pxDescriptor buffer as free as uip_buf is going to be set to\r
- the buffer that contains the received data. */\r
- prvReturnBuffer( uip_buf );\r
- \r
- uip_buf = ( void * ) pxCurrentDesc->buf_p;\r
-\r
- /* Move onto the next buffer in the ring. */\r
- pxCurrentDesc = pxCurrentDesc->next;\r
- }\r
+unsigned long ulBytesReceived = 0UL;\r
\r
return ulBytesReceived;\r
}\r
\r
long lEMACWaitForLink( void )\r
{\r
-long lReturn;\r
-\r
- /* Set the link status. */\r
- switch( phy_set_autonegotiate() )\r
- {\r
- /* Half duplex link */\r
- case PHY_LINK_100H:\r
- ETHERC.ECMR.BIT.DM = 0;\r
- ETHERC.ECMR.BIT.RTM = 1;\r
- lReturn = pdPASS;\r
- break;\r
-\r
- case PHY_LINK_10H:\r
- ETHERC.ECMR.BIT.DM = 0;\r
- ETHERC.ECMR.BIT.RTM = 0;\r
- lReturn = pdPASS;\r
- break;\r
-\r
-\r
- /* Full duplex link */\r
- case PHY_LINK_100F:\r
- ETHERC.ECMR.BIT.DM = 1;\r
- ETHERC.ECMR.BIT.RTM = 1;\r
- lReturn = pdPASS;\r
- break;\r
- \r
- case PHY_LINK_10F:\r
- ETHERC.ECMR.BIT.DM = 1;\r
- ETHERC.ECMR.BIT.RTM = 0;\r
- lReturn = pdPASS;\r
- break;\r
-\r
- default:\r
- lReturn = pdFAIL;\r
- break;\r
- }\r
-\r
- if( lReturn == pdPASS )\r
- {\r
- /* Enable receive and transmit. */\r
- ETHERC.ECMR.BIT.RE = 1;\r
- ETHERC.ECMR.BIT.TE = 1;\r
-\r
- /* Enable EDMAC receive */\r
- EDMAC.EDRRR.LONG = 0x1;\r
- }\r
+long lReturn = 0;\r
\r
return lReturn;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvInitialiseDescriptors( void )\r
-{\r
-volatile ethfifo *pxDescriptor;\r
-long x;\r
-\r
- for( x = 0; x < emacNUM_BUFFERS; x++ )\r
- {\r
- /* Ensure none of the buffers are shown as in use at the start. */\r
- ucBufferInUse[ x ] = pdFALSE;\r
- }\r
-\r
- /* Initialise the Rx descriptors. */\r
- for( x = 0; x < emacNUM_RX_DESCRIPTORS; x++ )\r
- {\r
- pxDescriptor = &( xRxDescriptors[ x ] );\r
- pxDescriptor->buf_p = &( xEthernetBuffers[ x ][ 0 ] );\r
-\r
- pxDescriptor->bufsize = UIP_BUFSIZE;\r
- pxDescriptor->size = 0;\r
- pxDescriptor->status = ACT;\r
- pxDescriptor->next = ( ethfifo * ) &xRxDescriptors[ x + 1 ]; \r
- \r
- /* Mark this buffer as in use. */\r
- ucBufferInUse[ x ] = pdTRUE;\r
- }\r
-\r
- /* The last descriptor points back to the start. */\r
- pxDescriptor->status |= DL;\r
- pxDescriptor->next = ( ethfifo * ) &xRxDescriptors[ 0 ];\r
- \r
- /* Initialise the Tx descriptors. */\r
- for( x = 0; x < emacNUM_TX_BUFFERS; x++ )\r
- {\r
- pxDescriptor = &( xTxDescriptors[ x ] );\r
- \r
- /* A buffer is not allocated to the Tx descriptor until a send is\r
- actually required. */\r
- pxDescriptor->buf_p = NULL;\r
-\r
- pxDescriptor->bufsize = UIP_BUFSIZE;\r
- pxDescriptor->size = 0;\r
- pxDescriptor->status = 0;\r
- pxDescriptor->next = ( ethfifo * ) &xTxDescriptors[ x + 1 ]; \r
- }\r
-\r
- /* The last descriptor points back to the start. */\r
- pxDescriptor->status |= DL;\r
- pxDescriptor->next = ( ethfifo * ) &( xTxDescriptors[ 0 ] );\r
- \r
- /* Use the first Rx descriptor to start with. */\r
- pxCurrentDesc = &( xRxDescriptors[ 0 ] );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static unsigned char *prvGetNextBuffer( void )\r
-{\r
-long x;\r
-unsigned char *pucReturn = NULL;\r
-unsigned long ulAttempts = 0;\r
-\r
- while( pucReturn == NULL )\r
- {\r
- /* Look through the buffers to find one that is not in use by\r
- anything else. */\r
- for( x = 0; x < emacNUM_BUFFERS; x++ )\r
- {\r
- if( ucBufferInUse[ x ] == pdFALSE )\r
- {\r
- ucBufferInUse[ x ] = pdTRUE;\r
- pucReturn = ( unsigned char * ) &( xEthernetBuffers[ x ][ 0 ] );\r
- break;\r
- }\r
- }\r
-\r
- /* Was a buffer found? */\r
- if( pucReturn == NULL )\r
- {\r
- ulAttempts++;\r
-\r
- if( ulAttempts >= emacBUFFER_WAIT_ATTEMPTS )\r
- {\r
- break;\r
- }\r
-\r
- /* Wait then look again. */\r
- vTaskDelay( emacBUFFER_WAIT_DELAY_ms );\r
- }\r
- }\r
-\r
- return pucReturn;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvReturnBuffer( unsigned char *pucBuffer )\r
-{\r
-unsigned long ul;\r
-\r
- /* Return a buffer to the pool of free buffers. */\r
- for( ul = 0; ul < emacNUM_BUFFERS; ul++ )\r
- {\r
- if( &( xEthernetBuffers[ ul ][ 0 ] ) == ( void * ) pucBuffer )\r
- {\r
- ucBufferInUse[ ul ] = pdFALSE;\r
- break;\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvResetEverything( void )\r
-{\r
- /* Temporary code just to see if this gets called. This function has not\r
- been implemented. */\r
- portDISABLE_INTERRUPTS();\r
- for( ;; );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static unsigned long prvCheckRxFifoStatus( void )\r
-{\r
-unsigned long ulReturn = 0;\r
-\r
- if( ( pxCurrentDesc->status & ACT ) != 0 )\r
- {\r
- /* Current descriptor is still active. */\r
- }\r
- else if( ( pxCurrentDesc->status & FE ) != 0 )\r
- {\r
- /* Frame error. Clear the error. */\r
- pxCurrentDesc->status &= ~( FP1 | FP0 | FE );\r
- pxCurrentDesc->status &= ~( RMAF | RRF | RTLF | RTSF | PRE | CERF );\r
- pxCurrentDesc->status |= ACT;\r
- pxCurrentDesc = pxCurrentDesc->next;\r
-\r
- if( EDMAC.EDRRR.LONG == 0x00000000UL )\r
- {\r
- /* Restart Ethernet if it has stopped. */\r
- EDMAC.EDRRR.LONG = 0x00000001UL;\r
- } \r
- }\r
- else\r
- {\r
- /* The descriptor contains a frame. Because of the size of the buffers\r
- the frame should always be complete. */\r
- if( ( pxCurrentDesc->status & FP0 ) == FP0 )\r
- {\r
- ulReturn = pxCurrentDesc->size;\r
- }\r
- else\r
- {\r
- /* Do not expect to get here. */\r
- prvResetEverything();\r
- }\r
- }\r
- \r
- return ulReturn;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvResetMAC( void )\r
-{\r
- /* Ensure the EtherC and EDMAC are enabled. */\r
- SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;\r
- vTaskDelay( 100 / portTICK_RATE_MS );\r
- \r
- EDMAC.EDMR.BIT.SWR = 1; \r
- \r
- /* Crude wait for reset to complete. */\r
- vTaskDelay( 500 / portTICK_RATE_MS ); \r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvConfigureEtherCAndEDMAC( void )\r
-{\r
- /* Initialisation code taken from Renesas example project. */\r
- \r
- /* TODO: Check bit 5 */\r
- ETHERC.ECSR.LONG = 0x00000037; /* Clear all ETHERC statuS BFR, PSRTO, LCHNG, MPD, ICD */\r
-\r
- /* Set the EDMAC interrupt priority. */\r
- _IPR( _ETHER_EINT ) = configKERNEL_INTERRUPT_PRIORITY;\r
-\r
- /* TODO: Check bit 5 */\r
- /* Enable interrupts of interest only. */\r
- EDMAC.EESIPR.LONG = emacTX_END_INTERRUPT | emacRX_END_INTERRUPT;\r
- ETHERC.RFLR.LONG = 1518; /* Ether payload is 1500+ CRC */\r
- ETHERC.IPGR.LONG = 0x00000014; /* Intergap is 96-bit time */\r
-\r
- /* EDMAC */\r
- EDMAC.EESR.LONG = 0x47FF0F9F; /* Clear all ETHERC and EDMAC status bits */\r
- #if __LITTLE_ENDIAN__ == 1\r
- EDMAC.EDMR.BIT.DE = 1;\r
- #endif\r
- EDMAC.RDLAR = ( void * ) pxCurrentDesc; /* Initialaize Rx Descriptor List Address */\r
- EDMAC.TDLAR = ( void * ) &( xTxDescriptors[ 0 ] );/* Initialaize Tx Descriptor List Address */\r
- EDMAC.TRSCER.LONG = 0x00000000; /* Copy-back status is RFE & TFE only */\r
- EDMAC.TFTR.LONG = 0x00000000; /* Threshold of Tx_FIFO */\r
- EDMAC.FDR.LONG = 0x00000000; /* Transmit fifo & receive fifo is 256 bytes */\r
- EDMAC.RMCR.LONG = 0x00000003; /* Receive function is normal mode(continued) */\r
- \r
- /* Enable the interrupt... */\r
- _IEN( _ETHER_EINT ) = 1; \r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-#pragma vector = VECT_ETHER_EINT\r
-__interrupt void vEMAC_ISR_Handler( void )\r
-{\r
-unsigned long ul = EDMAC.EESR.LONG;\r
-long lHigherPriorityTaskWoken = pdFALSE;\r
-extern xSemaphoreHandle xEMACSemaphore;\r
-static long ulTxEndInts = 0;\r
-\r
- __enable_interrupt();\r
-\r
- /* Has a Tx end occurred? */\r
- if( ul & emacTX_END_INTERRUPT )\r
- {\r
- ++ulTxEndInts;\r
- if( ulTxEndInts >= 2 )\r
- {\r
- /* Only return the buffer to the pool once both Txes have completed. */\r
- prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p );\r
- ulTxEndInts = 0;\r
- }\r
- EDMAC.EESR.LONG = emacTX_END_INTERRUPT;\r
- }\r
-\r
- /* Has an Rx end occurred? */\r
- if( ul & emacRX_END_INTERRUPT )\r
- {\r
- /* Make sure the Ethernet task is not blocked waiting for a packet. */\r
- xSemaphoreGiveFromISR( xEMACSemaphore, &lHigherPriorityTaskWoken );\r
- portYIELD_FROM_ISR( lHigherPriorityTaskWoken );\r
- EDMAC.EESR.LONG = emacRX_END_INTERRUPT;\r
- }\r
-}\r
-\r
*/\r
\r
/*\r
-This simple demo project runs on the STM32 Discovery board, which is\r
-populated with an STM32F100RB Cortex-M3 microcontroller. The discovery board \r
-makes an ideal low cost evaluation platform, but the 8K of RAM provided on the\r
-STM32F100RB does not allow the simple application to demonstrate all of all the \r
-FreeRTOS kernel features. Therefore, this simple demo only actively \r
-demonstrates task, queue, timer and interrupt functionality. In addition, the \r
-demo is configured to include malloc failure, idle and stack overflow hook \r
-functions.\r
-\r
-The idle hook function:\r
-The idle hook function queries the amount of FreeRTOS heap space that is\r
-remaining (see vApplicationIdleHook() defined in this file). The demo \r
-application is configured use 7K or the available 8K of RAM as the FreeRTOS heap.\r
-Memory is only allocated from this heap during initialisation, and this demo \r
-only actually uses 1.6K bytes of the configured 7K available - leaving 5.4K \r
-bytes of heap space unallocated.\r
-\r
-The main() Function:\r
-main() creates one software timer, one queue, and two tasks. It then starts the\r
-scheduler.\r
-\r
-The Queue Send Task:\r
-The queue send task is implemented by the prvQueueSendTask() function in this \r
-file. prvQueueSendTask() sits in a loop that causes it to repeatedly block for \r
-200 milliseconds, before sending the value 100 to the queue that was created \r
-within main(). Once the value is sent, the task loops back around to block for\r
-another 200 milliseconds.\r
-\r
-The Queue Receive Task:\r
-The queue receive task is implemented by the prvQueueReceiveTask() function\r
-in this file. prvQueueReceiveTask() sits in a loop that causes repeatedly \r
-attempt to read data from the queue that was created within main(). When data \r
-is received, the task checks the value of the data, and if the value equals \r
-the expected 100, toggles the green LED. The 'block time' parameter passed to \r
-the queue receive function specifies that the task should be held in the Blocked \r
-state indefinitely to wait for data to be available on the queue. The queue \r
-receive task will only leave the Blocked state when the queue send task writes \r
-to the queue. As the queue send task writes to the queue every 200 \r
-milliseconds, the queue receive task leaves the Blocked state every 200 \r
-milliseconds, and therefore toggles the green LED every 200 milliseconds.\r
-\r
-The LED Software Timer and the Button Interrupt:\r
-The user button B1 is configured to generate an interrupt each time it is\r
-pressed. The interrupt service routine switches the red LED on, and resets the \r
-LED software timer. The LED timer has a 5000 millisecond (5 second) period, and\r
-uses a callback function that is defined to just turn the red LED off. \r
-Therefore, pressing the user button will turn the red LED on, and the LED will \r
-remain on until a full five seconds pass without the button being pressed.\r
+* This simple demo project runs on the STM32 Discovery board, which is\r
+* populated with an STM32F100RB Cortex-M3 microcontroller. The discovery board \r
+* makes an ideal low cost evaluation platform, but the 8K of RAM provided on the\r
+* STM32F100RB does not allow the simple application to demonstrate all of all the \r
+* FreeRTOS kernel features. Therefore, this simple demo only actively \r
+* demonstrates task, queue, timer and interrupt functionality. In addition, the \r
+* demo is configured to include malloc failure, idle and stack overflow hook \r
+* functions.\r
+* \r
+* The idle hook function:\r
+* The idle hook function queries the amount of FreeRTOS heap space that is\r
+* remaining (see vApplicationIdleHook() defined in this file). The demo \r
+* application is configured use 7K or the available 8K of RAM as the FreeRTOS heap.\r
+* Memory is only allocated from this heap during initialisation, and this demo \r
+* only actually uses 1.6K bytes of the configured 7K available - leaving 5.4K \r
+* bytes of heap space unallocated.\r
+* \r
+* The main() Function:\r
+* main() creates one software timer, one queue, and two tasks. It then starts the\r
+* scheduler.\r
+* \r
+* The Queue Send Task:\r
+* The queue send task is implemented by the prvQueueSendTask() function in this \r
+* file. prvQueueSendTask() sits in a loop that causes it to repeatedly block for \r
+* 200 milliseconds, before sending the value 100 to the queue that was created \r
+* within main(). Once the value is sent, the task loops back around to block for\r
+* another 200 milliseconds.\r
+* \r
+* The Queue Receive Task:\r
+* The queue receive task is implemented by the prvQueueReceiveTask() function\r
+* in this file. prvQueueReceiveTask() sits in a loop that causes repeatedly \r
+* attempt to read data from the queue that was created within main(). When data \r
+* is received, the task checks the value of the data, and if the value equals \r
+* the expected 100, toggles the green LED. The 'block time' parameter passed to \r
+* the queue receive function specifies that the task should be held in the Blocked \r
+* state indefinitely to wait for data to be available on the queue. The queue \r
+* receive task will only leave the Blocked state when the queue send task writes \r
+* to the queue. As the queue send task writes to the queue every 200 \r
+* milliseconds, the queue receive task leaves the Blocked state every 200 \r
+* milliseconds, and therefore toggles the green LED every 200 milliseconds.\r
+* \r
+* The LED Software Timer and the Button Interrupt:\r
+* The user button B1 is configured to generate an interrupt each time it is\r
+* pressed. The interrupt service routine switches the red LED on, and resets the \r
+* LED software timer. The LED timer has a 5000 millisecond (5 second) period, and\r
+* uses a callback function that is defined to just turn the red LED off. \r
+* Therefore, pressing the user button will turn the red LED on, and the LED will \r
+* remain on until a full five seconds pass without the button being pressed.\r
*/\r
\r
/* Kernel includes. */\r
MSS_GPIO_set_outputs( ulGPIOState );\r
\r
/* Setup the GPIO and the NVIC for the switch used in this simple demo. */\r
+ NVIC_SetPriority( GPIO8_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );\r
NVIC_EnableIRQ( GPIO8_IRQn );\r
MSS_GPIO_config( MSS_GPIO_8, MSS_GPIO_INPUT_MODE | MSS_GPIO_IRQ_EDGE_NEGATIVE );\r
MSS_GPIO_enable_irq( MSS_GPIO_8 );\r
*/\r
\r
/*\r
-This simple demo project runs on the STM32 Discovery board, which is\r
-populated with an STM32F100RB Cortex-M3 microcontroller. The discovery board \r
-makes an ideal low cost evaluation platform, but the 8K of RAM provided on the\r
-STM32F100RB does not allow the simple application to demonstrate all of all the \r
-FreeRTOS kernel features. Therefore, this simple demo only actively \r
-demonstrates task, queue, timer and interrupt functionality. In addition, the \r
-demo is configured to include malloc failure, idle and stack overflow hook \r
-functions.\r
-\r
-The idle hook function:\r
-The idle hook function queries the amount of FreeRTOS heap space that is\r
-remaining (see vApplicationIdleHook() defined in this file). The demo \r
-application is configured use 7K or the available 8K of RAM as the FreeRTOS heap.\r
-Memory is only allocated from this heap during initialisation, and this demo \r
-only actually uses 1.6K bytes of the configured 7K available - leaving 5.4K \r
-bytes of heap space unallocated.\r
-\r
-The main() Function:\r
-main() creates one software timer, one queue, and two tasks. It then starts the\r
-scheduler.\r
-\r
-The Queue Send Task:\r
-The queue send task is implemented by the prvQueueSendTask() function in this \r
-file. prvQueueSendTask() sits in a loop that causes it to repeatedly block for \r
-200 milliseconds, before sending the value 100 to the queue that was created \r
-within main(). Once the value is sent, the task loops back around to block for\r
-another 200 milliseconds.\r
-\r
-The Queue Receive Task:\r
-The queue receive task is implemented by the prvQueueReceiveTask() function\r
-in this file. prvQueueReceiveTask() sits in a loop that causes repeatedly \r
-attempt to read data from the queue that was created within main(). When data \r
-is received, the task checks the value of the data, and if the value equals \r
-the expected 100, toggles the green LED. The 'block time' parameter passed to \r
-the queue receive function specifies that the task should be held in the Blocked \r
-state indefinitely to wait for data to be available on the queue. The queue \r
-receive task will only leave the Blocked state when the queue send task writes \r
-to the queue. As the queue send task writes to the queue every 200 \r
-milliseconds, the queue receive task leaves the Blocked state every 200 \r
-milliseconds, and therefore toggles the green LED every 200 milliseconds.\r
-\r
-The LED Software Timer and the Button Interrupt:\r
-The user button B1 is configured to generate an interrupt each time it is\r
-pressed. The interrupt service routine switches the red LED on, and resets the \r
-LED software timer. The LED timer has a 5000 millisecond (5 second) period, and\r
-uses a callback function that is defined to just turn the red LED off. \r
-Therefore, pressing the user button will turn the red LED on, and the LED will \r
-remain on until a full five seconds pass without the button being pressed.\r
+* This simple demo project runs on the STM32 Discovery board, which is\r
+* populated with an STM32F100RB Cortex-M3 microcontroller. The discovery board \r
+* makes an ideal low cost evaluation platform, but the 8K of RAM provided on the\r
+* STM32F100RB does not allow the simple application to demonstrate all of all the \r
+* FreeRTOS kernel features. Therefore, this simple demo only actively \r
+* demonstrates task, queue, timer and interrupt functionality. In addition, the \r
+* demo is configured to include malloc failure, idle and stack overflow hook \r
+* functions.\r
+* \r
+* The idle hook function:\r
+* The idle hook function queries the amount of FreeRTOS heap space that is\r
+* remaining (see vApplicationIdleHook() defined in this file). The demo \r
+* application is configured use 7K or the available 8K of RAM as the FreeRTOS heap.\r
+* Memory is only allocated from this heap during initialisation, and this demo \r
+* only actually uses 1.6K bytes of the configured 7K available - leaving 5.4K \r
+* bytes of heap space unallocated.\r
+* \r
+* The main() Function:\r
+* main() creates one software timer, one queue, and two tasks. It then starts the\r
+* scheduler.\r
+* \r
+* The Queue Send Task:\r
+* The queue send task is implemented by the prvQueueSendTask() function in this \r
+* file. prvQueueSendTask() sits in a loop that causes it to repeatedly block for \r
+* 200 milliseconds, before sending the value 100 to the queue that was created \r
+* within main(). Once the value is sent, the task loops back around to block for\r
+* another 200 milliseconds.\r
+* \r
+* The Queue Receive Task:\r
+* The queue receive task is implemented by the prvQueueReceiveTask() function\r
+* in this file. prvQueueReceiveTask() sits in a loop that causes repeatedly \r
+* attempt to read data from the queue that was created within main(). When data \r
+* is received, the task checks the value of the data, and if the value equals \r
+* the expected 100, toggles the green LED. The 'block time' parameter passed to \r
+* the queue receive function specifies that the task should be held in the Blocked \r
+* state indefinitely to wait for data to be available on the queue. The queue \r
+* receive task will only leave the Blocked state when the queue send task writes \r
+* to the queue. As the queue send task writes to the queue every 200 \r
+* milliseconds, the queue receive task leaves the Blocked state every 200 \r
+* milliseconds, and therefore toggles the green LED every 200 milliseconds.\r
+* \r
+* The LED Software Timer and the Button Interrupt:\r
+* The user button B1 is configured to generate an interrupt each time it is\r
+* pressed. The interrupt service routine switches the red LED on, and resets the \r
+* LED software timer. The LED timer has a 5000 millisecond (5 second) period, and\r
+* uses a callback function that is defined to just turn the red LED off. \r
+* Therefore, pressing the user button will turn the red LED on, and the LED will \r
+* remain on until a full five seconds pass without the button being pressed.\r
*/\r
\r
/* Kernel includes. */\r
reduced accordingly. */\r
}\r
}\r
+/*-----------------------------------------------------------*/\r
+\r
+char *pcGetTaskStatusMessage( void )\r
+{\r
+ /* Not bothered about a critical section here although technically because of\r
+ the task priorities the pointer could change it will be atomic if not near\r
+ atomic and its not critical. */\r
+ if( pcStatusMessage == NULL )\r
+ {\r
+ return "All tasks running without error";\r
+ }\r
+ else\r
+ {\r
+ return ( char * ) pcStatusMessage;\r
+ }\r
+}\r
+\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.0.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+ \r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* Standard includes. */\r
+#include <string.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+/* uip includes. */\r
+#include "net/uip.h"\r
+#include "net/uip_arp.h"\r
+#include "apps/httpd/httpd.h"\r
+#include "sys/timer.h"\r
+#include "net/clock-arch.h"\r
+\r
+/* Demo includes. */\r
+#include "ParTest.h"\r
+\r
+#include "EMAC.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* How long to wait before attempting to connect the MAC again. */\r
+#define uipINIT_WAIT ( 100 / portTICK_RATE_MS )\r
+\r
+/* Shortcut to the header within the Rx buffer. */\r
+#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])\r
+\r
+/* Standard constant. */\r
+#define uipTOTAL_FRAME_HEADER_SIZE 54\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Setup the MAC address in the MAC itself, and in the uIP stack.\r
+ */\r
+static void prvSetMACAddress( void );\r
+\r
+/*\r
+ * Port functions required by the uIP stack.\r
+ */\r
+void clock_init( void );\r
+clock_time_t clock_time( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The semaphore used by the ISR to wake the uIP task. */\r
+xSemaphoreHandle xEMACSemaphore = NULL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void clock_init(void)\r
+{\r
+ /* This is done when the scheduler starts. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+clock_time_t clock_time( void )\r
+{\r
+ return xTaskGetTickCount();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vuIP_Task( void *pvParameters )\r
+{\r
+portBASE_TYPE i, xDoneSomething;\r
+uip_ipaddr_t xIPAddr;\r
+struct timer periodic_timer, arp_timer;\r
+\r
+ ( void ) pvParameters;\r
+\r
+ /* Initialise the uIP stack. */\r
+ timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );\r
+ timer_set( &arp_timer, configTICK_RATE_HZ * 10 );\r
+ uip_init();\r
+ uip_ipaddr( &xIPAddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );\r
+ uip_sethostaddr( &xIPAddr );\r
+ uip_ipaddr( &xIPAddr, configNET_MASK0, configNET_MASK1, configNET_MASK2, configNET_MASK3 );\r
+ uip_setnetmask( &xIPAddr );\r
+ prvSetMACAddress();\r
+ httpd_init();\r
+\r
+ /* Create the semaphore used to wake the uIP task. */\r
+ vSemaphoreCreateBinary( xEMACSemaphore );\r
+\r
+ /* Initialise the MAC. */\r
+ vInitEmac();\r
+\r
+ while( lEMACWaitForLink() != pdPASS )\r
+ {\r
+ vTaskDelay( uipINIT_WAIT );\r
+ }\r
+\r
+ for( ;; )\r
+ {\r
+ xDoneSomething = pdFALSE;\r
+ \r
+ /* Is there received data ready to be processed? */\r
+ uip_len = ( unsigned short ) ulEMACRead();\r
+ \r
+ if( ( uip_len > 0 ) && ( uip_buf != NULL ) )\r
+ {\r
+ /* Standard uIP loop taken from the uIP manual. */\r
+ if( xHeader->type == htons( UIP_ETHTYPE_IP ) )\r
+ {\r
+ uip_arp_ipin();\r
+ uip_input();\r
+\r
+ /* If the above function invocation resulted in data that\r
+ should be sent out on the network, the global variable\r
+ uip_len is set to a value > 0. */\r
+ if( uip_len > 0 )\r
+ {\r
+ uip_arp_out();\r
+ vEMACWrite();\r
+ }\r
+ \r
+ xDoneSomething = pdTRUE;\r
+ }\r
+ else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )\r
+ {\r
+ uip_arp_arpin();\r
+\r
+ /* If the above function invocation resulted in data that\r
+ should be sent out on the network, the global variable\r
+ uip_len is set to a value > 0. */\r
+ if( uip_len > 0 )\r
+ {\r
+ vEMACWrite();\r
+ }\r
+ \r
+ xDoneSomething = pdTRUE;\r
+ }\r
+ }\r
+\r
+ if( timer_expired( &periodic_timer ) && ( uip_buf != NULL ) )\r
+ {\r
+ timer_reset( &periodic_timer );\r
+ for( i = 0; i < UIP_CONNS; i++ )\r
+ {\r
+ uip_periodic( i );\r
+\r
+ /* If the above function invocation resulted in data that\r
+ should be sent out on the network, the global variable\r
+ uip_len is set to a value > 0. */\r
+ if( uip_len > 0 )\r
+ {\r
+ uip_arp_out();\r
+ vEMACWrite();\r
+ }\r
+ }\r
+\r
+ /* Call the ARP timer function every 10 seconds. */\r
+ if( timer_expired( &arp_timer ) )\r
+ {\r
+ timer_reset( &arp_timer );\r
+ uip_arp_timer();\r
+ }\r
+ \r
+ xDoneSomething = pdTRUE;\r
+ }\r
+ \r
+ if( xDoneSomething == pdFALSE )\r
+ {\r
+ /* We did not receive a packet, and there was no periodic\r
+ processing to perform. Block for a fixed period. If a packet\r
+ is received during this period we will be woken by the ISR\r
+ giving us the Semaphore. */\r
+ xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 20 );\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetMACAddress( void )\r
+{\r
+struct uip_eth_addr xAddr;\r
+\r
+ /* Configure the MAC address in the uIP stack. */\r
+ xAddr.addr[ 0 ] = configMAC_ADDR0;\r
+ xAddr.addr[ 1 ] = configMAC_ADDR1;\r
+ xAddr.addr[ 2 ] = configMAC_ADDR2;\r
+ xAddr.addr[ 3 ] = configMAC_ADDR3;\r
+ xAddr.addr[ 4 ] = configMAC_ADDR4;\r
+ xAddr.addr[ 5 ] = configMAC_ADDR5;\r
+ uip_setethaddr( xAddr );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationProcessFormInput( char *pcInputString )\r
+{\r
+char *c;\r
+\r
+ /* Only interested in processing form input if this is the IO page. */\r
+ c = strstr( pcInputString, "io.shtml" );\r
+ \r
+ if( c )\r
+ {\r
+ /* Is there a command in the string? */\r
+ c = strstr( pcInputString, "?" );\r
+ if( c )\r
+ {\r
+ /* Turn the LED's on or off in accordance with the check box status. */\r
+ if( strstr( c, "LED0=1" ) != NULL )\r
+ {\r
+ /* Turn the LEDs on. */\r
+ vParTestSetLED( 7, 1 );\r
+ vParTestSetLED( 8, 1 );\r
+ vParTestSetLED( 9, 1 );\r
+ vParTestSetLED( 10, 1 );\r
+ }\r
+ else\r
+ {\r
+ /* Turn the LEDs off. */\r
+ vParTestSetLED( 7, 0 );\r
+ vParTestSetLED( 8, 0 );\r
+ vParTestSetLED( 9, 0 );\r
+ vParTestSetLED( 10, 0 );\r
+ }\r
+ }\r
+ else\r
+ {\r
+ /* Commands to turn LEDs off are not always explicit. */\r
+ vParTestSetLED( 7, 0 );\r
+ vParTestSetLED( 8, 0 );\r
+ vParTestSetLED( 9, 0 );\r
+ vParTestSetLED( 10, 0 );\r
+ }\r
+ }\r
+}\r
+\r
projects / freertos / commitdiff