return ERROR_OK;
}
-static int mg_mflash_probe(void)
+static int mg_mflash_rst(void)
{
mg_init_gpio();
- LOG_INFO("reset mflash");
-
mg_hdrst(0);
if (mg_dsk_wait(mg_io_wait_bsy, MG_OEM_DISK_WAIT_TIME_LONG) != ERROR_OK)
if (mg_dsk_wait(mg_io_wait_not_bsy, MG_OEM_DISK_WAIT_TIME_LONG) != ERROR_OK)
return ERROR_FAIL;
+ LOG_INFO("mflash: reset ok");
+
+ return ERROR_OK;
+}
+
+static int mg_mflash_probe(void)
+{
+ if (mg_mflash_rst() != ERROR_OK)
+ return ERROR_FAIL;
+
if (mg_dsk_drv_info() != ERROR_OK)
return ERROR_FAIL;
return ERROR_OK;
}
-static int mg_mflash_do_write_sects(void *buff, u32 sect_num, u32 sect_cnt)
+static int mg_mflash_do_write_sects(void *buff, u32 sect_num, u32 sect_cnt,
+ mg_io_type_cmd cmd)
{
u32 i, address;
int ret;
u8 *buff_ptr = buff;
duration_t duration;
- if ( mg_dsk_io_cmd(sect_num, sect_cnt, mg_io_cmd_write) != ERROR_OK ) {
- LOG_ERROR("mg_io_cmd_write fail");
+ if ( mg_dsk_io_cmd(sect_num, sect_cnt, cmd) != ERROR_OK )
return ERROR_FAIL;
- }
address = mflash_bank->base + MG_BUFFER_OFFSET;
}
}
- ret = mg_dsk_wait(mg_io_wait_rdy, MG_OEM_DISK_WAIT_TIME_NORMAL);
+ if (cmd == mg_io_cmd_write)
+ ret = mg_dsk_wait(mg_io_wait_rdy, MG_OEM_DISK_WAIT_TIME_NORMAL);
+ else
+ ret = mg_dsk_wait(mg_io_wait_rdy, MG_OEM_DISK_WAIT_TIME_LONG);
return ret;
}
for (i = 0; i < quotient; i++) {
LOG_DEBUG("sect num : %u buff : %0lx", sect_num,
(unsigned long)buff_ptr);
- mg_mflash_do_write_sects(buff_ptr, sect_num, 256);
+ mg_mflash_do_write_sects(buff_ptr, sect_num, 256, mg_io_cmd_write);
sect_num += 256;
buff_ptr += 256 * MG_MFLASH_SECTOR_SIZE;
}
if (residue) {
LOG_DEBUG("sect num : %u buff : %0lx", sect_num,
(unsigned long)buff_ptr);
- mg_mflash_do_write_sects(buff_ptr, sect_num, residue);
+ mg_mflash_do_write_sects(buff_ptr, sect_num, residue, mg_io_cmd_write);
}
return ERROR_OK;
return ERROR_OK;
}
+
+static int mg_set_feature(mg_feature_id feature, mg_feature_val config)
+{
+ target_t *target = mflash_bank->target;
+ u32 mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
+
+ if (mg_dsk_wait(mg_io_wait_rdy_noerr, MG_OEM_DISK_WAIT_TIME_NORMAL)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ target_write_u8(target, mg_task_reg + MG_REG_FEATURE, feature);
+ target_write_u8(target, mg_task_reg + MG_REG_SECT_CNT, config);
+ target_write_u8(target, mg_task_reg + MG_REG_COMMAND,
+ mg_io_cmd_set_feature);
+
+ return ERROR_OK;
+}
+
+static int mg_is_valid_pll(double XIN, int N, double CLK_OUT, int NO)
+{
+ double v1 = XIN / N;
+ double v2 = CLK_OUT * NO;
+
+ if (v1 <1000000 || v1 > 15000000 || v2 < 100000000 || v2 > 500000000)
+ return ERROR_FAIL;
+
+ return ERROR_OK;
+}
+
+static int mg_pll_get_M(unsigned short feedback_div)
+{
+ int i, M;
+
+ for (i = 1, M=0; i < 512; i <<= 1, feedback_div >>= 1)
+ M += (feedback_div & 1) * i;
+
+ return M + 2;
+}
+
+static int mg_pll_get_N(unsigned char input_div)
+{
+ int i, N;
+
+ for (i = 1, N = 0; i < 32; i <<= 1, input_div >>= 1)
+ N += (input_div & 1) * i;
+
+ return N + 2;
+}
+
+static int mg_pll_get_NO(unsigned char output_div)
+{
+ int i, NO;
+
+ for (i = 0, NO = 1; i < 2; ++i, output_div >>= 1)
+ if(output_div & 1)
+ NO = NO << 1;
+
+ return NO;
+}
+
+static double mg_do_calc_pll(double XIN, mg_pll_t * p_pll_val, int is_approximate)
+{
+ unsigned short i;
+ unsigned char j, k;
+ int M, N, NO;
+ double CLK_OUT;
+ double DIV = 1;
+ double ROUND = 0;
+
+ if (is_approximate) {
+ DIV = 1000000;
+ ROUND = 500000;
+ }
+
+ for (i = 0; i < MG_PLL_MAX_FEEDBACKDIV_VAL ; ++i) {
+ M = mg_pll_get_M(i);
+
+ for (j = 0; j < MG_PLL_MAX_INPUTDIV_VAL ; ++j) {
+ N = mg_pll_get_N(j);
+
+ for (k = 0; k < MG_PLL_MAX_OUTPUTDIV_VAL ; ++k) {
+ NO = mg_pll_get_NO(k);
+
+ CLK_OUT = XIN * ((double)M / N) / NO;
+
+ if ((int)((CLK_OUT+ROUND) / DIV)
+ == (int)(MG_PLL_CLK_OUT / DIV)) {
+ if (mg_is_valid_pll(XIN, N, CLK_OUT, NO) == ERROR_OK)
+ {
+ p_pll_val->lock_cyc = (int)(XIN * MG_PLL_STD_LOCKCYCLE / MG_PLL_STD_INPUTCLK);
+ p_pll_val->feedback_div = i;
+ p_pll_val->input_div = j;
+ p_pll_val->output_div = k;
+
+ return CLK_OUT;
+ }
+ }
+ }
+ }
+ }
+
+ return 0;
+}
+
+static double mg_calc_pll(double XIN, mg_pll_t *p_pll_val)
+{
+ double CLK_OUT;
+
+ CLK_OUT = mg_do_calc_pll(XIN, p_pll_val, 0);
+
+ if (!CLK_OUT)
+ return mg_do_calc_pll(XIN, p_pll_val, 1);
+ else
+ return CLK_OUT;
+}
+
+static int mg_verify_interface(void)
+{
+ u16 buff[MG_MFLASH_SECTOR_SIZE >> 1];
+ u16 i, j;
+ u32 address = mflash_bank->base + MG_BUFFER_OFFSET;
+ target_t *target = mflash_bank->target;
+
+ for (j = 0; j < 10; j++) {
+ for (i = 0; i < MG_MFLASH_SECTOR_SIZE >> 1; i++)
+ buff[i] = i;
+
+ target->type->write_memory(target, address, 2,
+ MG_MFLASH_SECTOR_SIZE / 2, (u8 *)buff);
+
+ memset(buff, 0xff, MG_MFLASH_SECTOR_SIZE);
+
+ target->type->read_memory(target, address, 2,
+ MG_MFLASH_SECTOR_SIZE / 2, (u8 *)buff);
+
+ for (i = 0; i < MG_MFLASH_SECTOR_SIZE >> 1; i++) {
+ if (buff[i] != i) {
+ LOG_ERROR("mflash: verify interface fail");
+ return ERROR_FAIL;
+ }
+ }
+ }
+
+ LOG_INFO("mflash: verify interface ok");
+ return ERROR_OK;
+}
+
+static const char g_strSEG_SerialNum[20] = {
+ 'G','m','n','i','-','e','e','S','g','a','e','l',
+ 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20
+};
+
+static const char g_strSEG_FWRev[8] = {
+ 'F','X','L','T','2','v','0','.'
+};
+
+static const char g_strSEG_ModelNum[40] = {
+ 'F','X','A','L','H','S','2',0x20,'0','0','s','7',
+ 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,
+ 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,
+ 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20
+};
+
+static void mg_gen_ataid(mg_io_type_drv_info *pSegIdDrvInfo)
+{
+ /* b15 is ATA device(0) , b7 is Removable Media Device */
+ pSegIdDrvInfo->general_configuration = 0x045A;
+ /* 128MB : Cylinder=> 977 , Heads=> 8 , Sectors=> 32
+ * 256MB : Cylinder=> 980 , Heads=> 16 , Sectors=> 32
+ * 384MB : Cylinder=> 745 , Heads=> 16 , Sectors=> 63
+ */
+ pSegIdDrvInfo->number_of_cylinders = 0x02E9;
+ pSegIdDrvInfo->reserved1 = 0x0;
+ pSegIdDrvInfo->number_of_heads = 0x10;
+ pSegIdDrvInfo->unformatted_bytes_per_track = 0x0;
+ pSegIdDrvInfo->unformatted_bytes_per_sector = 0x0;
+ pSegIdDrvInfo->sectors_per_track = 0x3F;
+ pSegIdDrvInfo->vendor_unique1[0] = 0x000B;
+ pSegIdDrvInfo->vendor_unique1[1] = 0x7570;
+ pSegIdDrvInfo->vendor_unique1[2] = 0x8888;
+
+ memcpy(pSegIdDrvInfo->serial_number, (void *)g_strSEG_SerialNum,20);
+ /* 0x2 : dual buffer */
+ pSegIdDrvInfo->buffer_type = 0x2;
+ /* buffer size : 2KB */
+ pSegIdDrvInfo->buffer_sector_size = 0x800;
+ pSegIdDrvInfo->number_of_ecc_bytes = 0;
+
+ memcpy(pSegIdDrvInfo->firmware_revision, (void *)g_strSEG_FWRev,8);
+
+ memcpy(pSegIdDrvInfo->model_number, (void *)g_strSEG_ModelNum,40);
+
+ pSegIdDrvInfo->maximum_block_transfer = 0x4;
+ pSegIdDrvInfo->vendor_unique2 = 0x0;
+ pSegIdDrvInfo->dword_io = 0x00;
+ /* b11 : IORDY support(PIO Mode 4), b10 : Disable/Enbale IORDY
+ * b9 : LBA support, b8 : DMA mode support
+ */
+ pSegIdDrvInfo->capabilities = 0x1 << 9;
+
+ pSegIdDrvInfo->reserved2 = 0x4000;
+ pSegIdDrvInfo->vendor_unique3 = 0x00;
+ /* PIOMode-2 support */
+ pSegIdDrvInfo->pio_cycle_timing_mode = 0x02;
+ pSegIdDrvInfo->vendor_unique4 = 0x00;
+ /* MultiWord-2 support */
+ pSegIdDrvInfo->dma_cycle_timing_mode = 0x00;
+ /* b1 : word64~70 is valid
+ * b0 : word54~58 are valid and reflect the current numofcyls,heads,sectors
+ * b2 : If device supports Ultra DMA , set to one to vaildate word88
+ */
+ pSegIdDrvInfo->translation_fields_valid = (0x1 << 1) | (0x1 << 0);
+ pSegIdDrvInfo->number_of_current_cylinders = 0x02E9;
+ pSegIdDrvInfo->number_of_current_heads = 0x10;
+ pSegIdDrvInfo->current_sectors_per_track = 0x3F;
+ pSegIdDrvInfo->current_sector_capacity_lo = 0x7570;
+ pSegIdDrvInfo->current_sector_capacity_hi = 0x000B;
+
+ pSegIdDrvInfo->multi_sector_count = 0x04;
+ /* b8 : Multiple secotr setting valid , b[7:0] num of secotrs per block */
+ pSegIdDrvInfo->multi_sector_setting_valid = 0x01;
+ pSegIdDrvInfo->total_user_addressable_sectors_lo = 0x7570;
+ pSegIdDrvInfo->total_user_addressable_sectors_hi = 0x000B;
+ pSegIdDrvInfo->single_dma_modes_supported = 0x00;
+ pSegIdDrvInfo->single_dma_transfer_active = 0x00;
+ /* b2 :Multi-word DMA mode 2, b1 : Multi-word DMA mode 1 */
+ pSegIdDrvInfo->multi_dma_modes_supported = (0x1 << 0);
+ /* b2 :Multi-word DMA mode 2, b1 : Multi-word DMA mode 1 */
+ pSegIdDrvInfo->multi_dma_transfer_active = (0x1 << 0);
+ /* b0 : PIO Mode-3 support, b1 : PIO Mode-4 support */
+ pSegIdDrvInfo->adv_pio_mode = 0x00;
+ /* 480(0x1E0)nsec for Multi-word DMA mode0
+ * 150(0x96) nsec for Multi-word DMA mode1
+ * 120(0x78) nsec for Multi-word DMA mode2
+ */
+ pSegIdDrvInfo->min_dma_cyc = 0x1E0;
+ pSegIdDrvInfo->recommend_dma_cyc = 0x1E0;
+ pSegIdDrvInfo->min_pio_cyc_no_iordy = 0x1E0;
+ pSegIdDrvInfo->min_pio_cyc_with_iordy = 0x1E0;
+ memset((void *)pSegIdDrvInfo->reserved3, 0x00, 22);
+ /* b7 : ATA/ATAPI-7 ,b6 : ATA/ATAPI-6 ,b5 : ATA/ATAPI-5,b4 : ATA/ATAPI-4 */
+ pSegIdDrvInfo->major_ver_num = 0x7E;
+ /* 0x1C : ATA/ATAPI-6 T13 1532D revision1 */
+ pSegIdDrvInfo->minor_ver_num = 0x19;
+ /* NOP/READ BUFFER/WRITE BUFFER/Power management feature set support */
+ pSegIdDrvInfo->feature_cmd_set_suprt0 = 0x7068;
+ /* Features/command set is valid/Advanced Pwr management/CFA feature set
+ * not support
+ */
+ pSegIdDrvInfo->feature_cmd_set_suprt1 = 0x400C;
+ pSegIdDrvInfo->feature_cmd_set_suprt2 = 0x4000;
+ /* READ/WRITE BUFFER/PWR Management enable */
+ pSegIdDrvInfo->feature_cmd_set_en0 = 0x7000;
+ /* CFA feature is disabled / Advancde power management disable */
+ pSegIdDrvInfo->feature_cmd_set_en1 = 0x0;
+ pSegIdDrvInfo->feature_cmd_set_en2 = 0x4000;
+ pSegIdDrvInfo->reserved4 = 0x0;
+ /* 0x1 * 2minutes */
+ pSegIdDrvInfo->req_time_for_security_er_done = 0x19;
+ pSegIdDrvInfo->req_time_for_enhan_security_er_done = 0x19;
+ /* Advanced power management level 1 */
+ pSegIdDrvInfo->adv_pwr_mgm_lvl_val = 0x0;
+ pSegIdDrvInfo->reserved5 = 0x0;
+ memset((void *)pSegIdDrvInfo->reserved6, 0x00, 68);
+ /* Security mode feature is disabled */
+ pSegIdDrvInfo->security_stas = 0x0;
+ memset((void *)pSegIdDrvInfo->vendor_uniq_bytes, 0x00, 62);
+ /* CFA power mode 1 support in maximum 200mA */
+ pSegIdDrvInfo->cfa_pwr_mode = 0x0100;
+ memset((void *)pSegIdDrvInfo->reserved7, 0x00, 190);
+}
+
+static int mg_storage_config(void)
+{
+ u8 buff[512];
+
+ if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ mg_gen_ataid((mg_io_type_drv_info *)buff);
+
+ if (mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_stgdrvinfo)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ LOG_INFO("mflash: storage config ok");
+ return ERROR_OK;
+}
+
+static int mg_boot_config(void)
+{
+ u8 buff[512];
+
+ if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ memset(buff, 0xff, 512);
+
+ buff[0] = mg_op_mode_snd; /* operation mode */
+ buff[1] = MG_UNLOCK_OTP_AREA;
+ buff[2] = 4; /* boot size */
+ *((u32 *)(buff + 4)) = 0; /* XIP size */
+
+ if (mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_xipinfo)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ LOG_INFO("mflash: boot config ok");
+ return ERROR_OK;
+}
+
+static int mg_set_pll(mg_pll_t *pll)
+{
+ u8 buff[512];
+
+ memset(buff, 0xff, 512);
+ *((u32 *)&buff[0]) = pll->lock_cyc; /* PLL Lock cycle */
+ *((u16 *)&buff[4]) = pll->feedback_div; /* PLL Feedback 9bit Divider */
+ buff[6] = pll->input_div; /* PLL Input 5bit Divider */
+ buff[7] = pll->output_div; /* PLL Output Divider */
+
+ if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ if (mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_wr_pll)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ LOG_INFO("mflash: set pll ok");
+ return ERROR_OK;
+}
+
+static int mg_erase_nand(void)
+{
+ if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ if (mg_mflash_do_write_sects(NULL, 0, 0, mg_vcmd_purge_nand)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ if (mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default)
+ != ERROR_OK)
+ return ERROR_FAIL;
+
+ LOG_INFO("mflash: erase nand ok");
+ return ERROR_OK;
+}
+
+int mg_config_cmd(struct command_context_s *cmd_ctx, char *cmd,
+ char **args, int argc)
+{
+ double fin, fout;
+ mg_pll_t pll;
+
+ if (mg_verify_interface() != ERROR_OK)
+ return ERROR_FAIL;
+
+ if (mg_mflash_rst() != ERROR_OK)
+ return ERROR_FAIL;
+
+ switch (argc) {
+ case 2:
+ if (!strcmp(args[1], "boot")) {
+ if (mg_boot_config() != ERROR_OK)
+ return ERROR_FAIL;
+
+ return ERROR_OK;
+ } else if (!strcmp(args[1], "storage")) {
+ if (mg_storage_config() != ERROR_OK)
+ return ERROR_FAIL;
+
+ return ERROR_OK;
+ } else
+ return ERROR_COMMAND_NOTFOUND;
+ break;
+ case 3:
+ if (!strcmp(args[1], "pll")) {
+ fin = strtoul(args[2], NULL, 0);
+
+ if (fin > MG_PLL_CLK_OUT)
+ return ERROR_FAIL;
+
+ fout = mg_calc_pll(fin, &pll);
+
+ if (!fout)
+ return ERROR_FAIL;
+
+ LOG_INFO("mflash: Fout=%u Hz, feedback=%u,"
+ "indiv=%u, outdiv=%u, lock=%u",
+ (u32)fout, pll.feedback_div,
+ pll.input_div, pll.output_div,
+ pll.lock_cyc);
+
+ if (mg_erase_nand() != ERROR_OK)
+ return ERROR_FAIL;
+
+ if (mg_set_pll(&pll) != ERROR_OK)
+ return ERROR_FAIL;
+
+ return ERROR_OK;
+ } else
+ return ERROR_COMMAND_NOTFOUND;
+ break;
+ default:
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ return ERROR_OK;
+}
+
int mflash_init_drivers(struct command_context_s *cmd_ctx)
{
if (mflash_bank) {
"mflash write <num> <file> <address>");
register_command(cmd_ctx, mflash_cmd, "dump", mg_dump_cmd, COMMAND_EXEC,
"mflash dump <num> <file> <address> <size>");
+ register_command(cmd_ctx, mflash_cmd, "config", mg_config_cmd,
+ COMMAND_EXEC, "mflash config <num> <stage>");
}
return ERROR_OK;
projects / openocd / commitdiff