]> git.sur5r.net Git - openocd/commitdiff
arm926ejs: retire cp15 commands, handled by mrc/mcr.
authorØyvind Harboe <oyvind.harboe@zylin.com>
Mon, 26 Oct 2009 13:08:43 +0000 (14:08 +0100)
committerØyvind Harboe <oyvind.harboe@zylin.com>
Mon, 23 Nov 2009 13:02:03 +0000 (14:02 +0100)
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
doc/openocd.texi
src/target/arm926ejs.c
tcl/board/dm355evm.cfg
tcl/board/openrd.cfg
tcl/board/sheevaplug.cfg

index 9659e929f57ed3e1d60422b4a8d3a6b824144584..cff7fc5e6cdf689dd9164faa9ed53d2d76d449e2 100644 (file)
@@ -5704,13 +5704,6 @@ they are not built from ARM926ej-s designs.
 Print information about the caches found.
 @end deffn
 
-@deffn Command {arm926ejs cp15} opcode1 opcode2 CRn CRm regnum [value]
-Accesses cp15 register @var{regnum} using
-@var{opcode1}, @var{opcode2}, @var{CRn}, and @var{CRm}.
-If a @var{value} is provided, that value is written to that register.
-Else that register is read and displayed.
-@end deffn
-
 @subsection ARM966E specific commands
 @cindex ARM966E
 
index 56d86cc15d7ca9f8d9794a7fe671da685da3b224..24488c4084af10e6b0eba4ab5866150602e2dea7 100644 (file)
@@ -713,67 +713,6 @@ static int arm926ejs_target_create(struct target *target, Jim_Interp *interp)
        return arm926ejs_init_arch_info(target, arm926ejs, target->tap);
 }
 
-COMMAND_HANDLER(arm926ejs_handle_cp15_command)
-{
-       int retval;
-       struct target *target = get_current_target(CMD_CTX);
-       struct arm926ejs_common *arm926ejs = target_to_arm926(target);
-       int opcode_1;
-       int opcode_2;
-       int CRn;
-       int CRm;
-
-       if ((CMD_ARGC < 4) || (CMD_ARGC > 5))
-       {
-               command_print(CMD_CTX, "usage: arm926ejs cp15 <opcode_1> <opcode_2> <CRn> <CRm> [value]");
-               return ERROR_OK;
-       }
-
-       COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], opcode_1);
-       COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], opcode_2);
-       COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], CRn);
-       COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], CRm);
-
-       retval = arm926ejs_verify_pointer(CMD_CTX, arm926ejs);
-       if (retval != ERROR_OK)
-               return retval;
-
-       if (target->state != TARGET_HALTED)
-       {
-               command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
-               return ERROR_OK;
-       }
-
-       if (CMD_ARGC == 4)
-       {
-               uint32_t value;
-               if ((retval = arm926ejs->read_cp15(target, opcode_1, opcode_2, CRn, CRm, &value)) != ERROR_OK)
-               {
-                       command_print(CMD_CTX, "couldn't access register");
-                       return ERROR_OK;
-               }
-               if ((retval = jtag_execute_queue()) != ERROR_OK)
-               {
-                       return retval;
-               }
-
-               command_print(CMD_CTX, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
-       }
-       else
-       {
-               uint32_t value;
-               COMMAND_PARSE_NUMBER(u32, CMD_ARGV[4], value);
-               if ((retval = arm926ejs->write_cp15(target, opcode_1, opcode_2, CRn, CRm, value)) != ERROR_OK)
-               {
-                       command_print(CMD_CTX, "couldn't access register");
-                       return ERROR_OK;
-               }
-               command_print(CMD_CTX, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
-       }
-
-       return ERROR_OK;
-}
-
 COMMAND_HANDLER(arm926ejs_handle_cache_info_command)
 {
        int retval;
@@ -829,11 +768,6 @@ int arm926ejs_register_commands(struct command_context *cmd_ctx)
                NULL, COMMAND_ANY,
                "arm926ejs specific commands");
 
-       register_command(cmd_ctx, arm926ejs_cmd, "cp15",
-               arm926ejs_handle_cp15_command, COMMAND_EXEC,
-               "display/modify cp15 register "
-               "<opcode_1> <opcode_2> <CRn> <CRm> [value]");
-
        register_command(cmd_ctx, arm926ejs_cmd, "cache_info",
                arm926ejs_handle_cache_info_command, COMMAND_EXEC,
                "display information about target caches");
index 1f814b2be10d23a2e24f3b2fc12e4fc0c2cdb493..2e298b7e7bf0b55a94046fad595f120b4fa379d6 100644 (file)
@@ -182,7 +182,7 @@ proc dm355evm_init {} {
        ########################
 
        # turn on icache - set I bit in cp15 register c1
-       arm926ejs cp15 0 0 1 0 0x00051078
+       mcr 0 0 1 0 0x00051078
 }
 
 # NAND -- socket has two chipselects, MT29F16G08FAA puts 1GByte on each one.
index e8784d402558e6774e400a7a492a32f6f7ef13d6..4bc708dadadd79d68709763a9910e2a275740d71 100644 (file)
@@ -29,7 +29,7 @@ proc openrd_init { } {
        jtag_reset 0 0
        wait_halt
 
-       arm926ejs cp15 0 0 1 0 0x00052078
+       mcr 0 0 1 0 0x00052078
 
        mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
        mww 0xD0001404 0x37543000 #  Dunit Control Low Register
index afd621a7b16de294740a298f20f919a0201b8af8..8e8396d7eb4d13c281c62ea4152ce2c204ac3334 100644 (file)
@@ -29,7 +29,7 @@ proc sheevaplug_init { } {
        jtag_reset 0 0
        wait_halt
 
-       arm926ejs cp15 0 0 1 0 0x00052078
+       mcr 0 0 1 0 0x00052078
 
        mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
        mww 0xD0001404 0x39543000 #  Dunit Control Low Register