--- /dev/null
+\r
+/*\r
+ * File: mcf5xxx.s\r
+ * Purpose: Lowest level routines for all ColdFire processors.\r
+ *\r
+ * Notes:\r
+ *\r
+ * File provided by FreeScale.\r
+ */\r
+\r
+ .global french_cheese\r
+\r
+ .text\r
+\r
+/********************************************************************\r
+ * This routine is the lowest-level exception handler.\r
+ */\r
+ /*\r
+asm_exception_handler:\r
+_asm_exception_handler:\r
+ lea -16(SP),SP\r
+ movem.l D0-D1/A0-A1,(SP)\r
+ lea 16(SP),A1\r
+ move.l A1,-(SP)\r
+ jsr mcf5xxx_exception_handler\r
+ lea 4(SP),SP\r
+ movem.l (SP),D0-D1/A0-A1\r
+ lea 16(SP),SP\r
+ rte\r
+\r
+/********************************************************************/\r
+/*\r
+ * This routines changes the IPL to the value passed into the routine.\r
+ * It also returns the old IPL value back.\r
+ * Calling convention from C:\r
+ * old_ipl = asm_set_ipl(new_ipl);\r
+ * For the Diab Data C compiler, it passes return value thru D0.\r
+ * Note that only the least significant three bits of the passed\r
+ * value are used.\r
+ */\r
+\r
+french_cheese:\r
+ link A6,#-8\r
+ movem.l D6-D7,(SP)\r
+\r
+ move.w SR,D7 /* current sr */\r
+\r
+ move.l D7,D0 /* prepare return value */\r
+ andi.l #0x0700,D0 /* mask out IPL */\r
+ lsr.l #8,D0 /* IPL */\r
+\r
+ move.l 8(A6),D6 /* get argument */\r
+ andi.l #0x07,D6 /* least significant three bits */\r
+ lsl.l #8,D6 /* move over to make mask */\r
+\r
+ andi.l #0x0000F8FF,D7 /* zero out current IPL */\r
+ or.l D6,D7 /* place new IPL in sr */\r
+ move.w D7,SR\r
+\r
+ movem.l (SP),D6-D7\r
+ lea 8(SP),SP\r
+ unlk A6\r
+ rts\r
+\r
+/********************************************************************/\r
+ .end\r
+\r
+\r
+\r
+\r
+#if 0\r
+\r
+/*\r
+ * File: mcf5xxx.s\r
+ * Purpose: Lowest level routines for all ColdFire processors.\r
+ *\r
+ * Notes:\r
+ *\r
+ */\r
+\r
+#define mcf5xxx_exception_handler _mcf5xxx_exception_handler\r
+\r
+ .extern mcf5xxx_exception_handler\r
+\r
+ //.global asm_exception_handler\r
+ //.global _asm_exception_handler\r
+ .global asm_set_ipl\r
+ .global _asm_set_ipl\r
+ .global mcf5xxx_exe_wdebug\r
+ .global _mcf5xxx_exe_wdebug\r
+ //.global mcf5xxx_wr_cacr\r
+ //.global _mcf5xxx_wr_cacr\r
+ .global mcf5xxx_wr_asid\r
+ .global _mcf5xxx_wr_asid\r
+ .global mcf5xxx_wr_acr0\r
+ .global _mcf5xxx_wr_acr0\r
+ .global mcf5xxx_wr_acr1\r
+ .global _mcf5xxx_wr_acr1\r
+ .global mcf5xxx_wr_acr2\r
+ .global _mcf5xxx_wr_acr2\r
+ .global mcf5xxx_wr_acr3\r
+ .global _mcf5xxx_wr_acr3\r
+ .global mcf5xxx_wr_mmubar\r
+ .global _mcf5xxx_wr_mmubar\r
+ .global mcf5xxx_wr_other_a7\r
+ .global _mcf5xxx_wr_other_a7\r
+ // .global mcf5xxx_wr_vbr\r
+ // .global _mcf5xxx_wr_vbr\r
+ .global mcf5xxx_wr_macsr\r
+ .global _mcf5xxx_wr_macsr\r
+ .global mcf5xxx_wr_mask\r
+ .global _mcf5xxx_wr_mask\r
+ .global mcf5xxx_wr_acc0\r
+ .global _mcf5xxx_wr_acc0\r
+ .global mcf5xxx_wr_accext01\r
+ .global _mcf5xxx_wr_accext01\r
+ .global mcf5xxx_wr_accext23\r
+ .global _mcf5xxx_wr_accext23\r
+ .global mcf5xxx_wr_acc1\r
+ .global _mcf5xxx_wr_acc1\r
+ .global mcf5xxx_wr_acc2\r
+ .global _mcf5xxx_wr_acc2\r
+ .global mcf5xxx_wr_acc3\r
+ .global _mcf5xxx_wr_acc3\r
+ .global mcf5xxx_wr_sr\r
+ .global _mcf5xxx_wr_sr\r
+ .global mcf5xxx_wr_pc\r
+ .global _mcf5xxx_wr_pc\r
+ .global mcf5xxx_wr_rombar0\r
+ .global _mcf5xxx_wr_rombar0\r
+ .global mcf5xxx_wr_rombar1\r
+ .global _mcf5xxx_wr_rombar1\r
+ .global mcf5xxx_wr_rambar0\r
+ .global _mcf5xxx_wr_rambar0\r
+ .global mcf5xxx_wr_rambar1\r
+ .global _mcf5xxx_wr_rambar1\r
+ .global mcf5xxx_wr_mpcr\r
+ .global _mcf5xxx_wr_mpcr\r
+ .global mcf5xxx_wr_secmbar\r
+ .global _mcf5xxx_wr_secmbar\r
+ .global mcf5xxx_wr_mbar\r
+ .global _mcf5xxx_wr_mbar\r
+\r
+ .text\r
+\r
+/********************************************************************\r
+ * This routine is the lowest-level exception handler.\r
+ */\r
+ /*\r
+asm_exception_handler:\r
+_asm_exception_handler:\r
+ lea -16(SP),SP\r
+ movem.l D0-D1/A0-A1,(SP)\r
+ lea 16(SP),A1\r
+ move.l A1,-(SP)\r
+ jsr mcf5xxx_exception_handler\r
+ lea 4(SP),SP\r
+ movem.l (SP),D0-D1/A0-A1\r
+ lea 16(SP),SP\r
+ rte\r
+\r
+/********************************************************************/\r
+/*\r
+ * This routines changes the IPL to the value passed into the routine.\r
+ * It also returns the old IPL value back.\r
+ * Calling convention from C:\r
+ * old_ipl = asm_set_ipl(new_ipl);\r
+ * For the Diab Data C compiler, it passes return value thru D0.\r
+ * Note that only the least significant three bits of the passed\r
+ * value are used.\r
+ */\r
+\r
+asm_set_ipl:\r
+_asm_set_ipl:\r
+ link A6,#-8\r
+ movem.l D6-D7,(SP)\r
+\r
+ move.w SR,D7 /* current sr */\r
+\r
+ move.l D7,D0 /* prepare return value */\r
+ andi.l #0x0700,D0 /* mask out IPL */\r
+ lsr.l #8,D0 /* IPL */\r
+\r
+ move.l 8(A6),D6 /* get argument */\r
+ andi.l #0x07,D6 /* least significant three bits */\r
+ lsl.l #8,D6 /* move over to make mask */\r
+\r
+ andi.l #0x0000F8FF,D7 /* zero out current IPL */\r
+ or.l D6,D7 /* place new IPL in sr */\r
+ move.w D7,SR\r
+\r
+ movem.l (SP),D6-D7\r
+ lea 8(SP),SP\r
+ unlk A6\r
+ rts\r
+\r
+/********************************************************************/\r
+/*\r
+ * These routines execute special ColdFire instructions\r
+ */\r
+\r
+mcf5xxx_exe_wdebug:\r
+_mcf5xxx_exe_wdebug:\r
+ move.l 4(sp),a0\r
+ wdebug.l (a0)\r
+ rts\r
+\r
+/********************************************************************/\r
+/*\r
+ * These routines write to the special purpose registers in the ColdFire\r
+ * core. Since these registers are write-only in the supervisor model,\r
+ * no corresponding read routines exist.\r
+ */\r
+\r
+mcf5xxx_wr_sr:\r
+_mcf5xxx_wr_sr:\r
+ move.l 4(SP),D0\r
+ move.w D0,SR\r
+ rts\r
+/*\r
+mcf5xxx_wr_cacr:\r
+_mcf5xxx_wr_cacr:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0002 /* movec d0,cacr */\r
+/*\r
+ nop\r
+ rts\r
+*/\r
+mcf5xxx_wr_asid:\r
+_mcf5xxx_wr_asid:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0003 /* movec d0,asid */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_acr0:\r
+_mcf5xxx_wr_acr0:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0004 /* movec d0,ACR0 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_acr1:\r
+_mcf5xxx_wr_acr1:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0005 /* movec d0,ACR1 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_acr2:\r
+_mcf5xxx_wr_acr2:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0006 /* movec d0,ACR2 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_acr3:\r
+_mcf5xxx_wr_acr3:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0007 /* movec d0,ACR3 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_mmubar:\r
+_mcf5xxx_wr_mmubar:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0008 /* movec d0,MBAR */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_other_a7:\r
+_mcf5xxx_wr_other_a7:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0800 /* movec d0,OTHER_A7 */\r
+ nop\r
+ rts\r
+\r
+/*\r
+mcf5xxx_wr_vbr:\r
+_mcf5xxx_wr_vbr:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0801 /* movec d0,VBR */\r
+ /*\r
+ nop\r
+ rts\r
+*/\r
+mcf5xxx_wr_macsr:\r
+_mcf5xxx_wr_macsr:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0804 /* movec d0,MACSR */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_mask:\r
+_mcf5xxx_wr_mask:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0805 /* movec d0,MASK */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_acc0:\r
+_mcf5xxx_wr_acc0:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0806 /* movec d0,ACC0 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_accext01:\r
+_mcf5xxx_wr_accext01:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0807 /* movec d0,ACCEXT01 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_accext23:\r
+_mcf5xxx_wr_accext23:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0808 /* movec d0,ACCEXT23 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_acc1:\r
+_mcf5xxx_wr_acc1:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0809 /* movec d0,ACC1 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_acc2:\r
+_mcf5xxx_wr_acc2:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b080A /* movec d0,ACC2 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_acc3:\r
+_mcf5xxx_wr_acc3:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b080B /* movec d0,ACC3 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_pc:\r
+_mcf5xxx_wr_pc:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b080F /* movec d0,PC */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_rombar0:\r
+_mcf5xxx_wr_rombar0:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0C00 /* movec d0,ROMBAR0 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_rombar1:\r
+_mcf5xxx_wr_rombar1:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0C01 /* movec d0,ROMBAR1 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_rambar0:\r
+_mcf5xxx_wr_rambar0:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0C04 /* movec d0,RAMBAR0 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_rambar1:\r
+_mcf5xxx_wr_rambar1:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0C05 /* movec d0,RAMBAR1 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_mpcr:\r
+_mcf5xxx_wr_mpcr:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0C0C /* movec d0,MPCR */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_secmbar:\r
+_mcf5xxx_wr_secmbar:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0C0E /* movec d0,MBAR1 */\r
+ nop\r
+ rts\r
+\r
+mcf5xxx_wr_mbar:\r
+_mcf5xxx_wr_mbar:\r
+ move.l 4(SP),D0\r
+ .long 0x4e7b0C0F /* movec d0,MBAR0 */\r
+ nop\r
+ rts\r
+\r
+/********************************************************************/\r
+ .end\r
+\r
+#endif\r
--- /dev/null
+/*\r
+ FreeRTOS.org V5.0.3 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section\r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* Kernel includes. */\r
+\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+ return NULL;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
--- /dev/null
+/*\r
+ FreeRTOS.org V5.0.3 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and \r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety \r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting, \r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+/* System include files */\r
+#include <plib.h>\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions. \r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned long\r
+#define portBASE_TYPE long\r
+\r
+#if( configUSE_16_BIT_TICKS == 1 )\r
+ typedef unsigned portSHORT portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned portLONG portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Hardware specifics. */\r
+#define portBYTE_ALIGNMENT 4\r
+#define portSTACK_GROWTH -4\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+/*-----------------------------------------------------------*/\r
+\r
+#define portDISABLE_INTERRUPTS()\r
+#define portENABLE_INTERRUPTS()\r
+\r
+\r
+extern void vTaskEnterCritical( void );\r
+extern void vTaskExitCritical( void );\r
+#define portENTER_CRITICAL() vPortEnterCritical()\r
+#define portEXIT_CRITICAL() vPortExitCritical()\r
+\r
+extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR();\r
+extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );\r
+#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task utilities. */\r
+\r
+#define portYIELD()\r
+\r
+\r
+#define portNOP() asm volatile ( "nop" )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__((noreturn))\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+/*-----------------------------------------------------------*/\r
+\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) \\r
+ { \\r
+ portYIELD(); \\r
+ }\r
+\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r