Tidy up new port file.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@667 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Source/portable/IAR/78K0R/port.c b/Source/portable/IAR/78K0R/port.c
index c6de3cd031b91226b7659503a8abd5c524a19289..ac9756e1c56ba82611d61c3af5aa57ad3701ee3e 100644 (file)
--- a/Source/portable/IAR/78K0R/port.c
+++ b/Source/portable/IAR/78K0R/port.c
@@ -65,7 +65,7 @@
  *   |||------------------- Auxiliary Cary Flag cleared\r
  *   ||-------------------- Register bank Select 1 Flag cleared\r
  *   |--------------------- Zero Flag set\r
- *   ---------------------- Global Interrupt Flag set\r
+ *   ---------------------- Global Interrupt Flag set (enabled)\r
  */\r
 #define portPSW                  (( portSTACK_TYPE ) 0xC600)\r
 \r
@@ -75,26 +75,27 @@ typedef void tskTCB;
 extern volatile tskTCB * volatile pxCurrentTCB;\r
 \r
 /* Most ports implement critical sections by placing the interrupt flags on\r
- * the stack before disabling interrupts.  Exiting the critical section is then\r
- * simply a case of popping the flags from the stack.  As 78K0 IAR does not use\r
- * a frame pointer this cannot be done as modifying the stack will clobber all\r
- * the stack variables.  Instead each task maintains a count of the critical\r
- * section nesting depth.  Each time a critical section is entered the count is\r
- * incremented.  Each time a critical section is left the count is decremented -\r
- * with interrupts only being re-enabled if the count is zero.\r
- *\r
- * usCriticalNesting will get set to zero when the scheduler starts, but must\r
- * not be initialised to zero as this will cause problems during the startup\r
- * sequence. \r
- */\r
+the stack before disabling interrupts.  Exiting the critical section is then\r
+simply a case of popping the flags from the stack.  As 78K0 IAR does not use\r
+a frame pointer this cannot be done as modifying the stack will clobber all\r
+the stack variables.  Instead each task maintains a count of the critical\r
+section nesting depth.  Each time a critical section is entered the count is\r
+incremented.  Each time a critical section is left the count is decremented -\r
+with interrupts only being re-enabled if the count is zero.\r
+\r
+usCriticalNesting will get set to zero when the scheduler starts, but must\r
+not be initialised to zero as this will cause problems during the startup\r
+sequence. */\r
 volatile unsigned portSHORT usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
 /*-----------------------------------------------------------*/\r
 \r
+/*\r
+ * The tick interrupt handler.\r
+ */\r
 __interrupt void MD_INTTM05( void );\r
 \r
 /*\r
- * Sets up the periodic ISR used for the RTOS tick.  This uses timer 0, but\r
- * could have alternatively used the watchdog timer or timer 1.\r
+ * Sets up the periodic ISR used for the RTOS tick.  \r
  */\r
 static void prvSetupTimerInterrupt( void );\r
 /*-----------------------------------------------------------*/\r
@@ -107,70 +108,65 @@ static void prvSetupTimerInterrupt( void );
  */\r
 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 {       \r
-unsigned portLONG *pxLocal;\r
-\r
-/* \r
- * The 78K0R/Kx3 automatically pushes the PSW then PC onto the stack before \r
- * executing an ISR.  We want the stack to look just as if this has happened\r
- * so place a pointer to the start of the task on the stack first - followed\r
- * by the flags we want the task to use when it starts up. \r
- */\r
-#if configMEMORY_MODE == 1\r
-       pxTopOfStack--;\r
-       pxLocal =  (unsigned portLONG*) pxTopOfStack;\r
-       *pxLocal = (unsigned portLONG) pvParameters;\r
-       pxTopOfStack--; \r
-\r
-       /* dummy are on the stack cause there normaly the return adress of the funtion \r
-        * is written. Can be a dummy cause the function will never end but only be\r
-        * yielded an reentered \r
-        */        \r
-       *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
-       pxTopOfStack--;\r
-       *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
-       pxTopOfStack--;       \r
-       pxTopOfStack--;\r
-\r
-       /* task function start address */\r
-       pxLocal =  (unsigned portLONG*) pxTopOfStack;\r
-       *pxLocal = (unsigned portLONG) pxCode;\r
-       pxTopOfStack--;\r
-\r
-       /* write initial value of the PSW */\r
-       *pxTopOfStack = portPSW;\r
-       pxTopOfStack--;\r
-\r
-       /* Next general purpose register AX */\r
-       *pxTopOfStack = ( portSTACK_TYPE ) 0x1111; \r
-       pxTopOfStack--;\r
-\r
-#else \r
-\r
-       pxTopOfStack--;\r
-\r
-       /* task function start address */\r
-       pxLocal =  (unsigned portLONG*) pxTopOfStack;\r
-       *pxLocal = (unsigned portLONG) pxCode;\r
-       pxTopOfStack--;\r
-\r
-       /* write initial value of the PSW */\r
-       *pxTopOfStack = portPSW;\r
-       pxTopOfStack--;\r
-\r
-       /* Next general purpose registers AX with the task function parameter start address */\r
-       *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
-       pxTopOfStack--;\r
-\r
-#endif        \r
-\r
+unsigned long *pulLocal;\r
+\r
+       #if configMEMORY_MODE == 1\r
+       {\r
+               /* Parameters are passed in on the stack. */\r
+               pxTopOfStack--;\r
+               pulLocal =  ( unsigned long * ) pxTopOfStack;\r
+               *pulLocal = ( unsigned long ) pvParameters;\r
+               pxTopOfStack--; \r
+\r
+               /* Dummy values on the stack because there normaly the return address \r
+               of the funtion is written. */        \r
+               *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+               pxTopOfStack--;\r
+               *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+               pxTopOfStack--;       \r
+               pxTopOfStack--;\r
+\r
+               /* Task function start address. */\r
+               pulLocal = ( unsigned long * ) pxTopOfStack;\r
+               *pulLocal = ( unsigned long ) pxCode;\r
+               pxTopOfStack--;\r
+\r
+               /* Initial PSW value. */\r
+               *pxTopOfStack = portPSW;\r
+               pxTopOfStack--;\r
+\r
+               /* Next general purpose register AX. */\r
+               *pxTopOfStack = ( portSTACK_TYPE ) 0x1111; \r
+               pxTopOfStack--;\r
+       }\r
+       #else \r
+       {\r
+               pxTopOfStack--;\r
+\r
+               /* Task function start address. */\r
+               pulLocal =  (unsigned long*) pxTopOfStack;\r
+               *pulLocal = (unsigned long) pxCode;\r
+               pxTopOfStack--;\r
+\r
+               /* Initial PSW value. */\r
+               *pxTopOfStack = portPSW;\r
+               pxTopOfStack--;\r
+\r
+               /* The parameter is passed in AX. */\r
+               *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+               pxTopOfStack--;\r
+       }\r
+       #endif        \r
+\r
+       /* HL. */\r
        *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
        pxTopOfStack--;\r
 \r
-       /* save the CS and ES register */\r
+       /* CS and ES registers. */\r
        *pxTopOfStack = ( portSTACK_TYPE ) 0x0F00;\r
        pxTopOfStack--;\r
 \r
-       /* Next the remaining general purpose registers DE and BC */\r
+       /* Finally the remaining general purpose registers DE and BC */\r
        *pxTopOfStack = ( portSTACK_TYPE ) 0xDEDE;\r
        pxTopOfStack--;\r
        *pxTopOfStack = ( portSTACK_TYPE ) 0xBCBC;\r
@@ -212,41 +208,42 @@ void vPortEndScheduler( void )
  */\r
 static void prvSetupTimerInterrupt( void )\r
 {\r
-       /* First the Timer Array Unit has to be enabled */\r
+       /* First the Timer Array Unit has to be enabled. */\r
        TAU0EN = 1;\r
 \r
-       /* To configure the Timer Array Unit all Channels have to been stopped */\r
+       /* To configure the Timer Array Unit all Channels have to first be stopped. */\r
        TT0 = 0xff;\r
 \r
-       /* Interrupt of Timer Array Unit Channel 5 disabled to set Interrupt Priority */\r
+       /* Interrupt of Timer Array Unit Channel 5 is disabled to set the interrupt \r
+       priority. */\r
        TMMK05 = 1;\r
 \r
-       /* Clear Timer Array Unit Channel 5 Interrupt Flag */   \r
+       /* Clear Timer Array Unit Channel 5 interrupt flag. */  \r
        TMIF05 = 0;\r
 \r
-       /* Set Timer Array Unit Channel 5  Interrupt Priority */\r
+       /* Set Timer Array Unit Channel 5 interrupt priority */\r
        TMPR005 = 0;\r
        TMPR105 = 0;\r
 \r
-       /* Set Timer Array Unit Channel 5 Mode as Interval Timer */\r
+       /* Set Timer Array Unit Channel 5 Mode as interval timer. */\r
        TMR05 = 0x0000;\r
 \r
        /* Set the compare match value according to the tick rate we want. */\r
-       TDR05 = (portTickType) (configCPU_CLOCK_HZ / configTICK_RATE_HZ);\r
+       TDR05 = ( portTickType ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );\r
 \r
-       /* Set Timer Array Unit Channel 5 Output Mode */\r
+       /* Set Timer Array Unit Channel 5 output mode */\r
        TOM0 &= ~0x0020;\r
 \r
-       /* Set Timer Array Unit Channel 5 Output Level */       \r
+       /* Set Timer Array Unit Channel 5 output level */       \r
        TOL0 &= ~0x0020;\r
 \r
-       /* Set Timer Array Unit Channel 5 Output Enable */      \r
+       /* Set Timer Array Unit Channel 5 output enable */      \r
        TOE0 &= ~0x0020;\r
 \r
        /* Interrupt of Timer Array Unit Channel 5 enabled */\r
        TMMK05 = 0;\r
 \r
-       /* Set Timer Array Unit Channel 5 Start*/\r
+       /* Start Timer Array Unit Channel 5.*/\r
        TS0 |= 0x0020;\r
 }\r
 /*-----------------------------------------------------------*/\r