]> git.sur5r.net Git - freertos/commitdiff
Work in progress, for backup purposes only.
authorrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 25 Feb 2008 09:56:56 +0000 (09:56 +0000)
committerrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 25 Feb 2008 09:56:56 +0000 (09:56 +0000)
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@218 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

Source/portable/GCC/PPC405/port.c
Source/portable/GCC/PPC405/portasm.s

index 8801d72940b459d17cd7ea32b07bde17034f3e16..1455b037bbe17d7f7da388fc8932b202d16c2b7a 100644 (file)
@@ -63,6 +63,7 @@
 #define portMACHINE_CHECK_ENABLE               ( 1UL << 19UL )\r
 #define portINITIAL_MSR                ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE )\r
 \r
+\r
 /*\r
  */\r
 static void prvSetupTimerInterrupt( void );\r
@@ -84,9 +85,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
        *pxTopOfStack = 0xDEADBEEF;\r
        *pxTopOfStack--;\r
 \r
-       *pxTopOfStack = 0x10000001UL;;  /* R0. */\r
-       pxTopOfStack--;\r
-                                                                       /* SP. */\r
+       /* EABI stack frame. */\r
        *pxTopOfStack = 0x31313131UL;   /* R31. */\r
        pxTopOfStack--;\r
        *pxTopOfStack = 0x30303030UL;   /* R30. */\r
@@ -147,20 +146,26 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
        pxTopOfStack--;\r
        *pxTopOfStack = 0x02020202UL;   /* R2. */\r
        pxTopOfStack--;\r
-       *pxTopOfStack = 0x00000000;             /* CR. */\r
+       *pxTopOfStack = 0x10000001UL;;  /* R0. */\r
+       pxTopOfStack--;\r
+       *pxTopOfStack = 0x00000000UL;   /* USPRG0. */\r
        pxTopOfStack--;\r
-       *pxTopOfStack = 0x00000000;             /* XER. */\r
+       *pxTopOfStack = 0x00000000UL;   /* CR. */\r
        pxTopOfStack--;\r
-       *pxTopOfStack = 0x00000000;             /* LR. */\r
+       *pxTopOfStack = 0x00000000UL;   /* XER. */\r
        pxTopOfStack--;\r
-       *pxTopOfStack = 0x00000000;             /* CTR. */\r
+       *pxTopOfStack = 0x00000000UL;   /* CTR. */\r
        pxTopOfStack--;\r
-       *pxTopOfStack = 0x00000000;             /* USPRG0. */\r
+       *pxTopOfStack = ( portSTACK_TYPE ) vStartFirstTask;     /* LR. */\r
        pxTopOfStack--;\r
        *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */\r
        pxTopOfStack--;\r
        *pxTopOfStack = portINITIAL_MSR;/* SRR1. */\r
        pxTopOfStack--;\r
+       *pxTopOfStack = 0x00000000UL;/* Next LR. */\r
+       pxTopOfStack--;\r
+       *pxTopOfStack = portINITIAL_MSR;/* Backchain. */\r
+//     pxTopOfStack--;\r
 \r
        return pxTopOfStack;\r
 }\r
@@ -170,7 +175,13 @@ portBASE_TYPE xPortStartScheduler( void )
 {\r
 extern void *pxCurrentTCB;\r
 \r
-       prvSetupTimerInterrupt();\r
+       XExc_Init();\r
+       XExc_mDisableExceptions( XEXC_NON_CRITICAL ) ;  \r
+\r
+//     prvSetupTimerInterrupt();\r
+       XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );\r
+       XExc_mEnableExceptions( XEXC_NON_CRITICAL ) ;\r
+\r
        vStartFirstTask();\r
        \r
        /* Should not get here as the tasks are now running! */\r
@@ -191,17 +202,11 @@ static void prvSetupTimerInterrupt( void )
 {\r
 const unsigned portLONG ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
 \r
-       XExc_Init();\r
-       XExc_mDisableExceptions( XEXC_NON_CRITICAL ) ;  \r
        XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) prvTickISR, ( void * ) 0 );\r
-       XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );\r
 \r
        XTime_PITEnableAutoReload();\r
-       XTime_PITEnableInterrupt();\r
        XTime_PITSetInterval( ulInterval );\r
        XTime_PITEnableInterrupt();\r
-       \r
-       XExc_mEnableExceptions( XEXC_NON_CRITICAL ) ;\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -222,6 +227,3 @@ static unsigned portLONG ulTicks = 0;
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-\r
-\r
-\r
index 6849a8d9868e3e16138aaf10b8ca330941cbf8b1..43dfeb2219e98c95e0134b7d548144de1274bbf0 100644 (file)
@@ -1,3 +1,5 @@
+#include "xreg405.h"\r
+\r
        .extern pxCurrentTCB\r
        .extern vTaskSwitchContext\r
 \r
 .set portSRR0_OFFSET, 8\r
 .set portSRR1_OFFSET, 4\r
 \r
+\r
+.set   BChainField, 0\r
+.set   NextLRField, BChainField + 4\r
+.set   MSRField,    NextLRField + 4\r
+.set   PCField,     MSRField    + 4\r
+.set   LRField,     PCField     + 4\r
+.set   CTRField,    LRField     + 4\r
+.set   XERField,    CTRField    + 4\r
+.set   CRField,     XERField    + 4\r
+.set   USPRG0Field, CRField     + 4\r
+.set   r0Field,     USPRG0Field + 4\r
+.set   r2Field,     r0Field     + 4\r
+.set   r3r31Field,  r2Field     + 4\r
+.set   IFrameSize,  r3r31Field  + ( ( 31 - 3 ) + 1 ) * 4\r
+\r
+\r
 .macro portRESTORE_CONTEXT\r
 \r
        # Get the address of the TCB.\r
 \r
        .endm\r
 \r
+\r
+.macro int_epilogue\r
+\r
+       # Get the address of the TCB.\r
+       xor             R0, R0, R0\r
+    addis   SP, R0, pxCurrentTCB@ha\r
+    lwz                SP,     pxCurrentTCB@l( SP )\r
+\r
+       # Get the task stack pointer from the TCB.\r
+       lwz             SP, 0( SP )\r
+       \r
+       # Restore MSR register to SRR1.\r
+       lwz     R0,MSRField(R1)\r
+       mtsrr1  R0\r
+       \r
+       # Restore current PC location to SRR0.\r
+       lwz     R0,PCField(R1)\r
+       mtsrr0  R0\r
+\r
+       # Save USPRG0 register\r
+       lwz     R0,USPRG0Field(R1)\r
+       mtspr   0x100,R0\r
+       \r
+       # Restore Condition register\r
+       lwz     R0,CRField(R1)\r
+       mtcr    R0\r
+       \r
+       # Restore Fixed Point Exception register\r
+       lwz     R0,XERField(R1)\r
+       mtxer   R0\r
+       \r
+       # Restore Counter register\r
+       lwz     R0,CTRField(R1)\r
+       mtctr   R0\r
+       \r
+       # Restore Link register\r
+       lwz     R0,LRField(R1)\r
+       mtlr    R0\r
+       \r
+       # Restore remaining GPR registers.\r
+       lmw     R3,r3r31Field(R1)\r
+       \r
+       # Restore r0 and r2.\r
+       lwz     R0,r0Field(R1)\r
+       lwz     R2,r2Field(R1)\r
+       \r
+       # Remove frame from stack\r
+       addi    R1,R1,IFrameSize\r
+       \r
+.endm\r
+\r
+.macro portENTER_SWITCHING_ISR\r
+\r
+       # Get the address of the TCB.                           \r
+       xor             R0, R0, R0\r
+       addis   R2, R0, pxCurrentTCB@ha\r
+       lwz             R2,     pxCurrentTCB@l( R2 )\r
+\r
+       # Store the stack pointer into the TCB\r
+       stw             SP,     0( R2 )\r
+\r
+.endm\r
+\r
+.macro portEXIT_SWITCHING_ISR\r
+\r
+       # Get the address of the TCB.\r
+       xor             R0, R0, R0\r
+       addis   SP, R0, pxCurrentTCB@ha\r
+       lwz             SP,     pxCurrentTCB@l( R1 )\r
+\r
+       # Get the task stack pointer from the TCB.\r
+       lwz             SP, 0( SP )\r
+\r
+       # Load up the LR for the correct return.\r
+       lwz     R0,LRField(R1)\r
+       mtlr    R0\r
+\r
+\r
+.endm\r
+\r
+\r
 vStartFirstTask:\r
-       portRESTORE_CONTEXT\r
+\r
+       int_epilogue\r
        rfi\r
 \r
+#vStartFirstTask:\r
+#      portRESTORE_CONTEXT\r
+#      rfi\r
+\r
 \r
 \r
 vPortYield:\r
 \r
-       portSAVE_CONTEXT\r
+       portENTER_SWITCHING_ISR\r
        bl vTaskSwitchContext\r
-       portRESTORE_CONTEXT\r
+       portEXIT_SWITCHING_ISR\r
+       blr\r
 \r
        NOP\r
        NOP\r