PARPORT code cleanup:

Align elements in array.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>

diff --git a/src/jtag/drivers/parport.c b/src/jtag/drivers/parport.c
index 7ff675bab3f40745071e945cacd5250d81003ec7..04ac2728064b8ba9a21c53c33336a9eb1411562b 100644 (file)
--- a/src/jtag/drivers/parport.c
+++ b/src/jtag/drivers/parport.c
@@ -76,16 +76,15 @@ struct cable {
 
 static struct cable cables[] =
 {
-       /* name                                 tdo   trst  tms   tck   tdi   srst  o_inv i_inv init  exit  led */
+       /* name                         tdo   trst  tms   tck   tdi   srst  o_inv i_inv init  exit  led */
        { "wiggler",                    0x80, 0x10, 0x02, 0x04, 0x08, 0x01, 0x01, 0x80, 0x80, 0x80, 0x00 },
        { "wiggler2",                   0x80, 0x10, 0x02, 0x04, 0x08, 0x01, 0x01, 0x80, 0x80, 0x00, 0x20 },
-       { "wiggler_ntrst_inverted",
-                                                       0x80, 0x10, 0x02, 0x04, 0x08, 0x01, 0x11, 0x80, 0x80, 0x80, 0x00 },
-       { "old_amt_wiggler",    0x80, 0x01, 0x02, 0x04, 0x08, 0x10, 0x11, 0x80, 0x80, 0x80, 0x00 },
+       { "wiggler_ntrst_inverted",     0x80, 0x10, 0x02, 0x04, 0x08, 0x01, 0x11, 0x80, 0x80, 0x80, 0x00 },
+       { "old_amt_wiggler",            0x80, 0x01, 0x02, 0x04, 0x08, 0x10, 0x11, 0x80, 0x80, 0x80, 0x00 },
        { "arm-jtag",                   0x80, 0x01, 0x02, 0x04, 0x08, 0x10, 0x01, 0x80, 0x80, 0x80, 0x00 },
        { "chameleon",                  0x80, 0x00, 0x04, 0x01, 0x02, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00 },
-       { "dlc5",                               0x10, 0x00, 0x04, 0x02, 0x01, 0x00, 0x00, 0x00, 0x10, 0x10, 0x00 },
-       { "triton",                             0x80, 0x08, 0x04, 0x01, 0x02, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00 },
+       { "dlc5",                       0x10, 0x00, 0x04, 0x02, 0x01, 0x00, 0x00, 0x00, 0x10, 0x10, 0x00 },
+       { "triton",                     0x80, 0x08, 0x04, 0x01, 0x02, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00 },
        { "lattice",                    0x40, 0x10, 0x04, 0x02, 0x01, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00 },
        { "flashlink",                  0x20, 0x10, 0x02, 0x01, 0x04, 0x20, 0x30, 0x20, 0x00, 0x00, 0x00 },
 /* Altium Universal JTAG cable. Set the cable to Xilinx Mode and wire to target as follows: