Add STM32 Keil demo.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@376 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h b/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h
new file mode 100644 (file)
index 0000000..f7d0160
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h
@@ -0,0 +1,102 @@
+/*\r
+       FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
+    * and even write all or part of your application on your behalf.          *\r
+    * See http://www.OpenRTOS.com for details of the services we provide to   *\r
+    * expedite your project.                                                  *\r
+    *                                                                         *\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+\r
+       Please ensure to read the configuration and relevant port sections of the\r
+       online documentation.\r
+\r
+       http://www.FreeRTOS.org - Documentation, latest information, license and \r
+       contact details.\r
+\r
+       http://www.SafeRTOS.com - A version that is certified for use in safety \r
+       critical systems.\r
+\r
+       http://www.OpenRTOS.com - Commercial support, development, porting, \r
+       licensing and training services.\r
+*/\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ *----------------------------------------------------------*/\r
+\r
+#define configUSE_PREEMPTION           1\r
+#define configUSE_IDLE_HOOK                    0\r
+#define configUSE_TICK_HOOK                    0\r
+#define configCPU_CLOCK_HZ                     ( ( unsigned portLONG ) 72000000 )      \r
+#define configTICK_RATE_HZ                     ( ( portTickType ) 1000 )\r
+#define configMAX_PRIORITIES           ( ( unsigned portBASE_TYPE ) 5 )\r
+#define configMINIMAL_STACK_SIZE       ( ( unsigned portSHORT ) 128 )\r
+#define configTOTAL_HEAP_SIZE          ( ( size_t ) ( 17 * 1024 ) )\r
+#define configMAX_TASK_NAME_LEN                ( 16 )\r
+#define configUSE_TRACE_FACILITY       0\r
+#define configUSE_16_BIT_TICKS         0\r
+#define configIDLE_SHOULD_YIELD                1\r
+\r
+/* Co-routine definitions. */\r
+#define configUSE_CO_ROUTINES          0\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+\r
+#define INCLUDE_vTaskPrioritySet               1\r
+#define INCLUDE_uxTaskPriorityGet              1\r
+#define INCLUDE_vTaskDelete                            1\r
+#define INCLUDE_vTaskCleanUpResources  0\r
+#define INCLUDE_vTaskSuspend                   1\r
+#define INCLUDE_vTaskDelayUntil                        1\r
+#define INCLUDE_vTaskDelay                             1\r
+\r
+/* This is the raw value as per the Cortex-M3 NVIC.  Values can be 255\r
+(lowest) to 0 (1?) (highest). */\r
+#define configKERNEL_INTERRUPT_PRIORITY                255\r
+\r
+/* This is the value being used as per the ST library which permits 16\r
+priority values, 0 to 15.  This must correspond to the\r
+configKERNEL_INTERRUPT_PRIORITY setting.  Here 15 corresponds to the lowest\r
+NVIC value of 255. */\r
+#define configLIBRARY_KERNEL_INTERRUPT_PRIORITY        15\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
+\r

diff --git a/Demo/CORTEX_STM32F103_Keil/LCD_Message.h b/Demo/CORTEX_STM32F103_Keil/LCD_Message.h
new file mode 100644 (file)
index 0000000..2323c01
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/LCD_Message.h
@@ -0,0 +1,502 @@
+#ifndef LCD_MESSAGE_H\r
+#define LCD_MESSAGE_H\r
+\r
+/* The structure passed to the LCD when there is text to display. */\r
+typedef struct\r
+{\r
+       long xColumn;\r
+       signed char *pcMessage;\r
+} xLCDMessage;\r
+\r
+/* The bitmap displayed on the LCD when the LCD task starts. */\r
+const unsigned portCHAR pcBitmap[] =\r
+{\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0x01, 0xfc, 0x03, 0x9f, 0x3f, 0xfe, 0x0c, 0x80, 0x03, 0xf8, 0x01, 0x70, 0x80, 0xff, 0x0f, 0xf0, 0xf8, 0xc7,\r
+0x3f, 0x00, 0xff, 0xff, 0xff, 0xff, 0x03, 0x78, 0x00, 0xf8, 0xc0, 0xff, 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0x01, 0xf8, 0x01, 0x9e, 0x3f, 0xfe, 0x0c, 0x80, 0x03, 0xf0, 0x01, 0x70, 0x00, 0xfe, 0x0f, 0xe0, 0xf9, 0xe7,\r
+0x3f, 0x00, 0xff, 0xff, 0xff, 0xff, 0x03, 0x70, 0x00, 0x78, 0x80, 0x3f, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0xf1, 0x78, 0x3c, 0x9f, 0x7c, 0xce, 0xff, 0xf3, 0xe3, 0xf9, 0x7f, 0x7e, 0xfc, 0xcf, 0xc7, 0xf3, 0xf3,\r
+0x3f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf3, 0xe3, 0xcf, 0x3f, 0x1e, 0x1f, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0x73, 0xfe, 0x39, 0x9f, 0x7c, 0xce, 0xff, 0xf3, 0xe7, 0xf9, 0x7f, 0xfe, 0xfc, 0xcf, 0xcf, 0xe3, 0xf1,\r
+0x3f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf3, 0xe7, 0xcf, 0x9f, 0x7f, 0x9e, 0x3f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0x33, 0xfe, 0x31, 0x9f, 0x7c, 0xce, 0xff, 0xf3, 0xe7, 0xf9, 0x7f, 0xfe, 0xf9, 0xcf, 0xcf, 0xc7, 0xf8,\r
+0x3f, 0xff, 0x13, 0x0f, 0xff, 0xf0, 0xf3, 0xe7, 0xcf, 0x8f, 0x7f, 0x9c, 0xff, 0xff, 0x87, 0x4f, 0x1c, 0xf2, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0x33, 0xff, 0x33, 0x9e, 0x3d, 0xce, 0xff, 0xf3, 0xe3, 0xf9, 0x7f, 0xfe, 0xf9, 0xcf, 0xc7, 0xcf, 0xfc,\r
+0x3f, 0xff, 0x03, 0x03, 0x3c, 0xc0, 0xf3, 0xe3, 0xcf, 0xcf, 0xff, 0x1c, 0xff, 0xff, 0x01, 0x0e, 0x0c, 0xf0, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0x31, 0xff, 0x73, 0xce, 0x39, 0x0f, 0xc0, 0x03, 0xf0, 0x01, 0x78, 0xfe, 0xf9, 0x0f, 0xe0, 0x1f, 0xfe,\r
+0x3f, 0x80, 0xe3, 0xf3, 0x3c, 0xcf, 0x03, 0xf0, 0xcf, 0xcf, 0xff, 0x3c, 0xf0, 0xff, 0x79, 0x8e, 0xcf, 0xf1, 0xff, 0xff,\r
+0xff, 0xff, 0x01, 0x38, 0xff, 0x73, 0xce, 0x39, 0x0f, 0xc0, 0x03, 0xf8, 0x01, 0x78, 0xfe, 0xf9, 0x0f, 0xe0, 0x1f, 0xfe,\r
+0x3f, 0x80, 0xf3, 0xf9, 0x99, 0x9f, 0x03, 0xf8, 0xcf, 0xcf, 0xff, 0xfc, 0xc0, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff,\r
+0xff, 0xff, 0x01, 0x3c, 0xff, 0x73, 0xce, 0x39, 0xcf, 0xff, 0xf3, 0xfc, 0xf9, 0x7f, 0xfe, 0xf9, 0xcf, 0xcf, 0x3f, 0xff,\r
+0x3f, 0xff, 0xf3, 0x01, 0x18, 0x80, 0xf3, 0xfc, 0xcf, 0xcf, 0xff, 0xfc, 0x8f, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0x3f, 0xff, 0xf3, 0xe4, 0x93, 0xcf, 0xff, 0xf3, 0xf8, 0xf9, 0x7f, 0xfe, 0xf9, 0xcf, 0x9f, 0x3f, 0xff,\r
+0x3f, 0xff, 0xf3, 0x01, 0x18, 0x80, 0xf3, 0xf8, 0xcf, 0xcf, 0xff, 0xfc, 0x3f, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0x3f, 0xfe, 0xf1, 0xe4, 0x93, 0xcf, 0xff, 0xf3, 0xf9, 0xf9, 0x7f, 0xfe, 0xf9, 0xcf, 0x9f, 0x3f, 0xff,\r
+0x3f, 0xff, 0xf3, 0xf9, 0x9f, 0xff, 0xf3, 0xf9, 0xcf, 0x8f, 0x7f, 0xcc, 0x3f, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0x7f, 0xfe, 0xf9, 0xe4, 0x93, 0xcf, 0xff, 0xf3, 0xf1, 0xf9, 0x7f, 0xfe, 0xfc, 0xcf, 0x9f, 0x3f, 0xff,\r
+0x3f, 0xff, 0xf3, 0xf9, 0x9f, 0xff, 0xf3, 0xf1, 0xcf, 0x9f, 0x7f, 0x8e, 0x3f, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0xff, 0x78, 0xfc, 0xe4, 0x93, 0xcf, 0xff, 0xf3, 0xe3, 0xf9, 0x7f, 0x7e, 0xfc, 0xcf, 0x8f, 0x3f, 0xff,\r
+0x3f, 0xff, 0xf3, 0xf3, 0x38, 0x8f, 0xf3, 0xe3, 0xcf, 0x3f, 0x1e, 0x1f, 0x1f, 0xff, 0x79, 0xce, 0xcf, 0xf1, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0xff, 0x01, 0xfe, 0xf1, 0xc7, 0x0f, 0x80, 0xf3, 0xe7, 0x01, 0x70, 0x00, 0xfe, 0x0f, 0xc0, 0x3f, 0xff,\r
+0x3f, 0xff, 0xf3, 0x03, 0x3c, 0xc0, 0xf3, 0xe7, 0xcf, 0x7f, 0x80, 0x3f, 0x80, 0xe7, 0x01, 0xce, 0x0f, 0xf0, 0xff, 0xff,\r
+0xff, 0xff, 0xf9, 0xff, 0x03, 0xff, 0xf1, 0xc7, 0x0f, 0x80, 0xf3, 0xc7, 0x01, 0x70, 0x80, 0xff, 0x0f, 0xe0, 0x3f, 0xff,\r
+0x3f, 0xff, 0xf3, 0x0f, 0xfe, 0xe0, 0xf3, 0xc7, 0xcf, 0xff, 0xc0, 0x7f, 0xe0, 0xe7, 0x87, 0xcf, 0x1f, 0xf2, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf3, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe7, 0xf1, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0xf8, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xfc, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0xff, 0xff, 0xff, 0xff, 0x03,\r
+0x78, 0x00, 0xf8, 0xc0, 0xff, 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0xff, 0xff, 0xff, 0xff, 0x03,\r
+0x70, 0x00, 0x78, 0x80, 0x3f, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf3,\r
+0xe3, 0xcf, 0x3f, 0x1e, 0x1f, 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf3,\r
+0xe7, 0xcf, 0x9f, 0x7f, 0x9e, 0x3f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf9, 0x3e, 0x7c, 0x1f, 0xbe, 0xcf, 0x3f, 0xff, 0x13, 0x0f, 0xff, 0xf0, 0xf3,\r
+0xe7, 0xcf, 0x8f, 0x7f, 0x9c, 0xff, 0xff, 0x87, 0x4f, 0x1c, 0xf2, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x79, 0x3c, 0x3c, 0x1e, 0x1e, 0xcf, 0x3f, 0xff, 0x03, 0x03, 0x3c, 0xc0, 0xf3,\r
+0xe3, 0xcf, 0xcf, 0xff, 0x1c, 0xff, 0xff, 0x01, 0x0e, 0x0c, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7b, 0xbc, 0x3d, 0xde, 0x1e, 0xef, 0x3f, 0x80, 0xe3, 0xf3, 0x3c, 0xcf, 0x03,\r
+0xf0, 0xcf, 0xcf, 0xff, 0x3c, 0xf0, 0xff, 0x79, 0x8e, 0xcf, 0xf1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x73, 0x9d, 0xb9, 0xce, 0x5c, 0xe7, 0x3f, 0x80, 0xf3, 0xf9, 0x99, 0x9f, 0x03,\r
+0xf8, 0xcf, 0xcf, 0xff, 0xfc, 0xc0, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x33, 0x99, 0x99, 0xcc, 0x4c, 0xe6, 0x3f, 0xff, 0xf3, 0x01, 0x18, 0x80, 0xf3,\r
+0xfc, 0xcf, 0xcf, 0xff, 0xfc, 0x8f, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x27, 0xc9, 0x93, 0xe4, 0x49, 0xf2, 0x3f, 0xff, 0xf3, 0x01, 0x18, 0x80, 0xf3,\r
+0xf8, 0xcf, 0xcf, 0xff, 0xfc, 0x3f, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x27, 0xc9, 0x93, 0xe4, 0x49, 0xf2, 0x3f, 0xff, 0xf3, 0xf9, 0x9f, 0xff, 0xf3,\r
+0xf9, 0xcf, 0x8f, 0x7f, 0xcc, 0x3f, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaf, 0xeb, 0xd7, 0xf5, 0xeb, 0xfa, 0x3f, 0xff, 0xf3, 0xf9, 0x9f, 0xff, 0xf3,\r
+0xf1, 0xcf, 0x9f, 0x7f, 0x8e, 0x3f, 0xff, 0xfc, 0xcc, 0xe7, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f, 0xe3, 0xc7, 0xf1, 0xe3, 0xf8, 0x3f, 0xff, 0xf3, 0xf3, 0x38, 0x8f, 0xf3,\r
+0xe3, 0xcf, 0x3f, 0x1e, 0x1f, 0x1f, 0xff, 0x79, 0xce, 0xcf, 0xf1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f, 0xe3, 0xc7, 0xf1, 0xe3, 0xf8, 0x3c, 0xff, 0xf3, 0x03, 0x3c, 0xc0, 0xf3,\r
+0xe7, 0xcf, 0x7f, 0x80, 0x3f, 0x80, 0xe7, 0x01, 0xce, 0x0f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x9f, 0xf3, 0xcf, 0xf9, 0xe7, 0xfc, 0x3c, 0xff, 0xf3, 0x0f, 0xfe, 0xe0, 0xf3,\r
+0xc7, 0xcf, 0xff, 0xc0, 0x7f, 0xe0, 0xe7, 0x87, 0xcf, 0x1f, 0xf2, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe7, 0xf1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0xf8, 0xff, 0x3f, 0xfc, 0x7f, 0x00,\r
+0x0f, 0x00, 0x1f, 0xf8, 0x1f, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0xe0, 0xff, 0x1f, 0xfc, 0x7f, 0x00,\r
+0x0e, 0x00, 0x0f, 0xf0, 0x07, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc7, 0xc7, 0xff, 0x9f, 0xff, 0x7f, 0x7e,\r
+0xfc, 0xf9, 0xc7, 0xe3, 0xe3, 0xe3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe7, 0xcf, 0xff, 0x9f, 0xff, 0x7f, 0xfe,\r
+0xfc, 0xf9, 0xf3, 0xcf, 0xf3, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0xdf, 0x87, 0xef, 0xc3, 0xf7, 0xf9, 0xe7, 0xff, 0x03, 0x07, 0x1e, 0x7e, 0xfe,\r
+0xfc, 0xf9, 0xf1, 0x8f, 0xf3, 0xff, 0xff, 0xf0, 0x87, 0x4f, 0x18, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x8f, 0x87, 0xc7, 0xc3, 0xe3, 0xf9, 0xc7, 0xff, 0x00, 0x06, 0x06, 0x78, 0x7e,\r
+0xfc, 0xf9, 0xf9, 0x9f, 0xe3, 0xff, 0x3f, 0xe0, 0x01, 0x0e, 0x08, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x8f, 0xb7, 0xc7, 0xdb, 0xe3, 0xfd, 0x0f, 0xfc, 0x7c, 0x9e, 0xe7, 0x79, 0x00,\r
+0xfe, 0xf9, 0xf9, 0x9f, 0x07, 0xfe, 0x3f, 0xc7, 0x79, 0x8e, 0xe3, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xae, 0x33, 0xd7, 0x99, 0xeb, 0xfc, 0x3f, 0xf0, 0x7f, 0x9e, 0xf3, 0x73, 0x00,\r
+0xff, 0xf9, 0xf9, 0x9f, 0x1f, 0xf8, 0x9f, 0xcf, 0xfc, 0xcc, 0xf3, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x26, 0x33, 0x93, 0x99, 0xc9, 0xfc, 0xff, 0xe3, 0x0f, 0x9e, 0x03, 0x70, 0x9e,\r
+0xff, 0xf9, 0xf9, 0x9f, 0xff, 0xf1, 0x9f, 0xff, 0xfc, 0xcc, 0xf3, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x24, 0x79, 0x92, 0x3c, 0x49, 0xfe, 0xff, 0xcf, 0x01, 0x9e, 0x03, 0x70, 0x1e,\r
+0xff, 0xf9, 0xf9, 0x9f, 0xff, 0xe7, 0x9f, 0xff, 0xfc, 0xcc, 0xf3, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x24, 0x79, 0x92, 0x3c, 0x49, 0xfe, 0xf3, 0xcf, 0x70, 0x9e, 0xf3, 0x7f, 0x3e,\r
+0xff, 0xf9, 0xf1, 0x8f, 0xf9, 0xe7, 0x9f, 0xff, 0xfc, 0xcc, 0xf3, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x75, 0xfd, 0xba, 0x7e, 0x5d, 0xff, 0xe3, 0xcf, 0x7c, 0x9e, 0xf3, 0x7f, 0x3e,\r
+0xfe, 0xf9, 0xf3, 0xcf, 0xf1, 0xe7, 0x9f, 0xcf, 0xfc, 0xcc, 0xf3, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x71, 0xfc, 0x38, 0x7e, 0x1c, 0xff, 0xc7, 0xc7, 0x3c, 0x9e, 0xe7, 0x71, 0x7e,\r
+0xfc, 0xf9, 0xc7, 0xe3, 0xe3, 0xe3, 0x3f, 0xc7, 0x79, 0xce, 0xf3, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x71, 0xfc, 0x38, 0x7e, 0x1c, 0x9f, 0x0f, 0xe0, 0x00, 0x9e, 0x07, 0x78, 0xfe,\r
+0xfc, 0xf9, 0x0f, 0xf0, 0x07, 0xf0, 0x3c, 0xe0, 0x01, 0xce, 0xf3, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x73, 0xfe, 0x39, 0xff, 0x9c, 0x9f, 0x1f, 0xf8, 0xc1, 0x9c, 0x1f, 0x7c, 0xfe,\r
+0xf8, 0xf9, 0x1f, 0xf8, 0x0f, 0xfc, 0x7c, 0xf0, 0x87, 0xcf, 0xf3, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,\r
+0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,\r
+0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,\r
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,\r
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,\r
+0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x80,\r
+0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x80,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x07, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x07, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x00, 0x30, 0xf8, 0x1f, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0xff, 0xff, 0x0f, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0xf0, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x30, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x30, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x30, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x70, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x78, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x38, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x38, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x38, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x78, 0x30, 0xf0, 0x1f, 0x00, 0x00, 0x3f, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0xf0, 0x1f, 0x00, 0x00, 0xf0, 0x3f, 0x00, 0x00, 0xe0, 0xff, 0x03, 0x00, 0x00, 0xff, 0xff, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x10, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x1f, 0x00, 0x00, 0xfc, 0xff, 0x00, 0x00, 0xc0, 0xff, 0x03, 0x00, 0xe0, 0xff, 0xff, 0x8f, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0x1f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff, 0x07, 0x00, 0xc0, 0xff, 0x03, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0x1f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff, 0x07, 0x00, 0xc0, 0xff, 0x03, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x0f, 0x00, 0x80, 0xff, 0xff, 0x1f, 0x00, 0x80, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xf8, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x03, 0x00, 0xe0, 0xff, 0xff, 0x1f, 0x00, 0x80, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfc, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x03, 0x00, 0xe0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0xfe, 0x01, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfc, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x03, 0x00, 0xe0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0xfe, 0x01, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x00, 0x00, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0xfe, 0x01, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x07, 0x80, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfe, 0x01, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x07, 0x80, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfe, 0x01, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfe, 0x01, 0x00, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfc, 0x03, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x1f, 0x00, 0x80, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0x03, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x1f, 0x00, 0x80, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0x03, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0x80, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0x03, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x01, 0x70, 0xf8, 0x1f, 0x00, 0xc0, 0xff, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0x0f, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x30, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x30, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x30, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x70, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0x3f, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0xff, 0x01, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0xff, 0x01, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x70, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0xff, 0x03, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x38, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x38, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x38, 0x70, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x78, 0x30, 0xc0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x10, 0x30, 0xf0, 0x1f, 0x00, 0xc0, 0x3f, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x01, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xf8, 0x1f, 0x00, 0xe0, 0xff, 0x03, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xf8, 0x1f, 0x00, 0xe0, 0xff, 0x03, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfc, 0x1f, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x00, 0x00, 0xfc, 0x1f, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x03, 0x00, 0xf0, 0xff, 0xff, 0x3f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x07, 0x80, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x03, 0x00, 0xe0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x07, 0x80, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x03, 0x00, 0xe0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0x7f, 0xfc, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x1f, 0x00, 0x80, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x03, 0x00, 0x80, 0xff, 0xff, 0x1f, 0x00, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x1f, 0x00, 0x80, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff, 0x07, 0x00, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x80, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x0f, 0x00, 0x00, 0xfc, 0xff, 0x03, 0x00, 0xc0, 0xff, 0x0f, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x80, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x0f, 0x00, 0x00, 0xfc, 0xff, 0x03, 0x00, 0xc0, 0xff, 0x0f, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x1f, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0xe0, 0xff, 0x0f, 0xf0, 0xff, 0x1f, 0x00, 0x00, 0xfc, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0xf0, 0x00, 0x00, 0x00, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xe0, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xe0, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x00, 0xff, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x80, 0xff, 0xff, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x01, 0x00, 0xf8, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0xe0, 0xff, 0xff, 0x01, 0x00, 0xf0, 0xff, 0xff, 0x03, 0x00, 0xf8,\r
+0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0x00, 0x00, 0xf0, 0x3f, 0x00, 0xe0, 0xff, 0xff, 0x03, 0x00, 0xf8, 0xff, 0xff, 0x07, 0x00, 0xfc,\r
+0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x03, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x03, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x03, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x01, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x01, 0x1e, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x01, 0x1e, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x01, 0x1e, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x01, 0x1e, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x01, 0x18, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x01, 0x18, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0x03, 0x00, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0x03, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x81,\r
+0xc0, 0xff, 0x03, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x81,\r
+0xc0, 0xff, 0x03, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x81,\r
+0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x81,\r
+0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x81,\r
+0xc0, 0xff, 0x7f, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x81,\r
+0xc0, 0xff, 0x7f, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x07, 0x00, 0x00, 0xf0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0x1f, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x81,\r
+0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x80,\r
+0x00, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x80,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,\r
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,\r
+0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,\r
+0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,\r
+0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,\r
+0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,\r
+0x00, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x25, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0xf0,\r
+0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x25, 0xbe,\r
+0x4d, 0x42, 0x00\r
+};\r
+\r
+\r
+#endif\r
+\r

diff --git a/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c b/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c
new file mode 100644 (file)
index 0000000..aaa24c7
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c
@@ -0,0 +1,133 @@
+/*\r
+       FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
+    * and even write all or part of your application on your behalf.          *\r
+    * See http://www.OpenRTOS.com for details of the services we provide to   *\r
+    * expedite your project.                                                  *\r
+    *                                                                         *\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+\r
+       Please ensure to read the configuration and relevant port sections of the\r
+       online documentation.\r
+\r
+       http://www.FreeRTOS.org - Documentation, latest information, license and \r
+       contact details.\r
+\r
+       http://www.SafeRTOS.com - A version that is certified for use in safety \r
+       critical systems.\r
+\r
+       http://www.OpenRTOS.com - Commercial support, development, porting, \r
+       licensing and training services.\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple parallel port IO routines.\r
+ *-----------------------------------------------------------*/\r
+\r
+/* FreeRTOS.org includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "partest.h"\r
+\r
+/* Library includes. */\r
+#include "stm32f10x_lib.h"\r
+\r
+#define partstMAX_OUTPUT_LED   ( 4 )\r
+#define partstFIRST_LED                        GPIO_Pin_6\r
+\r
+static unsigned portSHORT usOutputValue = 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+GPIO_InitTypeDef GPIO_InitStructure;\r
+\r
+       /* Configure PC.06, PC.07, PC.08 and PC.09 as output push-pull */\r
+       GPIO_InitStructure.GPIO_Pin =  GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9;\r
+       GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;\r
+       GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
+       GPIO_Init( GPIOC, &GPIO_InitStructure );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
+{\r
+unsigned portSHORT usBit;\r
+\r
+       vTaskSuspendAll();\r
+       {\r
+               if( uxLED < partstMAX_OUTPUT_LED )\r
+               {\r
+                       usBit = partstFIRST_LED << uxLED;\r
+\r
+                       if( xValue == pdFALSE )\r
+                       {\r
+                               usBit ^= ( unsigned portSHORT ) 0xffff;\r
+                               usOutputValue &= usBit;\r
+                       }\r
+                       else\r
+                       {\r
+                               usOutputValue |= usBit;\r
+                       }\r
+\r
+                       GPIO_Write( GPIOC, usOutputValue );\r
+               }       \r
+       }\r
+       xTaskResumeAll();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestToggleLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+unsigned portSHORT usBit;\r
+\r
+       vTaskSuspendAll();\r
+       {\r
+               if( uxLED < partstMAX_OUTPUT_LED )\r
+               {\r
+                       usBit = partstFIRST_LED << uxLED;\r
+\r
+                       if( usOutputValue & usBit )\r
+                       {\r
+                               usOutputValue &= ~usBit;\r
+                       }\r
+                       else\r
+                       {\r
+                               usOutputValue |= usBit;\r
+                       }\r
+\r
+                       GPIO_Write( GPIOC, usOutputValue );\r
+               }\r
+       }\r
+       xTaskResumeAll();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r

diff --git a/Demo/CORTEX_STM32F103_Keil/RTOSDemo.Opt b/Demo/CORTEX_STM32F103_Keil/RTOSDemo.Opt
new file mode 100644 (file)
index 0000000..5a5c200
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/RTOSDemo.Opt
@@ -0,0 +1,72 @@
+### uVision2 Project, (C) Keil Software\r
+### Do not modify !\r
+\r
+ cExt (*.c)\r
+ aExt (*.s*; *.src; *.a*)\r
+ oExt (*.obj)\r
+ lExt (*.lib)\r
+ tExt (*.txt; *.h; *.inc)\r
+ pExt (*.plm)\r
+ CppX (*.cpp)\r
+ DaveTm { 0,0,0,0,0,0,0,0 }\r
+\r
+Target (Target 1), 0x0004 // Tools: 'ARM-ADS'\r
+GRPOPT 1,(System),0,0,0\r
+GRPOPT 2,(Demo Files),0,0,0\r
+GRPOPT 3,(FreeRTOS files),0,0,0\r
+\r
+OPTFFF 1,1,2,0,0,0,0,0,<.\STM32F10x.s><STM32F10x.s> \r
+OPTFFF 1,2,1,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\lcd.c><lcd.c> \r
+OPTFFF 1,3,2,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\cortexm3_macro_rvds.s><cortexm3_macro_rvds.s> \r
+OPTFFF 1,4,1,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_usart.c><stm32f10x_usart.c> \r
+OPTFFF 1,5,1,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_gpio.c><stm32f10x_gpio.c> \r
+OPTFFF 1,6,1,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_lib.c><stm32f10x_lib.c> \r
+OPTFFF 1,7,1,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_nvic.c><stm32f10x_nvic.c> \r
+OPTFFF 1,8,1,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_rcc.c><stm32f10x_rcc.c> \r
+OPTFFF 1,9,1,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_spi.c><stm32f10x_spi.c> \r
+OPTFFF 1,10,1,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_systick.c><stm32f10x_systick.c> \r
+OPTFFF 1,11,1,0,0,0,0,0,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_tim.c><stm32f10x_tim.c> \r
+OPTFFF 2,12,1,285212672,0,0,0,0,<.\ParTest\ParTest.c><ParTest.c> \r
+OPTFFF 2,13,1,0,0,0,0,0,<.\serial\serial.c><serial.c> \r
+OPTFFF 2,14,1,0,0,0,0,0,<.\timertest.c><timertest.c> \r
+OPTFFF 2,15,1,117440512,0,0,0,0,<.\main.c><main.c> \r
+OPTFFF 2,16,1,0,0,0,0,0,<.\spi_flash.c><spi_flash.c> \r
+OPTFFF 2,17,1,0,0,0,0,0,<..\Common\Minimal\semtest.c><semtest.c> \r
+OPTFFF 2,18,1,0,0,0,0,0,<..\Common\Minimal\BlockQ.c><BlockQ.c> \r
+OPTFFF 2,19,1,0,0,0,0,0,<..\Common\Minimal\blocktim.c><blocktim.c> \r
+OPTFFF 2,20,1,0,0,0,0,0,<..\Common\Minimal\comtest.c><comtest.c> \r
+OPTFFF 2,21,1,0,0,0,0,0,<..\Common\Minimal\death.c><death.c> \r
+OPTFFF 2,22,1,0,0,0,0,0,<..\Common\Minimal\flash.c><flash.c> \r
+OPTFFF 2,23,1,0,0,0,0,0,<..\Common\Minimal\integer.c><integer.c> \r
+OPTFFF 2,24,1,0,0,0,0,0,<..\Common\Minimal\PollQ.c><PollQ.c> \r
+OPTFFF 3,25,1,0,0,0,0,0,<..\..\Source\tasks.c><tasks.c> \r
+OPTFFF 3,26,1,0,0,0,0,0,<..\..\Source\list.c><list.c> \r
+OPTFFF 3,27,1,0,0,0,0,0,<..\..\Source\queue.c><queue.c> \r
+OPTFFF 3,28,1,0,0,0,0,0,<..\..\Source\portable\RVDS\ARM_CM3\port.c><port.c> \r
+OPTFFF 3,29,1,0,0,0,0,0,<..\..\Source\portable\MemMang\heap_2.c><heap_2.c> \r
+\r
+\r
+TARGOPT 1, (Target 1)\r
+ ADSCLK=8000000\r
+  OPTTT 1,1,1,0\r
+  OPTHX 1,65535,0,0,0\r
+  OPTLX 79,66,8,<.\>\r
+  OPTOX 16\r
+  OPTLT 1,1,1,0,1,1,0,1,0,0,0,0\r
+  OPTXL 1,1,1,1,1,1,1,0,0\r
+  OPTFL 1,0,1\r
+  OPTAX 255\r
+  OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103VB)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103VB)\r
+  OPTDBG 48126,1,()()()()()()()()()() (BIN\UL2CM3.DLL)()()()\r
+  OPTKEY 0,(DLGTARM)((1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0))\r
+  OPTKEY 0,(DLGUARM)((105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0))\r
+  OPTKEY 0,(DLGDARM)((1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0))\r
+  OPTKEY 0,(ARMDBGFLAGS)(-T0)\r
+  OPTKEY 0,(JLTAgdi)(-O1038 -J1 -Y1000 -Z1 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)\r
+  OPTKEY 0,(UL2CM3)(-UU0226F8E -O14 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(3BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06410041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP7 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)\r
+  OPTBB 0,0,237,1,134228048,0,0,0,0,1,<serial.c>()()\r
+  OPTDF 0x82\r
+  OPTLE <>\r
+  OPTLC <>\r
+EndOpt\r
+\r

diff --git a/Demo/CORTEX_STM32F103_Keil/RTOSDemo.Uv2 b/Demo/CORTEX_STM32F103_Keil/RTOSDemo.Uv2
new file mode 100644 (file)
index 0000000..183c541
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/RTOSDemo.Uv2
@@ -0,0 +1,130 @@
+### uVision2 Project, (C) Keil Software\r
+### Do not modify !\r
+\r
+Target (Target 1), 0x0004 // Tools: 'ARM-ADS'\r
+\r
+Group (System)\r
+Group (Demo Files)\r
+Group (FreeRTOS files)\r
+\r
+File 1,2,<.\STM32F10x.s><STM32F10x.s>\r
+File 1,1,<..\Common\drivers\ST\STM32F10xFWLib\src\lcd.c><lcd.c>\r
+File 1,2,<..\Common\drivers\ST\STM32F10xFWLib\src\cortexm3_macro_rvds.s><cortexm3_macro_rvds.s>\r
+File 1,1,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_usart.c><stm32f10x_usart.c>\r
+File 1,1,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_gpio.c><stm32f10x_gpio.c>\r
+File 1,1,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_lib.c><stm32f10x_lib.c>\r
+File 1,1,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_nvic.c><stm32f10x_nvic.c>\r
+File 1,1,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_rcc.c><stm32f10x_rcc.c>\r
+File 1,1,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_spi.c><stm32f10x_spi.c>\r
+File 1,1,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_systick.c><stm32f10x_systick.c>\r
+File 1,1,<..\Common\drivers\ST\STM32F10xFWLib\src\stm32f10x_tim.c><stm32f10x_tim.c>\r
+File 2,1,<.\ParTest\ParTest.c><ParTest.c>\r
+File 2,1,<.\serial\serial.c><serial.c>\r
+File 2,1,<.\timertest.c><timertest.c>\r
+File 2,1,<.\main.c><main.c>\r
+File 2,1,<.\spi_flash.c><spi_flash.c>\r
+File 2,1,<..\Common\Minimal\semtest.c><semtest.c>\r
+File 2,1,<..\Common\Minimal\BlockQ.c><BlockQ.c>\r
+File 2,1,<..\Common\Minimal\blocktim.c><blocktim.c>\r
+File 2,1,<..\Common\Minimal\comtest.c><comtest.c>\r
+File 2,1,<..\Common\Minimal\death.c><death.c>\r
+File 2,1,<..\Common\Minimal\flash.c><flash.c>\r
+File 2,1,<..\Common\Minimal\integer.c><integer.c>\r
+File 2,1,<..\Common\Minimal\PollQ.c><PollQ.c>\r
+File 3,1,<..\..\Source\tasks.c><tasks.c>\r
+File 3,1,<..\..\Source\list.c><list.c>\r
+File 3,1,<..\..\Source\queue.c><queue.c>\r
+File 3,1,<..\..\Source\portable\RVDS\ARM_CM3\port.c><port.c>\r
+File 3,1,<..\..\Source\portable\MemMang\heap_2.c><heap_2.c>\r
+\r
+\r
+Options 1,0,0  // Target 'Target 1'\r
+ Device (STM32F103VB)\r
+ Vendor (STMicroelectronics)\r
+ Cpu (IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3"))\r
+ FlashUt ()\r
+ StupF ("STARTUP\ST\STM32F10x.s" ("STM32 Startup Code"))\r
+ FlashDR (UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000))\r
+ DevID (4223)\r
+ Rgf (stm32f10x_lib.h)\r
+ Mem ()\r
+ C ()\r
+ A ()\r
+ RL ()\r
+ OH ()\r
+ DBC_IFX ()\r
+ DBC_CMS ()\r
+ DBC_AMS ()\r
+ DBC_LMS ()\r
+ UseEnv=0\r
+ EnvBin ()\r
+ EnvInc ()\r
+ EnvLib ()\r
+ EnvReg (ÿST\STM32F10x\)\r
+ OrgReg (ÿST\STM32F10x\)\r
+ TgStat=16\r
+ OutDir (.\)\r
+ OutName (RTOSDemo)\r
+ GenApp=1\r
+ GenLib=0\r
+ GenHex=0\r
+ Debug=1\r
+ Browse=1\r
+ LstDir (.\)\r
+ HexSel=1\r
+ MG32K=0\r
+ TGMORE=0\r
+ RunUsr 0 0 <>\r
+ RunUsr 1 0 <>\r
+ BrunUsr 0 0 <>\r
+ BrunUsr 1 0 <>\r
+ CrunUsr 0 0 <>\r
+ CrunUsr 1 0 <>\r
+ SVCSID <>\r
+ GLFLAGS=1790\r
+ ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ ACPUTYP ("Cortex-M3")\r
+ RVDEV ()\r
+ ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ OCMADSIRAM { 0,0,0,0,32,0,80,0,0 }\r
+ OCMADSIROM { 1,0,0,0,8,0,0,2,0 }\r
+ OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }\r
+ OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,2,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,80,0,0,0,0,0,0,0,0,0,0,0 }\r
+ RV_STAVEC ()\r
+ ADSCCFLG { 5,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ ADSCMISC ()\r
+ ADSCDEFN (RVDS_ARMCM3_LM3S102)\r
+ ADSCUDEF ()\r
+ ADSCINCD (..\CORTEX_STM32F103_Keil;..\Common\include;..\..\Source\include;..\Common\drivers\ST\STM32F10xFWLib\inc)\r
+ ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ ADSAMISC ()\r
+ ADSADEFN ()\r
+ ADSAUDEF ()\r
+ ADSAINCD ()\r
+ PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ IncBld=1\r
+ AlwaysBuild=0\r
+ GenAsm=0\r
+ AsmAsm=0\r
+ PublicsOnly=0\r
+ StopCode=3\r
+ CustArgs ()\r
+ LibMods ()\r
+ ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }\r
+ ADSLDTA (0x08000000)\r
+ ADSLDDA (0x20000000)\r
+ ADSLDSC ()\r
+ ADSLDIB ()\r
+ ADSLDIC ()\r
+ ADSLDMC ()\r
+ ADSLDIF ()\r
+ ADSLDDW ()\r
+  OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103VB)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103VB)\r
+  OPTDBG 48126,1,()()()()()()()()()() (BIN\UL2CM3.DLL)()()()\r
+ FLASH1 { 9,0,0,0,1,0,0,0,1,16,0,0,0,0,0,0,0,0,0,0 }\r
+ FLASH2 (BIN\UL2CM3.DLL)\r
+ FLASH3 ("" ())\r
+ FLASH4 ()\r
+EndOpt\r
+\r

diff --git a/Demo/CORTEX_STM32F103_Keil/RTOSDemo.plg b/Demo/CORTEX_STM32F103_Keil/RTOSDemo.plg
new file mode 100644 (file)
index 0000000..4b39702
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/RTOSDemo.plg
@@ -0,0 +1,9 @@
+<html>\r
+<body>\r
+<pre>\r
+<h1>µVision3 Build Log</h1>\r
+<h2>Project:</h2>\r
+C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\CORTEX_STM32F103_Keil\RTOSDemo.uv2\r
+Project File Date:  05/21/2008\r
+\r
+<h2>Output:</h2>\r

diff --git a/Demo/CORTEX_STM32F103_Keil/RTOSDemo.sct b/Demo/CORTEX_STM32F103_Keil/RTOSDemo.sct
new file mode 100644 (file)
index 0000000..f67cd68
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/RTOSDemo.sct
@@ -0,0 +1,15 @@
+; *************************************************************\r
+; *** Scatter-Loading Description File generated by uVision ***\r
+; *************************************************************\r
+\r
+LR_IROM1 0x08000000 0x00020000  {    ; load region size_region\r
+  ER_IROM1 0x08000000 0x00020000  {  ; load address = execution address\r
+   *.o (RESET, +First)\r
+   *(InRoot$$Sections)\r
+   .ANY (+RO)\r
+  }\r
+  RW_IRAM1 0x20000000 0x00005000  {  ; RW data\r
+   .ANY (+RW +ZI)\r
+  }\r
+}\r
+\r

diff --git a/Demo/CORTEX_STM32F103_Keil/STM32F10x.s b/Demo/CORTEX_STM32F103_Keil/STM32F10x.s
new file mode 100644 (file)
index 0000000..8c2b076
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/STM32F10x.s
@@ -0,0 +1,294 @@
+;/*****************************************************************************/\r
+;/* STM32F10x.s: Startup file for ST STM32F10x device series                  */\r
+;/*****************************************************************************/\r
+;/* <<< Use Configuration Wizard in Context Menu >>>                          */\r
+;/*****************************************************************************/\r
+;/* This file is part of the uVision/ARM development tools.                   */\r
+;/* Copyright (c) 2005-2007 Keil Software. All rights reserved.               */\r
+;/* This software may only be used under the terms of a valid, current,       */\r
+;/* end user licence from KEIL for a compatible version of KEIL software      */\r
+;/* development tools. Nothing else gives you the right to use this software. */\r
+;/*****************************************************************************/\r
+\r
+\r
+;// <h> Stack Configuration\r
+;//   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
+;// </h>\r
+\r
+Stack_Size      EQU     0x00000200\r
+\r
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3\r
+Stack_Mem       SPACE   Stack_Size\r
+__initial_sp\r
+\r
+\r
+;// <h> Heap Configuration\r
+;//   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
+;// </h>\r
+\r
+Heap_Size       EQU     0x00000000\r
+\r
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3\r
+__heap_base\r
+Heap_Mem        SPACE   Heap_Size\r
+__heap_limit\r
+\r
+                               IMPORT xPortPendSVHandler\r
+                               IMPORT xPortSysTickHandler\r
+                               IMPORT vPortSVCHandler\r
+                               IMPORT vUARTInterruptHandler\r
+                               IMPORT vTimer2IntHandler\r
+\r
+                PRESERVE8\r
+                THUMB\r
+\r
+\r
+; Vector Table Mapped to Address 0 at Reset\r
+\r
+                AREA    RESET, DATA, READONLY\r
+                EXPORT  __Vectors\r
+\r
+__Vectors       DCD     __initial_sp              ; Top of Stack\r
+                DCD     Reset_Handler             ; Reset Handler\r
+                DCD     NMI_Handler               ; NMI Handler\r
+                DCD     HardFault_Handler         ; Hard Fault Handler\r
+                DCD     MemManage_Handler         ; MPU Fault Handler\r
+                DCD     BusFault_Handler          ; Bus Fault Handler\r
+                DCD     UsageFault_Handler        ; Usage Fault Handler\r
+                DCD     0                         ; Reserved\r
+                DCD     0                         ; Reserved\r
+                DCD     0                         ; Reserved\r
+                DCD     0                         ; Reserved\r
+                DCD     vPortSVCHandler           ; SVCall Handler\r
+                DCD     DebugMon_Handler          ; Debug Monitor Handler\r
+                DCD     0                         ; Reserved\r
+                DCD     xPortPendSVHandler        ; PendSV Handler\r
+                DCD     xPortSysTickHandler       ; SysTick Handler\r
+\r
+                ; External Interrupts\r
+                DCD     WWDG_IRQHandler           ; Window Watchdog\r
+                DCD     PVD_IRQHandler            ; PVD through EXTI Line detect\r
+                DCD     TAMPER_IRQHandler         ; Tamper\r
+                DCD     RTC_IRQHandler            ; RTC\r
+                DCD     FLASH_IRQHandler          ; Flash\r
+                DCD     RCC_IRQHandler            ; RCC\r
+                DCD     EXTI0_IRQHandler          ; EXTI Line 0\r
+                DCD     EXTI1_IRQHandler          ; EXTI Line 1\r
+                DCD     EXTI2_IRQHandler          ; EXTI Line 2\r
+                DCD     EXTI3_IRQHandler          ; EXTI Line 3\r
+                DCD     EXTI4_IRQHandler          ; EXTI Line 4\r
+                DCD     DMAChannel1_IRQHandler    ; DMA Channel 1\r
+                DCD     DMAChannel2_IRQHandler    ; DMA Channel 2\r
+                DCD     DMAChannel3_IRQHandler    ; DMA Channel 3\r
+                DCD     DMAChannel4_IRQHandler    ; DMA Channel 4\r
+                DCD     DMAChannel5_IRQHandler    ; DMA Channel 5\r
+                DCD     DMAChannel6_IRQHandler    ; DMA Channel 6\r
+                DCD     DMAChannel7_IRQHandler    ; DMA Channel 7\r
+                DCD     ADC_IRQHandler            ; ADC\r
+                DCD     USB_HP_CAN_TX_IRQHandler  ; USB High Priority or CAN TX\r
+                DCD     USB_LP_CAN_RX0_IRQHandler ; USB Low  Priority or CAN RX0\r
+                DCD     CAN_RX1_IRQHandler        ; CAN RX1\r
+                DCD     CAN_SCE_IRQHandler        ; CAN SCE\r
+                DCD     EXTI9_5_IRQHandler        ; EXTI Line 9..5\r
+                DCD     TIM1_BRK_IRQHandler       ; TIM1 Break\r
+                DCD     TIM1_UP_IRQHandler        ; TIM1 Update\r
+                DCD     TIM1_TRG_COM_IRQHandler   ; TIM1 Trigger and Commutation\r
+                DCD     TIM1_CC_IRQHandler        ; TIM1 Capture Compare\r
+                DCD     vTimer2IntHandler         ; TIM2\r
+                DCD     TIM3_IRQHandler           ; TIM3\r
+                DCD     TIM4_IRQHandler           ; TIM4\r
+                DCD     I2C1_EV_IRQHandler        ; I2C1 Event\r
+                DCD     I2C1_ER_IRQHandler        ; I2C1 Error\r
+                DCD     I2C2_EV_IRQHandler        ; I2C2 Event\r
+                DCD     I2C2_ER_IRQHandler        ; I2C2 Error\r
+                DCD     SPI1_IRQHandler           ; SPI1\r
+                DCD     SPI2_IRQHandler           ; SPI2\r
+                DCD     vUARTInterruptHandler     ; USART1\r
+                DCD     USART2_IRQHandler         ; USART2\r
+                DCD     USART3_IRQHandler         ; USART3\r
+                DCD     EXTI15_10_IRQHandler      ; EXTI Line 15..10\r
+                DCD     RTCAlarm_IRQHandler       ; RTC Alarm through EXTI Line\r
+                DCD     USBWakeUp_IRQHandler      ; USB Wakeup from suspend\r
+\r
+\r
+                AREA    |.text|, CODE, READONLY\r
+\r
+\r
+; Reset Handler\r
+\r
+Reset_Handler   PROC\r
+                EXPORT  Reset_Handler             [WEAK]\r
+                IMPORT  __main\r
+                LDR     R0, =__main\r
+                BX      R0\r
+                ENDP\r
+\r
+\r
+; Dummy Exception Handlers (infinite loops which can be modified)                \r
+\r
+NMI_Handler     PROC\r
+                EXPORT  NMI_Handler               [WEAK]\r
+                B       .\r
+                ENDP\r
+HardFault_Handler\\r
+                PROC\r
+                EXPORT  HardFault_Handler         [WEAK]\r
+                B       .\r
+                ENDP\r
+MemManage_Handler\\r
+                PROC\r
+                EXPORT  MemManage_Handler         [WEAK]\r
+                B       .\r
+                ENDP\r
+BusFault_Handler\\r
+                PROC\r
+                EXPORT  BusFault_Handler          [WEAK]\r
+                B       .\r
+                ENDP\r
+UsageFault_Handler\\r
+                PROC\r
+                EXPORT  UsageFault_Handler        [WEAK]\r
+                B       .\r
+                ENDP\r
+SVC_Handler     PROC\r
+                EXPORT  SVC_Handler               [WEAK]\r
+                B       .\r
+                ENDP\r
+DebugMon_Handler\\r
+                PROC\r
+                EXPORT  DebugMon_Handler          [WEAK]\r
+                B       .\r
+                ENDP\r
+PendSV_Handler  PROC\r
+                EXPORT  PendSV_Handler            [WEAK]\r
+                B       .\r
+                ENDP\r
+SysTick_Handler PROC\r
+                EXPORT  SysTick_Handler           [WEAK]\r
+                B       .\r
+                ENDP\r
+\r
+Default_Handler PROC\r
+\r
+                EXPORT  WWDG_IRQHandler           [WEAK]\r
+                EXPORT  PVD_IRQHandler            [WEAK]\r
+                EXPORT  TAMPER_IRQHandler         [WEAK]\r
+                EXPORT  RTC_IRQHandler            [WEAK]\r
+                EXPORT  FLASH_IRQHandler          [WEAK]\r
+                EXPORT  RCC_IRQHandler            [WEAK]\r
+                EXPORT  EXTI0_IRQHandler          [WEAK]\r
+                EXPORT  EXTI1_IRQHandler          [WEAK]\r
+                EXPORT  EXTI2_IRQHandler          [WEAK]\r
+                EXPORT  EXTI3_IRQHandler          [WEAK]\r
+                EXPORT  EXTI4_IRQHandler          [WEAK]\r
+                EXPORT  DMAChannel1_IRQHandler    [WEAK]\r
+                EXPORT  DMAChannel2_IRQHandler    [WEAK]\r
+                EXPORT  DMAChannel3_IRQHandler    [WEAK]\r
+                EXPORT  DMAChannel4_IRQHandler    [WEAK]\r
+                EXPORT  DMAChannel5_IRQHandler    [WEAK]\r
+                EXPORT  DMAChannel6_IRQHandler    [WEAK]\r
+                EXPORT  DMAChannel7_IRQHandler    [WEAK]\r
+                EXPORT  ADC_IRQHandler            [WEAK]\r
+                EXPORT  USB_HP_CAN_TX_IRQHandler  [WEAK]\r
+                EXPORT  USB_LP_CAN_RX0_IRQHandler [WEAK]\r
+                EXPORT  CAN_RX1_IRQHandler        [WEAK]\r
+                EXPORT  CAN_SCE_IRQHandler        [WEAK]\r
+                EXPORT  EXTI9_5_IRQHandler        [WEAK]\r
+                EXPORT  TIM1_BRK_IRQHandler       [WEAK]\r
+                EXPORT  TIM1_UP_IRQHandler        [WEAK]\r
+                EXPORT  TIM1_TRG_COM_IRQHandler   [WEAK]\r
+                EXPORT  TIM1_CC_IRQHandler        [WEAK]\r
+                EXPORT  TIM2_IRQHandler           [WEAK]\r
+                EXPORT  TIM3_IRQHandler           [WEAK]\r
+                EXPORT  TIM4_IRQHandler           [WEAK]\r
+                EXPORT  I2C1_EV_IRQHandler        [WEAK]\r
+                EXPORT  I2C1_ER_IRQHandler        [WEAK]\r
+                EXPORT  I2C2_EV_IRQHandler        [WEAK]\r
+                EXPORT  I2C2_ER_IRQHandler        [WEAK]\r
+                EXPORT  SPI1_IRQHandler           [WEAK]\r
+                EXPORT  SPI2_IRQHandler           [WEAK]\r
+                EXPORT  USART1_IRQHandler         [WEAK]\r
+                EXPORT  USART2_IRQHandler         [WEAK]\r
+                EXPORT  USART3_IRQHandler         [WEAK]\r
+                EXPORT  EXTI15_10_IRQHandler      [WEAK]\r
+                EXPORT  RTCAlarm_IRQHandler       [WEAK]\r
+                EXPORT  USBWakeUp_IRQHandler      [WEAK]\r
+\r
+WWDG_IRQHandler\r
+PVD_IRQHandler\r
+TAMPER_IRQHandler\r
+RTC_IRQHandler\r
+FLASH_IRQHandler\r
+RCC_IRQHandler\r
+EXTI0_IRQHandler\r
+EXTI1_IRQHandler\r
+EXTI2_IRQHandler\r
+EXTI3_IRQHandler\r
+EXTI4_IRQHandler\r
+DMAChannel1_IRQHandler\r
+DMAChannel2_IRQHandler\r
+DMAChannel3_IRQHandler\r
+DMAChannel4_IRQHandler\r
+DMAChannel5_IRQHandler\r
+DMAChannel6_IRQHandler\r
+DMAChannel7_IRQHandler\r
+ADC_IRQHandler\r
+USB_HP_CAN_TX_IRQHandler\r
+USB_LP_CAN_RX0_IRQHandler\r
+CAN_RX1_IRQHandler\r
+CAN_SCE_IRQHandler\r
+EXTI9_5_IRQHandler\r
+TIM1_BRK_IRQHandler\r
+TIM1_UP_IRQHandler\r
+TIM1_TRG_COM_IRQHandler\r
+TIM1_CC_IRQHandler\r
+TIM2_IRQHandler\r
+TIM3_IRQHandler\r
+TIM4_IRQHandler\r
+I2C1_EV_IRQHandler\r
+I2C1_ER_IRQHandler\r
+I2C2_EV_IRQHandler\r
+I2C2_ER_IRQHandler\r
+SPI1_IRQHandler\r
+SPI2_IRQHandler\r
+USART1_IRQHandler\r
+USART2_IRQHandler\r
+USART3_IRQHandler\r
+EXTI15_10_IRQHandler\r
+RTCAlarm_IRQHandler\r
+USBWakeUp_IRQHandler\r
+\r
+                B       .\r
+\r
+                ENDP\r
+\r
+\r
+                ALIGN\r
+\r
+\r
+; User Initial Stack & Heap\r
+\r
+                IF      :DEF:__MICROLIB\r
+                \r
+                EXPORT  __initial_sp\r
+                EXPORT  __heap_base\r
+                EXPORT  __heap_limit\r
+                \r
+                ELSE\r
+                \r
+                IMPORT  __use_two_region_memory\r
+                EXPORT  __user_initial_stackheap\r
+__user_initial_stackheap\r
+\r
+                LDR     R0, =  Heap_Mem\r
+                LDR     R1, =(Stack_Mem + Stack_Size)\r
+                LDR     R2, = (Heap_Mem +  Heap_Size)\r
+                LDR     R3, = Stack_Mem\r
+                BX      LR\r
+\r
+                ALIGN\r
+\r
+                ENDIF\r
+\r
+\r
+                END\r

diff --git a/Demo/CORTEX_STM32F103_Keil/main.c b/Demo/CORTEX_STM32F103_Keil/main.c
new file mode 100644 (file)
index 0000000..dfbf6ba
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/main.c
@@ -0,0 +1,456 @@
+/*\r
+       FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
+    * and even write all or part of your application on your behalf.          *\r
+    * See http://www.OpenRTOS.com for details of the services we provide to   *\r
+    * expedite your project.                                                  *\r
+    *                                                                         *\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+\r
+       Please ensure to read the configuration and relevant port sections of the\r
+       online documentation.\r
+\r
+       http://www.FreeRTOS.org - Documentation, latest information, license and \r
+       contact details.\r
+\r
+       http://www.SafeRTOS.com - A version that is certified for use in safety \r
+       critical systems.\r
+\r
+       http://www.OpenRTOS.com - Commercial support, development, porting, \r
+       licensing and training services.\r
+*/\r
+\r
+/*\r
+ * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
+ * documentation provides more details of the standard demo application tasks.\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Fast Interrupt Test" - A high frequency periodic interrupt is generated\r
+ * using a free running timer to demonstrate the use of the\r
+ * configKERNEL_INTERRUPT_PRIORITY configuration constant.  The interrupt\r
+ * service routine measures the number of processor clocks that occur between\r
+ * each interrupt - and in so doing measures the jitter in the interrupt timing.\r
+ * The maximum measured jitter time is latched in the ulMaxJitter variable, and\r
+ * displayed on the LCD by the 'Check' task as described below.  The\r
+ * fast interrupt is configured and handled in the timertest.c source file.\r
+ *\r
+ * "LCD" task - the LCD task is a 'gatekeeper' task.  It is the only task that\r
+ * is permitted to access the display directly.  Other tasks wishing to write a\r
+ * message to the LCD send the message on a queue to the LCD task instead of\r
+ * accessing the LCD themselves.  The LCD task just blocks on the queue waiting\r
+ * for messages - waking and displaying the messages as they arrive.\r
+ *\r
+ * "Check" task -  This only executes every five seconds but has the highest\r
+ * priority so is guaranteed to get processor time.  Its main function is to\r
+ * check that all the standard demo tasks are still operational.  Should any\r
+ * unexpected behaviour within a demo task be discovered the 'check' task will\r
+ * write an error to the LCD (via the LCD task).  If all the demo tasks are\r
+ * executing with their expected behaviour then the check task writes PASS\r
+ * along with the max jitter time to the LCD (again via the LCD task), as\r
+ * described above.\r
+ *\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+\r
+/* Library includes. */\r
+#include "stm32f10x_it.h"\r
+\r
+/* Demo app includes. */\r
+#include "lcd.h"\r
+#include "LCD_Message.h"\r
+#include "BlockQ.h"\r
+#include "death.h"\r
+#include "integer.h"\r
+#include "blocktim.h"\r
+#include "partest.h"\r
+#include "semtest.h"\r
+#include "PollQ.h"\r
+#include "flash.h"\r
+#include "comtest2.h"\r
+\r
+/* Task priorities. */\r
+#define mainQUEUE_POLL_PRIORITY                                ( tskIDLE_PRIORITY + 2 )\r
+#define mainCHECK_TASK_PRIORITY                                ( tskIDLE_PRIORITY + 3 )\r
+#define mainSEM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 1 )\r
+#define mainBLOCK_Q_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
+#define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 3 )\r
+#define mainFLASH_TASK_PRIORITY                                ( tskIDLE_PRIORITY + 1 )\r
+#define mainCOM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 1 )\r
+#define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
+\r
+/* Constants related to the LCD. */\r
+#define mainMAX_LINE                                           ( 240 )\r
+#define mainROW_INCREMENT                                      ( 24 )\r
+#define mainMAX_COLUMN                                         ( 20 )\r
+#define mainCOLUMN_START                                       ( 319 )\r
+#define mainCOLUMN_INCREMENT                           ( 16 )\r
+\r
+/* The maximum number of message that can be waiting for display at any one\r
+time. */\r
+#define mainLCD_QUEUE_SIZE                                     ( 3 )\r
+\r
+/* The check task uses the sprintf function so requires a little more stack. */\r
+#define mainCHECK_TASK_STACK_SIZE                      ( configMINIMAL_STACK_SIZE + 50 )\r
+\r
+/* Dimensions the buffer into which the jitter time is written. */\r
+#define mainMAX_MSG_LEN                                                25\r
+\r
+/* The time between cycles of the 'check' task. */\r
+#define mainCHECK_DELAY                                                ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
+\r
+/* The number of nano seconds between each processor clock. */\r
+#define mainNS_PER_CLOCK ( ( unsigned portLONG ) ( ( 1.0 / ( double ) configCPU_CLOCK_HZ ) * 1000000000.0 ) )\r
+\r
+/* Baud rate used by the comtest tasks. */\r
+#define mainCOM_TEST_BAUD_RATE         ( 115200 )\r
+\r
+/* The LED used by the comtest tasks. See the comtest.c file for more\r
+information. */\r
+#define mainCOM_TEST_LED                       ( 3 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Configure the clocks, GPIO and other peripherals as required by the demo.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/*\r
+ * Configure the LCD as required by the demo.\r
+ */\r
+static void prvConfigureLCD( void );\r
+\r
+/*\r
+ * The LCD is written two by more than one task so is controlled by a\r
+ * 'gatekeeper' task.  This is the only task that is actually permitted to\r
+ * access the LCD directly.  Other tasks wanting to display a message send\r
+ * the message to the gatekeeper.\r
+ */\r
+static void vLCDTask( void *pvParameters );\r
+\r
+/*\r
+ * Retargets the C library printf function to the USART.\r
+ */\r
+int fputc( int ch, FILE *f );\r
+\r
+/*\r
+ * Checks the status of all the demo tasks then prints a message to the\r
+ * display.  The message will be either PASS - and include in brackets the\r
+ * maximum measured jitter time (as described at the to of the file), or a\r
+ * message that describes which of the standard demo tasks an error has been\r
+ * discovered in.\r
+ *\r
+ * Messages are not written directly to the terminal, but passed to vLCDTask\r
+ * via a queue.\r
+ */\r
+static void vCheckTask( void *pvParameters );\r
+\r
+/*\r
+ * Configures the timers and interrupts for the fast interrupt test as\r
+ * described at the top of this file.\r
+ */\r
+extern void vSetupTimerTest( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used to send messages to the LCD task. */\r
+xQueueHandle xLCDQueue;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+int main( void )\r
+{\r
+#ifdef DEBUG\r
+  debug();\r
+#endif\r
+\r
+       prvSetupHardware();\r
+\r
+       /* Create the queue used by the LCD task.  Messages for display on the LCD\r
+       are received via this queue. */\r
+       xLCDQueue = xQueueCreate( mainLCD_QUEUE_SIZE, sizeof( xLCDMessage ) );\r
+       \r
+       /* Start the standard demo tasks. */\r
+       vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+    vCreateBlockTimeTasks();\r
+    vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+    vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+    vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
+       vStartLEDFlashTasks( mainFLASH_TASK_PRIORITY );\r
+       vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
+\r
+       /* Start the tasks defined within this file/specific to this demo. */\r
+    xTaskCreate( vCheckTask, ( signed portCHAR * ) "Check", mainCHECK_TASK_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );  \r
+       xTaskCreate( vLCDTask, ( signed portCHAR * ) "LCD", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+\r
+       /* The suicide tasks must be created last as they need to know how many\r
+       tasks were running prior to their creation in order to ascertain whether\r
+       or not the correct/expected number of tasks are running at any given time. */\r
+    vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+       \r
+       /* Configure the timers used by the fast interrupt timer test. */\r
+       vSetupTimerTest();\r
+       \r
+       /* Start the scheduler. */\r
+       vTaskStartScheduler();\r
+       \r
+       /* Will only get here if there was not enough heap space to create the\r
+       idle task. */\r
+       return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vLCDTask( void *pvParameters )\r
+{\r
+xLCDMessage xMessage;\r
+\r
+       /* Initialise the LCD and display a startup message. */\r
+       prvConfigureLCD();\r
+       LCD_DrawMonoPict( ( unsigned portLONG * ) pcBitmap );\r
+\r
+       for( ;; )\r
+       {\r
+               /* Wait for a message to arrive that requires displaying. */\r
+               while( xQueueReceive( xLCDQueue, &xMessage, portMAX_DELAY ) != pdPASS );\r
+\r
+               /* Display the message.  Print each message to a different position. */\r
+               printf( ( portCHAR const * ) xMessage.pcMessage );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vCheckTask( void *pvParameters )\r
+{\r
+portTickType xLastExecutionTime;\r
+xLCDMessage xMessage;\r
+static signed portCHAR cPassMessage[ mainMAX_MSG_LEN ];\r
+extern unsigned portSHORT usMaxJitter;\r
+\r
+       xLastExecutionTime = xTaskGetTickCount();\r
+       xMessage.pcMessage = cPassMessage;\r
+       \r
+    for( ;; )\r
+       {\r
+               /* Perform this check every mainCHECK_DELAY milliseconds. */\r
+               vTaskDelayUntil( &xLastExecutionTime, mainCHECK_DELAY );\r
+\r
+               /* Has an error been found in any task? */\r
+\r
+        if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN BLOCK Q\n";\r
+               }\r
+               else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN BLOCK TIME\n";\r
+               }\r
+        else if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+        {\r
+            xMessage.pcMessage = "ERROR IN SEMAPHORE\n";\r
+        }\r
+        else if( xArePollingQueuesStillRunning() != pdTRUE )\r
+        {\r
+            xMessage.pcMessage = "ERROR IN POLL Q\n";\r
+        }\r
+        else if( xIsCreateTaskStillRunning() != pdTRUE )\r
+        {\r
+            xMessage.pcMessage = "ERROR IN CREATE\n";\r
+        }\r
+        else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+        {\r
+            xMessage.pcMessage = "ERROR IN MATH\n";\r
+        }\r
+               else if( xAreComTestTasksStillRunning() != pdTRUE )\r
+               {\r
+                       xMessage.pcMessage = "ERROR IN COM TEST\n";\r
+               }                               \r
+               else\r
+               {\r
+                       sprintf( ( portCHAR * ) cPassMessage, "PASS [%uns]\n", ( ( unsigned portLONG ) usMaxJitter ) * mainNS_PER_CLOCK );\r
+               }\r
+\r
+               /* Send the message to the LCD gatekeeper for display. */\r
+               xQueueSend( xLCDQueue, &xMessage, portMAX_DELAY );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupHardware( void )\r
+{\r
+       /* Start with the clocks in their expected state. */\r
+       RCC_DeInit();\r
+\r
+       /* Enable HSE (high speed external clock). */\r
+       RCC_HSEConfig( RCC_HSE_ON );\r
+\r
+       /* Wait till HSE is ready. */\r
+       while( RCC_GetFlagStatus( RCC_FLAG_HSERDY ) == RESET )\r
+       {\r
+       }\r
+\r
+       /* 2 wait states required on the flash. */\r
+       *( ( unsigned portLONG * ) 0x40022000 ) = 0x02;\r
+\r
+       /* HCLK = SYSCLK */\r
+       RCC_HCLKConfig( RCC_SYSCLK_Div1 );\r
+\r
+       /* PCLK2 = HCLK */\r
+       RCC_PCLK2Config( RCC_HCLK_Div1 );\r
+\r
+       /* PCLK1 = HCLK/2 */\r
+       RCC_PCLK1Config( RCC_HCLK_Div2 );\r
+\r
+       /* PLLCLK = 8MHz * 9 = 72 MHz. */\r
+       RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_9 );\r
+\r
+       /* Enable PLL. */\r
+       RCC_PLLCmd( ENABLE );\r
+\r
+       /* Wait till PLL is ready. */\r
+       while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)\r
+       {\r
+       }\r
+\r
+       /* Select PLL as system clock source. */\r
+       RCC_SYSCLKConfig( RCC_SYSCLKSource_PLLCLK );\r
+\r
+       /* Wait till PLL is used as system clock source. */\r
+       while( RCC_GetSYSCLKSource() != 0x08 )\r
+       {\r
+       }\r
+\r
+       /* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */\r
+       RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC\r
+                                                       | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, ENABLE );\r
+\r
+       /* SPI2 Periph clock enable */\r
+       RCC_APB1PeriphClockCmd( RCC_APB1Periph_SPI2, ENABLE );\r
+\r
+\r
+       /* Set the Vector Table base address at 0x08000000 */\r
+       NVIC_SetVectorTable( NVIC_VectTab_FLASH, 0x0 );\r
+\r
+       NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );\r
+       \r
+       /* Configure HCLK clock as SysTick clock source. */\r
+       SysTick_CLKSourceConfig( SysTick_CLKSource_HCLK );\r
+       \r
+       vParTestInitialise();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvConfigureLCD( void )\r
+{\r
+GPIO_InitTypeDef GPIO_InitStructure;\r
+\r
+       /* Configure LCD Back Light (PA8) as output push-pull */\r
+       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;\r
+       GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
+       GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;\r
+       GPIO_Init( GPIOA, &GPIO_InitStructure );\r
+\r
+       /* Set the Backlight Pin */\r
+       GPIO_WriteBit(GPIOA, GPIO_Pin_8, Bit_SET);\r
+\r
+       /* Initialize the LCD */\r
+       LCD_Init();\r
+\r
+       /* Set the Back Color */\r
+       LCD_SetBackColor( White );\r
+\r
+       /* Set the Text Color */\r
+       LCD_SetTextColor( 0x051F );\r
+\r
+       LCD_Clear();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+int fputc( int ch, FILE *f )\r
+{\r
+static unsigned portSHORT usColumn = 0, usRefColumn = mainCOLUMN_START;\r
+static unsigned portCHAR ucLine = 0;\r
+\r
+       if( ( usColumn == 0 ) && ( ucLine == 0 ) )\r
+       {\r
+               LCD_Clear();\r
+       }\r
+\r
+       if( ch != '\n' )\r
+       {\r
+               /* Display one character on LCD */\r
+               LCD_DisplayChar( ucLine, usRefColumn, (u8) ch );\r
+               \r
+               /* Decrement the column position by 16 */\r
+               usRefColumn -= mainCOLUMN_INCREMENT;\r
+               \r
+               /* Increment the character counter */\r
+               usColumn++;\r
+               if( usColumn == mainMAX_COLUMN )\r
+               {\r
+                       ucLine += mainROW_INCREMENT;\r
+                       usRefColumn = mainCOLUMN_START;\r
+                       usColumn = 0;\r
+               }\r
+       }\r
+       else\r
+       {\r
+               /* Move back to the first column of the next line. */\r
+               ucLine += mainROW_INCREMENT;\r
+               usRefColumn = mainCOLUMN_START;\r
+               usColumn = 0;   \r
+       }\r
+\r
+       /* Wrap back to the top of the display. */\r
+       if( ucLine >= mainMAX_LINE )\r
+       {\r
+               ucLine = 0;\r
+       }\r
+       \r
+       return ch;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#ifdef  DEBUG\r
+/* Keep the linker happy. */\r
+void assert_failed( unsigned portCHAR* pcFile, unsigned portLONG ulLine )\r
+{\r
+       for( ;; )\r
+       {\r
+       }\r
+}\r
+#endif\r

diff --git a/Demo/CORTEX_STM32F103_Keil/serial/serial.c b/Demo/CORTEX_STM32F103_Keil/serial/serial.c
new file mode 100644 (file)
index 0000000..af6100e
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/serial/serial.c
@@ -0,0 +1,250 @@
+/*\r
+       FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS distribution.\r
+\r
+       FreeRTOS is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
+    * and even write all or part of your application on your behalf.          *\r
+    * See http://www.OpenRTOS.com for details of the services we provide to   *\r
+    * expedite your project.                                                  *\r
+    *                                                                         *\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+\r
+       Please ensure to read the configuration and relevant port sections of the\r
+       online documentation.\r
+\r
+       http://www.FreeRTOS.org - Documentation, latest information, license and \r
+       contact details.\r
+\r
+       http://www.SafeRTOS.com - A version that is certified for use in safety \r
+       critical systems.\r
+\r
+       http://www.OpenRTOS.com - Commercial support, development, porting, \r
+       licensing and training services.\r
+*/\r
+\r
+/*\r
+       BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.\r
+*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+\r
+/* Library includes. */\r
+#include "stm32f10x_lib.h"\r
+\r
+/* Demo application includes. */\r
+#include "serial.h"\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Misc defines. */\r
+#define serINVALID_QUEUE                               ( ( xQueueHandle ) 0 )\r
+#define serNO_BLOCK                                            ( ( portTickType ) 0 )\r
+#define serTX_BLOCK_TIME                               ( 40 / portTICK_RATE_MS )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used to hold received characters. */\r
+static xQueueHandle xRxedChars;\r
+static xQueueHandle xCharsForTx;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* UART interrupt handler. */\r
+void vUARTInterruptHandler( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See the serial2.h header file.\r
+ */\r
+xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
+{\r
+xComPortHandle xReturn;\r
+USART_InitTypeDef USART_InitStructure;\r
+NVIC_InitTypeDef NVIC_InitStructure;\r
+GPIO_InitTypeDef GPIO_InitStructure;\r
+\r
+       /* Create the queues used to hold Rx/Tx characters. */\r
+       xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
+       xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
+       \r
+       /* If the queue/semaphore was created correctly then setup the serial port\r
+       hardware. */\r
+       if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )\r
+       {\r
+               /* Enable USART1 clock */\r
+               RCC_APB2PeriphClockCmd( RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE ); \r
+\r
+               /* Configure USART1 Rx (PA10) as input floating */\r
+               GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;\r
+               GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r
+               GPIO_Init( GPIOA, &GPIO_InitStructure );\r
+               \r
+               /* Configure USART1 Tx (PA9) as alternate function push-pull */\r
+               GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;\r
+               GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
+               GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
+               GPIO_Init( GPIOA, &GPIO_InitStructure );\r
+\r
+               USART_InitStructure.USART_BaudRate = ulWantedBaud;\r
+               USART_InitStructure.USART_WordLength = USART_WordLength_8b;\r
+               USART_InitStructure.USART_StopBits = USART_StopBits_1;\r
+               USART_InitStructure.USART_Parity = USART_Parity_No ;\r
+               USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;\r
+               USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;\r
+               USART_InitStructure.USART_Clock = USART_Clock_Disable;\r
+               USART_InitStructure.USART_CPOL = USART_CPOL_Low;\r
+               USART_InitStructure.USART_CPHA = USART_CPHA_2Edge;\r
+               USART_InitStructure.USART_LastBit = USART_LastBit_Disable;\r
+               \r
+               USART_Init( USART1, &USART_InitStructure );\r
+               \r
+               USART_ITConfig( USART1, USART_IT_RXNE, ENABLE );\r
+               \r
+               NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQChannel;\r
+               NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = configLIBRARY_KERNEL_INTERRUPT_PRIORITY;\r
+               NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;\r
+               NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;\r
+               NVIC_Init( &NVIC_InitStructure );\r
+               \r
+               USART_Cmd( USART1, ENABLE );            \r
+       }\r
+       else\r
+       {\r
+               xReturn = ( xComPortHandle ) 0;\r
+       }\r
+\r
+       /* This demo file only supports a single port but we have to return\r
+       something to comply with the standard demo header file. */\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )\r
+{\r
+       /* The port handle is not required as this driver only supports one port. */\r
+       ( void ) pxPort;\r
+\r
+       /* Get the next character from the buffer.  Return false if no characters\r
+       are available, or arrive before xBlockTime expires. */\r
+       if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
+       {\r
+               return pdTRUE;\r
+       }\r
+       else\r
+       {\r
+               return pdFALSE;\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )\r
+{\r
+signed portCHAR *pxNext;\r
+\r
+       /* A couple of parameters that this port does not use. */\r
+       ( void ) usStringLength;\r
+       ( void ) pxPort;\r
+\r
+       /* NOTE: This implementation does not handle the queue being full as no\r
+       block time is used! */\r
+\r
+       /* The port handle is not required as this driver only supports UART1. */\r
+       ( void ) pxPort;\r
+\r
+       /* Send each character in the string, one at a time. */\r
+       pxNext = ( signed portCHAR * ) pcString;\r
+       while( *pxNext )\r
+       {\r
+               xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );\r
+               pxNext++;\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )\r
+{\r
+signed portBASE_TYPE xReturn;\r
+\r
+       if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) == pdPASS )\r
+       {\r
+               xReturn = pdPASS;\r
+               USART_ITConfig( USART1, USART_IT_TXE, ENABLE );\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdFAIL;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialClose( xComPortHandle xPort )\r
+{\r
+       /* Not supported as not required by the demo application. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vUARTInterruptHandler( void )\r
+{\r
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+portCHAR cChar;\r
+\r
+       if( USART_GetITStatus( USART1, USART_IT_TXE ) == SET )\r
+       {\r
+               /* The interrupt was caused by the THR becoming empty.  Are there any\r
+               more characters to transmit? */\r
+               if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
+               {\r
+                       /* A character was retrieved from the queue so can be sent to the\r
+                       THR now. */\r
+                       USART_SendData( USART1, cChar );\r
+               }\r
+               else\r
+               {\r
+                       USART_ITConfig( USART1, USART_IT_TXE, DISABLE );                \r
+               }               \r
+       }\r
+       \r
+       if( USART_GetITStatus( USART1, USART_IT_RXNE ) == SET )\r
+       {\r
+               cChar = USART_ReceiveData( USART1 );\r
+               xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
+       }       \r
+       \r
+       portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
+}\r
+\r
+\r
+\r
+\r
+\r
+       \r

diff --git a/Demo/CORTEX_STM32F103_Keil/spi_flash.c b/Demo/CORTEX_STM32F103_Keil/spi_flash.c
new file mode 100644 (file)
index 0000000..b96cbff
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/spi_flash.c
@@ -0,0 +1,498 @@
+/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************\r
+* File Name          : spi_flash.c\r
+* Author             : MCD Application Team\r
+* Date First Issued  : 02/05/2007\r
+* Description        : This file provides a set of functions needed to manage the\r
+*                      communication between SPI peripheral and SPI M25P64 FLASH.\r
+********************************************************************************\r
+* History:\r
+* 04/02/2007: V0.2\r
+* 02/05/2007: V0.1\r
+********************************************************************************\r
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.\r
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,\r
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE\r
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING\r
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+*******************************************************************************/\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "spi_flash.h"\r
+\r
+/* Private typedef -----------------------------------------------------------*/\r
+#define SPI_FLASH_PageSize 256\r
+\r
+#define WRITE      0x02  /* Write to Memory instruction */\r
+#define WRSR       0x01  /* Write Status Register instruction */ \r
+#define WREN       0x06  /* Write enable instruction */\r
+\r
+#define READ       0x03  /* Read from Memory instruction */\r
+#define RDSR       0x05  /* Read Status Register instruction  */\r
+#define RDID       0x9F  /* Read identification */\r
+#define SE         0xD8  /* Sector Erase instruction */\r
+#define BE         0xC7  /* Bulk Erase instruction */\r
+\r
+#define WIP_Flag   0x01  /* Write In Progress (WIP) flag */\r
+\r
+#define Dummy_Byte 0xA5\r
+\r
+/* Private define ------------------------------------------------------------*/\r
+/* Private macro -------------------------------------------------------------*/\r
+/* Private variables ---------------------------------------------------------*/\r
+/* Private function prototypes -----------------------------------------------*/\r
+/* Private functions ---------------------------------------------------------*/\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_Init\r
+* Description    : Initializes the peripherals used by the SPI FLASH driver.\r
+* Input          : None\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_Init(void)\r
+{\r
+  SPI_InitTypeDef  SPI_InitStructure;\r
+  GPIO_InitTypeDef GPIO_InitStructure;\r
+   \r
+  /* Enable SPI1 and GPIOA clocks */\r
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1 | RCC_APB2Periph_GPIOA, ENABLE);\r
+  \r
+  /* Configure SPI1 pins: NSS, SCK, MISO and MOSI */\r
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;\r
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
+  GPIO_Init(GPIOA, &GPIO_InitStructure);\r
+\r
+  /* Configure PA.4 as Output push-pull, used as Flash Chip select */\r
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;\r
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;\r
+  GPIO_Init(GPIOA, &GPIO_InitStructure);\r
+\r
+  /* Deselect the FLASH: Chip Select high */\r
+  SPI_FLASH_ChipSelect(High);\r
+\r
+  /* SPI1 configuration */ \r
+  SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;\r
+  SPI_InitStructure.SPI_Mode = SPI_Mode_Master;\r
+  SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;\r
+  SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;\r
+  SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;\r
+  SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;\r
+  SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;\r
+  SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;\r
+  SPI_InitStructure.SPI_CRCPolynomial = 7;\r
+  SPI_Init(SPI1, &SPI_InitStructure);\r
+  \r
+  /* Enable SPI1  */\r
+  SPI_Cmd(SPI1, ENABLE);   \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_SectorErase\r
+* Description    : Erases the specified FLASH sector.\r
+* Input          : SectorAddr: address of the sector to erase.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_SectorErase(u32 SectorAddr)\r
+{\r
+  /* Send write enable instruction */\r
+  SPI_FLASH_WriteEnable();\r
+                       \r
+  /* Sector Erase */ \r
+  /* Select the FLASH: Chip Select low */\r
+  SPI_FLASH_ChipSelect(Low);           \r
+  /* Send Sector Erase instruction  */\r
+  SPI_FLASH_SendByte(SE);\r
+  /* Send SectorAddr high nibble address byte */\r
+  SPI_FLASH_SendByte((SectorAddr & 0xFF0000) >> 16);\r
+  /* Send SectorAddr medium nibble address byte */\r
+  SPI_FLASH_SendByte((SectorAddr & 0xFF00) >> 8);\r
+  /* Send SectorAddr low nibble address byte */\r
+  SPI_FLASH_SendByte(SectorAddr & 0xFF);\r
+  /* Deselect the FLASH: Chip Select high */\r
+  SPI_FLASH_ChipSelect(High);  \r
+\r
+  /* Wait the end of Flash writing */\r
+  SPI_FLASH_WaitForWriteEnd(); \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_BulkErase\r
+* Description    : Erases the entire FLASH.\r
+* Input          : None\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_BulkErase(void)\r
+{      \r
+  /* Send write enable instruction */\r
+  SPI_FLASH_WriteEnable();     \r
+       \r
+  /* Bulk Erase */ \r
+  /* Select the FLASH: Chip Select low */\r
+  SPI_FLASH_ChipSelect(Low);           \r
+  /* Send Bulk Erase instruction  */\r
+  SPI_FLASH_SendByte(BE);\r
+  /* Deselect the FLASH: Chip Select high */\r
+  SPI_FLASH_ChipSelect(High);  \r
+               \r
+  /* Wait the end of Flash writing */\r
+  SPI_FLASH_WaitForWriteEnd();         \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_PageWrite\r
+* Description    : Writes more than one byte to the FLASH with a single WRITE\r
+*                  cycle(Page WRITE sequence). The number of byte can't exceed\r
+*                  the FLASH page size.\r
+* Input          : - pBuffer : pointer to the buffer  containing the data to be \r
+*                    written to the FLASH.\r
+*                  - WriteAddr : FLASH's internal address to write to.\r
+*                  - NumByteToWrite : number of bytes to write to the FLASH,\r
+*                    must be equal or less than "SPI_FLASH_PageSize" value. \r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_PageWrite(u8* pBuffer, u32 WriteAddr, u16 NumByteToWrite)\r
+{\r
+  /* Enable the write access to the FLASH */\r
+  SPI_FLASH_WriteEnable();             \r
+  \r
+  /* Select the FLASH: Chip Select low */\r
+  SPI_FLASH_ChipSelect(Low);      \r
+  /* Send "Write to Memory " instruction */    \r
+  SPI_FLASH_SendByte(WRITE);   \r
+  /* Send WriteAddr high nibble address byte to write to */\r
+  SPI_FLASH_SendByte((WriteAddr & 0xFF0000) >> 16);\r
+  /* Send WriteAddr medium nibble address byte to write to */\r
+  SPI_FLASH_SendByte((WriteAddr & 0xFF00) >> 8);  \r
+  /* Send WriteAddr low nibble address byte to write to */\r
+  SPI_FLASH_SendByte(WriteAddr & 0xFF);             \r
+  \r
+  /* while there is data to be written on the FLASH */\r
+  while(NumByteToWrite--) \r
+  {\r
+    /* Send the current byte */                        \r
+    SPI_FLASH_SendByte(*pBuffer);                     \r
+    /* Point on the next byte to be written */\r
+    pBuffer++; \r
+  }            \r
+  \r
+  /* Deselect the FLASH: Chip Select high */\r
+  SPI_FLASH_ChipSelect(High);\r
+  \r
+  /* Wait the end of Flash writing */\r
+  SPI_FLASH_WaitForWriteEnd(); \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_BufferWrite\r
+* Description    : Writes block of data to the FLASH. In this function, the\r
+*                  number of WRITE cycles are reduced, using Page WRITE sequence.\r
+* Input          : - pBuffer : pointer to the buffer  containing the data to be \r
+*                    written to the FLASH.\r
+*                  - WriteAddr : FLASH's internal address to write to.\r
+*                  - NumByteToWrite : number of bytes to write to the FLASH.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_BufferWrite(u8* pBuffer, u32 WriteAddr, u16 NumByteToWrite)\r
+{\r
+  u8 NumOfPage = 0, NumOfSingle = 0, Addr = 0, count = 0, temp = 0;\r
+\r
+  Addr = WriteAddr % SPI_FLASH_PageSize;\r
+  count = SPI_FLASH_PageSize - Addr;\r
+  NumOfPage =  NumByteToWrite / SPI_FLASH_PageSize;\r
+  NumOfSingle = NumByteToWrite % SPI_FLASH_PageSize;\r
+  \r
+  if(Addr == 0) /* WriteAddr is SPI_FLASH_PageSize aligned  */\r
+  {\r
+    if(NumOfPage == 0) /* NumByteToWrite < SPI_FLASH_PageSize */\r
+    {\r
+      SPI_FLASH_PageWrite(pBuffer, WriteAddr, NumByteToWrite);\r
+    }\r
+    else /* NumByteToWrite > SPI_FLASH_PageSize */ \r
+    {\r
+      while(NumOfPage--)\r
+      {\r
+        SPI_FLASH_PageWrite(pBuffer, WriteAddr, SPI_FLASH_PageSize);\r
+        WriteAddr +=  SPI_FLASH_PageSize;\r
+        pBuffer += SPI_FLASH_PageSize;  \r
+      }    \r
+     \r
+      SPI_FLASH_PageWrite(pBuffer, WriteAddr, NumOfSingle);      \r
+   }\r
+  }\r
+  else /* WriteAddr is not SPI_FLASH_PageSize aligned  */\r
+  {\r
+    if(NumOfPage== 0) /* NumByteToWrite < SPI_FLASH_PageSize */\r
+    {\r
+      if(NumOfSingle > count) /* (NumByteToWrite + WriteAddr) > SPI_FLASH_PageSize */\r
+      {\r
+       temp = NumOfSingle - count;\r
+       \r
+       SPI_FLASH_PageWrite(pBuffer, WriteAddr, count);\r
+        WriteAddr +=  count;\r
+        pBuffer += count; \r
+        \r
+        SPI_FLASH_PageWrite(pBuffer, WriteAddr, temp);         \r
+      }\r
+      else\r
+      {\r
+       SPI_FLASH_PageWrite(pBuffer, WriteAddr, NumByteToWrite);\r
+      }\r
+    }\r
+    else /* NumByteToWrite > SPI_FLASH_PageSize */\r
+    {\r
+      NumByteToWrite -= count;\r
+      NumOfPage =  NumByteToWrite / SPI_FLASH_PageSize;\r
+      NumOfSingle = NumByteToWrite % SPI_FLASH_PageSize;       \r
+      \r
+      SPI_FLASH_PageWrite(pBuffer, WriteAddr, count);\r
+      WriteAddr +=  count;\r
+      pBuffer += count;  \r
+     \r
+      while(NumOfPage--)\r
+      {\r
+        SPI_FLASH_PageWrite(pBuffer, WriteAddr, SPI_FLASH_PageSize);\r
+        WriteAddr +=  SPI_FLASH_PageSize;\r
+        pBuffer += SPI_FLASH_PageSize;  \r
+      }\r
+      \r
+      if(NumOfSingle != 0)\r
+      {\r
+        SPI_FLASH_PageWrite(pBuffer, WriteAddr, NumOfSingle);\r
+      }\r
+    }\r
+  }            \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_BufferRead\r
+* Description    : Reads a block of data from the FLASH.\r
+* Input          : - pBuffer : pointer to the buffer that receives the data read \r
+*                    from the FLASH.\r
+*                  - ReadAddr : FLASH's internal address to read from.\r
+*                  - NumByteToRead : number of bytes to read from the FLASH.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_BufferRead(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead)\r
+{\r
+  /* Select the FLASH: Chip Select low */\r
+  SPI_FLASH_ChipSelect(Low);      \r
+  \r
+  /* Send "Read from Memory " instruction */\r
+  SPI_FLASH_SendByte(READ);     \r
+  \r
+  /* Send ReadAddr high nibble address byte to read from */\r
+  SPI_FLASH_SendByte((ReadAddr & 0xFF0000) >> 16);\r
+  /* Send ReadAddr medium nibble address byte to read from */\r
+  SPI_FLASH_SendByte((ReadAddr& 0xFF00) >> 8);  \r
+  /* Send ReadAddr low nibble address byte to read from */\r
+  SPI_FLASH_SendByte(ReadAddr & 0xFF);     \r
+       \r
+  while(NumByteToRead--) /* while there is data to be read */\r
+  {\r
+    /* Read a byte from the FLASH */                   \r
+    *pBuffer = SPI_FLASH_SendByte(Dummy_Byte);   \r
+    /* Point to the next location where the byte read will be saved */\r
+    pBuffer++;\r
+  }    \r
+  \r
+  /* Deselect the FLASH: Chip Select high */\r
+  SPI_FLASH_ChipSelect(High);          \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_ReadID\r
+* Description    : Reads FLASH identification.\r
+* Input          : None\r
+* Output         : None\r
+* Return         : FLASH identification\r
+*******************************************************************************/\r
+u32 SPI_FLASH_ReadID(void)\r
+{       \r
+  u32 Temp = 0, Temp0 = 0, Temp1 = 0, Temp2 = 0;\r
+\r
+  /* Select the FLASH: Chip Select low */\r
+  SPI_FLASH_ChipSelect(Low);      \r
+  \r
+  /* Send "RDID " instruction */\r
+  SPI_FLASH_SendByte(0x9F);\r
+\r
+  /* Read a byte from the FLASH */                     \r
+  Temp0 = SPI_FLASH_SendByte(Dummy_Byte);\r
+\r
+  /* Read a byte from the FLASH */                     \r
+  Temp1 = SPI_FLASH_SendByte(Dummy_Byte);\r
+\r
+  /* Read a byte from the FLASH */                     \r
+  Temp2 = SPI_FLASH_SendByte(Dummy_Byte);\r
+\r
+  /* Deselect the FLASH: Chip Select high */\r
+  SPI_FLASH_ChipSelect(High);\r
+         \r
+  Temp = (Temp0 << 16) | (Temp1 << 8) | Temp2;\r
+\r
+  return Temp;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_StartReadSequence\r
+* Description    : Initiates a read data byte (READ) sequence from the Flash.\r
+*                  This is done by driving the /CS line low to select the device,\r
+*                  then the READ instruction is transmitted followed by 3 bytes\r
+*                  address. This function exit and keep the /CS line low, so the\r
+*                  Flash still being selected. With this technique the whole\r
+*                  content of the Flash is read with a single READ instruction.\r
+* Input          : - ReadAddr : FLASH's internal address to read from.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_StartReadSequence(u32 ReadAddr)\r
+{\r
+  /* Select the FLASH: Chip Select low */\r
+  SPI_FLASH_ChipSelect(Low);      \r
+  \r
+  /* Send "Read from Memory " instruction */\r
+  SPI_FLASH_SendByte(READ);     \r
+\r
+/* Send the 24-bit address of the address to read from -----------------------*/  \r
+  /* Send ReadAddr high nibble address byte */\r
+  SPI_FLASH_SendByte((ReadAddr & 0xFF0000) >> 16);\r
+  /* Send ReadAddr medium nibble address byte */\r
+  SPI_FLASH_SendByte((ReadAddr& 0xFF00) >> 8);  \r
+  /* Send ReadAddr low nibble address byte */\r
+  SPI_FLASH_SendByte(ReadAddr & 0xFF);  \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_ReadByte\r
+* Description    : Reads a byte from the SPI Flash.\r
+*                  This function must be used only if the Start_Read_Sequence\r
+*                  function has been previously called.\r
+* Input          : None\r
+* Output         : None\r
+* Return         : Byte Read from the SPI Flash.\r
+*******************************************************************************/\r
+u8 SPI_FLASH_ReadByte(void)\r
+{\r
+  return (SPI_FLASH_SendByte(Dummy_Byte));\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_ChipSelect\r
+* Description    : Selects or deselects the FLASH.\r
+* Input          : State : level to be applied on the FLASH's ChipSelect pin.\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_ChipSelect(u8 State)\r
+{\r
+  /* Set High or low the chip select line on PA.4 pin */\r
+  GPIO_WriteBit(GPIOA, GPIO_Pin_4, (BitAction)State);\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_SendByte\r
+* Description    : Sends a byte through the SPI interface and return the byte \r
+*                  received from the SPI bus.\r
+* Input          : byte : byte to send.\r
+* Output         : None\r
+* Return         : The value of the received byte.\r
+*******************************************************************************/\r
+u8 SPI_FLASH_SendByte(u8 byte)\r
+{\r
+  /* Loop while DR register in not emplty */\r
+  while(SPI_GetFlagStatus(SPI1, SPI_FLAG_TXE) == RESET); \r
+\r
+  /* Send byte through the SPI1 peripheral */  \r
+  SPI_SendData(SPI1, byte);    \r
+\r
+  /* Wait to receive a byte */\r
+  while(SPI_GetFlagStatus(SPI1, SPI_FLAG_RXNE) == RESET);\r
+\r
+  /* Return the byte read from the SPI bus */  \r
+  return SPI_ReceiveData(SPI1); \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_SendHalfWord\r
+* Description    : Sends a Half Word through the SPI interface and return the  \r
+*                  Half Word received from the SPI bus.\r
+* Input          : Half Word : Half Word to send.\r
+* Output         : None\r
+* Return         : The value of the received Half Word.\r
+*******************************************************************************/\r
+u16 SPI_FLASH_SendHalfWord(u16 HalfWord)\r
+{\r
+  /* Loop while DR register in not emplty */\r
+  while(SPI_GetFlagStatus(SPI1, SPI_FLAG_TXE) == RESET); \r
+\r
+  /* Send Half Word through the SPI1 peripheral */     \r
+  SPI_SendData(SPI1, HalfWord);        \r
+\r
+  /* Wait to receive a Half Word */\r
+  while(SPI_GetFlagStatus(SPI1, SPI_FLAG_RXNE) == RESET);\r
+\r
+  /* Return the Half Word read from the SPI bus */  \r
+  return SPI_ReceiveData(SPI1); \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_WriteEnable\r
+* Description    : Enables the write access to the FLASH.\r
+* Input          : None\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_WriteEnable(void)  \r
+{\r
+  /* Select the FLASH: Chip Select low */\r
+  SPI_FLASH_ChipSelect(Low);   \r
+  \r
+  /* Send "Write Enable" instruction */\r
+  SPI_FLASH_SendByte(WREN);\r
+  \r
+  /* Deselect the FLASH: Chip Select high */\r
+  SPI_FLASH_ChipSelect(High);  \r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name  : SPI_FLASH_WaitForWriteEnd\r
+* Description    : Polls the status of the Write In Progress (WIP) flag in the  \r
+*                  FLASH's status  register  and  loop  until write  opertaion\r
+*                  has completed.  \r
+* Input          : None\r
+* Output         : None\r
+* Return         : None\r
+*******************************************************************************/\r
+void SPI_FLASH_WaitForWriteEnd(void) \r
+{\r
+  u8 FLASH_Status = 0;\r
+  \r
+  /* Select the FLASH: Chip Select low */\r
+  SPI_FLASH_ChipSelect(Low);\r
+       \r
+  /* Send "Read Status Register" instruction */\r
+  SPI_FLASH_SendByte(RDSR);\r
+  \r
+  /* Loop as long as the memory is busy with a write cycle */          \r
+  do\r
+  {    \r
+        \r
+    /* Send a dummy byte to generate the clock needed by the FLASH \r
+    and put the value of the status register in FLASH_Status variable */\r
+    FLASH_Status = SPI_FLASH_SendByte(Dummy_Byte);  \r
+                                                                                                                                       \r
+  } while((FLASH_Status & WIP_Flag) == SET); /* Write in progress */  \r
+\r
+  /* Deselect the FLASH: Chip Select high */\r
+  SPI_FLASH_ChipSelect(High);          \r
+}\r
+\r
+/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/\r

diff --git a/Demo/CORTEX_STM32F103_Keil/stm32f10x_conf.h b/Demo/CORTEX_STM32F103_Keil/stm32f10x_conf.h
new file mode 100644 (file)
index 0000000..5537c25
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/stm32f10x_conf.h
@@ -0,0 +1,137 @@
+/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************\r
+* File Name          : stm32f10x_conf.h\r
+* Author             : MCD Application Team\r
+* Date First Issued  : 09/29/2006\r
+* Description        : Library configuration file.\r
+********************************************************************************\r
+* History:\r
+* mm/dd/yyyy: V0.1\r
+* 09/29/2006: V0.01\r
+********************************************************************************\r
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.\r
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,\r
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE\r
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING\r
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+*******************************************************************************/\r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef __STM32F10x_CONF_H\r
+#define __STM32F10x_CONF_H\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32f10x_type.h"\r
+\r
+/* Exported types ------------------------------------------------------------*/\r
+/* Exported constants --------------------------------------------------------*/\r
+/* Comment the line below to compile the library in release mode */\r
+//#define DEBUG\r
+\r
+/* Comment the line below to disable the specific peripheral inclusion */\r
+/************************************* ADC ************************************/\r
+//#define _ADC\r
+//#define _ADC1\r
+//#define _ADC2\r
+\r
+/************************************* CAN ************************************/\r
+//#define _CAN\r
+\r
+/************************************* DMA ************************************/\r
+//#define _DMA\r
+//#define _DMA_Channel1\r
+//#define _DMA_Channel2\r
+//#define _DMA_Channel3\r
+//#define _DMA_Channel4\r
+//#define _DMA_Channel5\r
+//#define _DMA_Channel6\r
+//#define _DMA_Channel7\r
+\r
+/************************************* EXTI ***********************************/\r
+#define _EXTI\r
+\r
+/************************************* GPIO ***********************************/\r
+#define _GPIO\r
+#define _GPIOA\r
+#define _GPIOB\r
+#define _GPIOC\r
+#define _GPIOD\r
+#define _GPIOE\r
+#define _AFIO\r
+\r
+/************************************* I2C ************************************/\r
+//#define _I2C\r
+//#define _I2C1\r
+//#define _I2C2\r
+\r
+/************************************* IWDG ***********************************/\r
+//#define _IWDG\r
+\r
+/************************************* NVIC ***********************************/\r
+#define _NVIC\r
+#define _SCB\r
+\r
+/************************************* BKP ************************************/\r
+//#define _BKP\r
+\r
+/************************************* PWR ************************************/\r
+//#define _PWR\r
+\r
+/************************************* RCC ************************************/\r
+#define _RCC\r
+\r
+/************************************* RTC ************************************/\r
+//#define _RTC\r
+\r
+/************************************* SPI ************************************/\r
+#define _SPI\r
+#define _SPI1\r
+#define _SPI2\r
+\r
+/************************************* SysTick ********************************/\r
+#define _SysTick\r
+\r
+/************************************* TIM ************************************/\r
+//#define _TIM\r
+#define _TIM2\r
+#define _TIM3\r
+//#define _TIM4\r
+\r
+/************************************* USART **********************************/\r
+#define _USART\r
+#define _USART1\r
+//#define _USART2\r
+//#define _USART3\r
+\r
+/************************************* WWDG ***********************************/\r
+//#define _WWDG\r
+\r
+/* In the following line adjust the value of External High Speed oscillator (HSE)\r
+   used in your application */\r
+#define HSE_Value    ((u32)8000000)   /* Value of the External oscillator in Hz*/\r
+\r
+/* Exported macro ------------------------------------------------------------*/\r
+#undef assert\r
+#ifdef  DEBUG\r
+/*******************************************************************************\r
+* Macro Name     : assert\r
+* Description    : The assert macro is used for function's parameters check.\r
+*                  It is used only if the library is compiled in DEBUG mode.\r
+* Input          : - expr: If expr is false, it calls assert_failed function\r
+*                    which reports the name of the source file and the source\r
+*                    line number of the call that failed.\r
+*                    If expr is true, it returns no value.\r
+* Return         : None\r
+*******************************************************************************/\r
+  #define assert(expr) ((expr) ? (void)0 : assert_failed(__FILE__, __LINE__))\r
+/* Exported functions ------------------------------------------------------- */\r
+  void assert_failed(u8* file, u32 line);\r
+#else\r
+  #define assert(expr) ((void)0)\r
+#endif /* DEBUG */\r
+\r
+/* Exported functions ------------------------------------------------------- */\r
+\r
+#endif /* __STM32F10x_CONF_H */\r
+\r
+/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/\r

diff --git a/Demo/CORTEX_STM32F103_Keil/timertest.c b/Demo/CORTEX_STM32F103_Keil/timertest.c
new file mode 100644 (file)
index 0000000..fcc8fef
--- /dev/null
+++ b/Demo/CORTEX_STM32F103_Keil/timertest.c
@@ -0,0 +1,183 @@
+/*\r
+       FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+       This file is part of the FreeRTOS.org distribution.\r
+\r
+       FreeRTOS.org is free software; you can redistribute it and/or modify\r
+       it under the terms of the GNU General Public License as published by\r
+       the Free Software Foundation; either version 2 of the License, or\r
+       (at your option) any later version.\r
+\r
+       FreeRTOS.org is distributed in the hope that it will be useful,\r
+       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
+       GNU General Public License for more details.\r
+\r
+       You should have received a copy of the GNU General Public License\r
+       along with FreeRTOS.org; if not, write to the Free Software\r
+       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+\r
+       A special exception to the GPL can be applied should you wish to distribute\r
+       a combined work that includes FreeRTOS.org, without being obliged to provide\r
+       the source code for any proprietary components.  See the licensing section\r
+       of http://www.FreeRTOS.org for full details of how and when the exception\r
+       can be applied.\r
+\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
+    * and even write all or part of your application on your behalf.          *\r
+    * See http://www.OpenRTOS.com for details of the services we provide to   *\r
+    * expedite your project.                                                  *\r
+    *                                                                         *\r
+    ***************************************************************************\r
+    ***************************************************************************\r
+\r
+       Please ensure to read the configuration and relevant port sections of the\r
+       online documentation.\r
+\r
+       http://www.FreeRTOS.org - Documentation, latest information, license and \r
+       contact details.\r
+\r
+       http://www.SafeRTOS.com - A version that is certified for use in safety \r
+       critical systems.\r
+\r
+       http://www.OpenRTOS.com - Commercial support, development, porting, \r
+       licensing and training services.\r
+*/\r
+\r
+/* High speed timer test as described in main.c. */\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Library includes. */\r
+#include "stm32f10x_lib.h"\r
+#include "stm32f10x_tim.h"\r
+#include "stm32f10x_map.h"\r
+\r
+/* The set frequency of the interrupt.  Deviations from this are measured as\r
+the jitter. */\r
+#define timerINTERRUPT_FREQUENCY               ( ( unsigned portSHORT ) 20000 )\r
+\r
+/* The expected time between each of the timer interrupts - if the jitter was\r
+zero. */\r
+#define timerEXPECTED_DIFFERENCE_VALUE ( configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY )\r
+\r
+/* The highest available interrupt priority. */\r
+#define timerHIGHEST_PRIORITY                  ( 0 )\r
+\r
+/* Misc defines. */\r
+#define timerMAX_32BIT_VALUE                   ( 0xffffffffUL )\r
+#define timerTIMER_1_COUNT_VALUE               ( * ( ( unsigned long * ) ( TIMER1_BASE + 0x48 ) ) )\r
+\r
+/* The number of interrupts to pass before we start looking at the jitter. */\r
+#define timerSETTLE_TIME                       5\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Configures the two timers used to perform the test.\r
+ */\r
+void vSetupTimerTest( void );\r
+\r
+/* Interrupt handler in which the jitter is measured. */\r
+void vTimer2IntHandler( void );\r
+\r
+/* Stores the value of the maximum recorded jitter between interrupts. */\r
+volatile unsigned portSHORT usMaxJitter = 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSetupTimerTest( void )\r
+{\r
+unsigned long ulFrequency;\r
+TIM_TimeBaseInitTypeDef  TIM_TimeBaseStructure;\r
+NVIC_InitTypeDef NVIC_InitStructure;\r
+\r
+\r
+       /* Enable timer clocks */\r
+       RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM2, ENABLE );\r
+       RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM3, ENABLE );\r
+\r
+       /* Initialise data. */\r
+       TIM_DeInit( TIM2 );\r
+       TIM_DeInit( TIM3 );\r
+       TIM_TimeBaseStructInit( &TIM_TimeBaseStructure );\r
+\r
+       /* Time base configuration for timer 2 - which generates the interrupts. */\r
+       ulFrequency = configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY;    \r
+       TIM_TimeBaseStructure.TIM_Period = ( unsigned portSHORT ) ( ulFrequency & 0xffffUL );\r
+       TIM_TimeBaseStructure.TIM_Prescaler = 0x0;\r
+       TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;\r
+       TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
+       TIM_TimeBaseInit( TIM2, &TIM_TimeBaseStructure );\r
+       TIM_ARRPreloadConfig( TIM2, ENABLE );\r
+\r
+       \r
+       /* Configuration for timer 3 which is used as a high resolution time\r
+       measurement. */\r
+       TIM_TimeBaseStructure.TIM_Period = ( unsigned portSHORT ) 0xffff;\r
+       TIM_TimeBaseInit( TIM3, &TIM_TimeBaseStructure );\r
+       TIM_ARRPreloadConfig( TIM3, ENABLE );\r
+       \r
+       /* Enable TIM2 IT.  TIM3 does not generate an interrupt. */\r
+       NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQChannel;\r
+       NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;\r
+       NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = timerHIGHEST_PRIORITY;\r
+       NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;\r
+       NVIC_Init( &NVIC_InitStructure );       \r
+       TIM_ITConfig( TIM2, TIM_IT_Update, ENABLE );\r
+\r
+       /* Finally, enable both timers. */\r
+       TIM_Cmd( TIM2, ENABLE );\r
+       TIM_Cmd( TIM3, ENABLE );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vTimer2IntHandler( void )\r
+{\r
+static unsigned portSHORT usLastCount = 0, usSettleCount = 0, usMaxDifference = 0;\r
+unsigned portSHORT usThisCount, usDifference;\r
+\r
+       /* Capture the free running timer 3 value as we enter the interrupt. */\r
+       usThisCount = TIM3->CNT;\r
+       \r
+       if( usSettleCount >= timerSETTLE_TIME )\r
+       {\r
+               /* What is the difference between the timer value in this interrupt\r
+               and the value from the last interrupt. */\r
+               usDifference = usThisCount - usLastCount;\r
+\r
+               /* Store the difference in the timer values if it is larger than the\r
+               currently stored largest value.  The difference over and above the\r
+               expected difference will give the 'jitter' in the processing of these\r
+               interrupts. */\r
+               if( usDifference > usMaxDifference )\r
+               {\r
+                       usMaxDifference = usDifference;\r
+                       usMaxJitter = usMaxDifference - timerEXPECTED_DIFFERENCE_VALUE;\r
+               }\r
+       }\r
+       else\r
+       {\r
+               /* Don't bother storing any values for the first couple of\r
+               interrupts. */\r
+               usSettleCount++;\r
+       }\r
+\r
+       /* Remember what the timer value was this time through, so we can calculate\r
+       the difference the next time through. */\r
+       usLastCount = usThisCount;\r
+\r
+    TIM_ClearITPendingBit( TIM2, TIM_IT_Update );\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r