Update the PIC32 port to use xTaskIncrementTick() and change the macro used to detect...

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1921 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port.c b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port.c
index 1ea1cc6cb672b83890665a8a834436308970d29d..f43dac74eea8e08a4d0aac4e7a57d003979f3f9e 100644 (file)
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port.c
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port.c
@@ -56,19 +56,19 @@
     ***************************************************************************\r
 \r
 \r
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
     license and Real Time Engineers Ltd. contact details.\r
 \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
     fully thread aware and reentrant UDP/IP stack.\r
 \r
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
-    Integrity Systems, who sell the code with commercial support, \r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems, who sell the code with commercial support,\r
     indemnification and middleware, under the OpenRTOS brand.\r
-    \r
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
-    engineered and independently SIL3 certified version for use in safety and \r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
     mission critical applications that require provable dependability.\r
 */\r
 \r
@@ -76,7 +76,7 @@
  * Implementation of functions defined in portable.h for the PIC32MX port.\r
   *----------------------------------------------------------*/\r
 \r
-#ifndef __XC__\r
+#ifndef __XC\r
     #error This port is designed to work with XC32.  Please update your C compiler version.\r
 #endif\r
 \r
@@ -245,15 +245,15 @@ void vPortIncrementTick( void )
 unsigned portBASE_TYPE uxSavedStatus;\r
 \r
        uxSavedStatus = uxPortSetInterruptMaskFromISR();\r
-       vTaskIncrementTick();\r
+       {\r
+               if( xTaskIncrementTick() != pdFALSE )\r
+               {\r
+                       /* Pend a context switch. */\r
+                       _CP0_BIS_CAUSE( portCORE_SW_0 );\r
+               }\r
+       }\r
        vPortClearInterruptMaskFromISR( uxSavedStatus );\r
 \r
-       /* If we are using the preemptive scheduler then we might want to select\r
-       a different task to execute. */\r
-       #if configUSE_PREEMPTION == 1\r
-               _CP0_BIS_CAUSE( portCORE_SW_0 );\r
-       #endif /* configUSE_PREEMPTION */\r
-\r
        /* Clear timer 1 interrupt. */\r
        IFS0CLR = _IFS0_T1IF_MASK;\r
 }\r

diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S
index d48b3c58d7711e9b010a29b63e5cc8d3ae94907f..eaf95aba60909e665d6b58c4b13e1ccacb18b3e7 100644 (file)
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S
@@ -131,9 +131,9 @@ vPortStartFirstTask:
 \r
 vPortYieldISR:\r
 \r
-       /* Make room for the context. First save the current status so we can\r
-       manipulate it, and the cause and EPC registers so we capture their\r
-       original values in case of interrupt nesting. */\r
+       /* Make room for the context. First save the current status so it can be\r
+       manipulated, and the cause and EPC registers so thier original values are\r
+       captured. */\r
        mfc0            k0, _CP0_CAUSE\r
        addiu           sp,     sp, -portCONTEXT_SIZE\r
        mfc0            k1, _CP0_STATUS\r
@@ -145,7 +145,7 @@ vPortYieldISR:
        sw                      s5, 40(sp)\r
        sw                      k1, portSTATUS_STACK_LOCATION(sp)\r
 \r
-       /* Enable interrupts above the current priority. */\r
+       /* Interrupts above the kernel priority are going to be re-enabled. */\r
        srl                     k0, k0, 0xa\r
        ins             k1, k0, 10, 6\r
        ins                     k1, zero, 1, 4\r