static int arm7tdmi_examine_debug_reason(target_t *target)
{
int retval = ERROR_OK;
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
/* only check the debug reason if we don't know it already */
if ((target->debug_reason != DBG_REASON_DBGRQ)
static void arm7tdmi_change_to_arm(target_t *target,
uint32_t *r0, uint32_t *pc)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* save r0 before using it and put system in ARM state
uint32_t mask, uint32_t* core_regs[16])
{
int i;
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* STMIA r0-15, [r0] at debug speed
uint32_t mask, void* buffer, int size)
{
int i;
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
uint32_t *buf_u32 = buffer;
static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* MRS r0, cpsr */
static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
static void arm7tdmi_write_xpsr_im8(target_t *target,
uint8_t xpsr_im, int rot, int spsr)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
uint32_t mask, uint32_t core_regs[16])
{
int i;
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* LDMIA r0-15, [r0] at debug speed
static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* put system-speed load-multiple into the pipeline */
static void arm7tdmi_load_hword_reg(target_t *target, int num)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* put system-speed load half-word into the pipeline */
static void arm7tdmi_load_byte_reg(target_t *target, int num)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* put system-speed load byte into the pipeline */
static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* put system-speed store-multiple into the pipeline */
static void arm7tdmi_store_hword_reg(target_t *target, int num)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* put system-speed store half-word into the pipeline */
static void arm7tdmi_store_byte_reg(target_t *target, int num)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* put system-speed store byte into the pipeline */
static void arm7tdmi_write_pc(target_t *target, uint32_t pc)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* LDMIA r0-15, [r0] at debug speed
static void arm7tdmi_branch_resume(target_t *target)
{
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1);
static void arm7tdmi_branch_resume_thumb(target_t *target)
{
- LOG_DEBUG("-");
-
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
+ struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
+ LOG_DEBUG("-");
+
/* LDMIA r0, [r0] at debug speed
* register values will start to appear on 4th DCLK
*/
static void arm7tdmi_build_reg_cache(target_t *target)
{
reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
- /* get pointers to arch-specific information */
- armv4_5_common_t *armv4_5 = target->arch_info;
+ struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
(*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
armv4_5->core_cache = (*cache_p);
int arm7tdmi_examine(struct target_s *target)
{
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
int retval;
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+
+
if (!target_was_examined(target))
{
/* get pointers to arch-specific information */
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap)
{
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
-
- arm7_9 = &arm7tdmi->arm7_9_common;
- armv4_5 = &arm7_9->armv4_5_common;
+ struct arm7_9_common_s *arm7_9 = &arm7tdmi->arm7_9_common;
/* prepare JTAG information for the new target */
arm7_9->jtag_info.tap = tap;
arm7_9->thumb_bkpt = 0xdeee;
arm7_9->dbgreq_adjust_pc = 2;
- arm7_9->arch_info = arm7tdmi;
-
- arm7tdmi->arch_info = NULL;
- arm7tdmi->common_magic = ARM7TDMI_COMMON_MAGIC;
arm7_9_init_arch_info(target, arm7_9);