/* Library includes. */\r
#include "string.h"\r
\r
-/* Hardware specifics. */\r
-#include "iodefine.h"\r
-\r
/*-----------------------------------------------------------*/\r
\r
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore\r
priority - ie a known priority. Therefore these local macros are a slight\r
optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,\r
which would require the old IPL to be read first and stored in a local variable. */\r
-#define portDISABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )\r
-#define portENABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )\r
+#define portMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )\r
+#define portUNMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )\r
\r
/*-----------------------------------------------------------*/\r
\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_FPSW;\r
pxTopOfStack--;\r
- *pxTopOfStack = 0x12345678; /* Accumulator. */\r
+ *pxTopOfStack = 0x11111111; /* Accumulator 0. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x22222222; /* Accumulator 0. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x33333333; /* Accumulator 0. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x44444444; /* Accumulator 1. */\r
pxTopOfStack--;\r
- *pxTopOfStack = 0x87654321; /* Accumulator. */\r
+ *pxTopOfStack = 0x55555555; /* Accumulator 1. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x66666666; /* Accumulator 1. */\r
\r
return pxTopOfStack;\r
}\r
"POP R15 \n" \\r
\r
/* Accumulator low 32 bits. */\r
- "MVTACLO R15 \n" \\r
+ "MVTACLO R15, A0 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator high 32 bits. */\r
+ "MVTACHI R15, A0 \n" \\r
"POP R15 \n" \\r
\r
- /* Accumulator high 32 bits. */\r
- "MVTACHI R15 \n" \\r
+ /* Accumulator guard. */\r
+ "MVTACGU R15, A0 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator low 32 bits. */\r
+ "MVTACLO R15, A1 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator high 32 bits. */\r
+ "MVTACHI R15, A1 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator guard. */\r
+ "MVTACGU R15, A1 \n" \\r
"POP R15 \n" \\r
\r
/* Floating point status word. */\r
/* Save the FPSW and accumulator. */\r
"MVFC FPSW, R15 \n" \\r
"PUSH.L R15 \n" \\r
- "MVFACHI R15 \n" \\r
+ "MVFACGU #0, A1, R15 \n" \\r
"PUSH.L R15 \n" \\r
-\r
- /* Middle word. */\r
- "MVFACMI R15 \n" \\r
-\r
- /* Shifted left as it is restored to the low order word. */\r
- "SHLL #16, R15 \n" \\r
+ "MVFACHI #0, A1, R15 \n" \\r
+ "PUSH.L R15 \n" \\r
+ /* Low order word. */\r
+ "MVFACLO #0, A1, R15 \n" \\r
+ "PUSH.L R15 \n" \\r
+ "MVFACGU #0, A0, R15 \n" \\r
+ "PUSH.L R15 \n" \\r
+ "MVFACHI #0, A0, R15 \n" \\r
+ "PUSH.L R15 \n" \\r
+ /* Low order word. */\r
+ "MVFACLO #0, A0, R15 \n" \\r
"PUSH.L R15 \n" \\r
\r
/* Save the stack pointer to the TCB. */\r
\r
/* Restore the context of the new task. The PSW (Program Status Word) and\r
PC will be popped by the RTE instruction. */\r
- "POP R15 \n" \\r
- "MVTACLO R15 \n" \\r
- "POP R15 \n" \\r
- "MVTACHI R15 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator low 32 bits. */\r
+ "MVTACLO R15, A0 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator high 32 bits. */\r
+ "MVTACHI R15, A0 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator guard. */\r
+ "MVTACGU R15, A0 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator low 32 bits. */\r
+ "MVTACLO R15, A1 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator high 32 bits. */\r
+ "MVTACHI R15, A1 \n" \\r
+ "POP R15 \n" \\r
+\r
+ /* Accumulator guard. */\r
+ "MVTACGU R15, A1 \n" \\r
"POP R15 \n" \\r
"MVTC R15, FPSW \n" \\r
"POPM R1-R15 \n" \\r
\r
/* Increment the tick, and perform any processing the new tick value\r
necessitates. Ensure IPL is at the max syscall value first. */\r
- portDISABLE_INTERRUPTS_FROM_KERNEL_ISR();\r
+ portMASK_INTERRUPTS_FROM_KERNEL_ISR();\r
{\r
if( xTaskIncrementTick() != pdFALSE )\r
{\r
taskYIELD();\r
}\r
}\r
- portENABLE_INTERRUPTS_FROM_KERNEL_ISR();\r
+ portUNMASK_INTERRUPTS_FROM_KERNEL_ISR();\r
}\r
/*-----------------------------------------------------------*/\r
\r