Add c16 files as well.

diff --git a/libsrc/c16/fast.s b/libsrc/c16/fast.s
new file mode 100644 (file)
index 0000000..e488139
--- /dev/null
+++ b/libsrc/c16/fast.s
@@ -0,0 +1,22 @@
+;
+; Marco van den Heuvel, 2018-03-20
+;
+; void fast (void);
+; /* Switch the CPU into double clock mode. */
+;
+
+        .export         _fast
+
+        .include        "plus4.inc"
+
+
+.proc   _fast
+
+        lda     TED_CLK
+        and     #%11111101
+        sta     TED_CLK
+        rts
+
+.endproc
+
+

diff --git a/libsrc/c16/isfast.s b/libsrc/c16/isfast.s
new file mode 100644 (file)
index 0000000..ff104d9
--- /dev/null
+++ b/libsrc/c16/isfast.s
@@ -0,0 +1,22 @@
+;
+; Marco van den Heuvel, 2018-03-20
+;
+; unsigned char isfast (void);
+; /* Returns 1 if the CPU is in double clock mode. */
+;
+
+        .export         _isfast
+
+        .include        "plus4.inc"
+
+
+.proc   _isfast
+
+        lda     TED_CLK
+        lsr
+        and     #$01
+        ldx     #$00
+        rts
+
+.endproc
+

diff --git a/libsrc/c16/slow.s b/libsrc/c16/slow.s
new file mode 100644 (file)
index 0000000..18b8c23
--- /dev/null
+++ b/libsrc/c16/slow.s
@@ -0,0 +1,22 @@
+;
+; Marco van den Heuvel, 2018-03-28
+;
+; void slow (void);
+; /* Switch the CPU into single clock mode. */
+;
+
+        .export         _slow
+
+        .include        "plus4.inc"
+
+
+.proc   _slow
+
+        lda     TED_CLK
+        ora     #%00000010
+        sta     TED_CLK
+        rts
+
+.endproc
+
+