From: rtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Date: Sun, 3 Aug 2014 19:15:30 +0000 (+0000)
Subject: Cortex-A5 IAR port:
X-Git-Tag: V8.1.0~7
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;ds=sidebyside;h=0f2b99697a4f57010d5d8bb7c04aaebe27d79570;p=freertos

Cortex-A5 IAR port:
- Removed SAMA5 specifics from the port layer, and instead call a generic ISR callback as per Cortex-A9 ports.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2285 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
index 1bfca7fc2..b2a4f708c 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
@@ -58,6 +58,7 @@
 	EXTERN	vTaskSwitchContext
 	EXTERN	ulPortYieldRequired
 	EXTERN	ulPortInterruptNesting
+	EXTERN	vApplicationIRQHandler
 
 	PUBLIC	FreeRTOS_SWI_Handler
 	PUBLIC  FreeRTOS_IRQ_Handler
@@ -126,15 +127,13 @@ FreeRTOS_IRQ_Handler
 	AND		r2, r2, #4
 	SUB		sp, sp, r2
 
-	; Obtain the address of the interrupt handler, then call it.
+	; Obtain the address of the interrupt handler, then pass it into the ISR
+	; callback.
 	PUSH	{r0-r3, lr}
 	LDR		r1, =configINTERRUPT_VECTOR_ADDRESS
 	LDR		r0, [r1]
-	STR		r1, [r1] ; [SAMA5] Write to IVR in case protect mode is being used.
-	DSB
-	ISB
-	CPSIE	i
-	BLX		r0
+	LDR		r1, =vApplicationIRQHandler
+	BLX		r1
 	POP		{r0-r3, lr}
 	ADD		sp, sp, r2