From: Attila Kinali Date: Tue, 28 Feb 2012 08:44:25 +0000 (+0100) Subject: SAM3S: correct flash sector sizes. X-Git-Tag: v0.6.0-rc1~205 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=00937cd049706ee4c13514c9898ac14f9c232e79;p=openocd SAM3S: correct flash sector sizes. Lock region count and sector sizes did not match datasheet. (see 6500C-ATARM-8FE11 "SAM3S Series Datasheet", Table 7-1) Change-Id: Ic511802f96ed03856467a24a6736349205a0576a Signed-off-by: Attila Kinali Reviewed-on: http://openocd.zylin.com/493 Tested-by: jenkins Reviewed-by: Spencer Oliver --- diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index 0fb8657f..dbfda3de 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -576,8 +576,8 @@ static const struct sam3_chip_details all_sam3_details[] = { .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, .size_bytes = 256 * 1024, - .nsectors = 32, - .sector_size = 8192, + .nsectors = 16, + .sector_size = 16384, .page_size = 256, }, /* .bank[1] = { */ @@ -609,8 +609,8 @@ static const struct sam3_chip_details all_sam3_details[] = { .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, .size_bytes = 256 * 1024, - .nsectors = 32, - .sector_size = 8192, + .nsectors = 16, + .sector_size = 16384, .page_size = 256, }, /* .bank[1] = { */ @@ -641,8 +641,8 @@ static const struct sam3_chip_details all_sam3_details[] = { .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, .size_bytes = 256 * 1024, - .nsectors = 32, - .sector_size = 8192, + .nsectors = 16, + .sector_size = 16384, .page_size = 256, }, /* .bank[1] = { */ @@ -673,8 +673,8 @@ static const struct sam3_chip_details all_sam3_details[] = { .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, .size_bytes = 128 * 1024, - .nsectors = 16, - .sector_size = 8192, + .nsectors = 8, + .sector_size = 16384, .page_size = 256, }, /* .bank[1] = { */ @@ -705,8 +705,8 @@ static const struct sam3_chip_details all_sam3_details[] = { .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, .size_bytes = 128 * 1024, - .nsectors = 16, - .sector_size = 8192, + .nsectors = 8, + .sector_size = 16384, .page_size = 256, }, /* .bank[1] = { */ @@ -737,8 +737,8 @@ static const struct sam3_chip_details all_sam3_details[] = { .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, .size_bytes = 128 * 1024, - .nsectors = 16, - .sector_size = 8192, + .nsectors = 8, + .sector_size = 16384, .page_size = 256, }, /* .bank[1] = { */ @@ -769,8 +769,8 @@ static const struct sam3_chip_details all_sam3_details[] = { .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, .size_bytes = 64 * 1024, - .nsectors = 8, - .sector_size = 8192, + .nsectors = 4, + .sector_size = 16384, .page_size = 256, }, /* .bank[1] = { */ @@ -801,8 +801,8 @@ static const struct sam3_chip_details all_sam3_details[] = { .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, .size_bytes = 64 * 1024, - .nsectors = 8, - .sector_size = 8192, + .nsectors = 4, + .sector_size = 16384, .page_size = 256, }, /* .bank[1] = { */ @@ -833,8 +833,8 @@ static const struct sam3_chip_details all_sam3_details[] = { .flash_wait_states = 6, /* workaround silicon bug */ .present = 1, .size_bytes = 64 * 1024, - .nsectors = 8, - .sector_size = 8192, + .nsectors = 4, + .sector_size = 16384, .page_size = 256, }, /* .bank[1] = { */