From: Ken Ma Date: Mon, 26 Mar 2018 07:56:02 +0000 (+0800) Subject: arm64: a37xx: pinctrl: Fix gpio pin offset in register X-Git-Tag: v2018.05-rc1~2^2~10 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=0237448a715468f910d2b30c548c171380f901c1;p=u-boot arm64: a37xx: pinctrl: Fix gpio pin offset in register For armada_37xx_update_reg(), the parameter offset should be pointer so that it can be updated, otherwise offset will keep old value, and then when offset is larger than or equal to 32 the mask calculated by "BIT(offset)" will be 0 in gpio chip hook functions, it's an error, this patch set offset parameter of armada_37xx_update_reg() as pointer. Reviewed-on: http://vgitil04.il.marvell.com:8080/43287 Reviewed-by: Hua Jing Tested-by: iSoC Platform CI Cc: Simon Glass Cc: Stefan Roese Signed-off-by: Ken Ma Signed-off-by: Stefan Roese --- diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index d32467ba57..b442dedaf8 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -207,11 +207,11 @@ const struct armada_37xx_pin_data armada_37xx_pin_sb = { }; static inline void armada_37xx_update_reg(unsigned int *reg, - unsigned int offset) + unsigned int *offset) { /* We never have more than 2 registers */ - if (offset >= GPIO_PER_REG) { - offset -= GPIO_PER_REG; + if (*offset >= GPIO_PER_REG) { + *offset -= GPIO_PER_REG; *reg += sizeof(u32); } } @@ -432,7 +432,7 @@ static int armada_37xx_gpio_get(struct udevice *dev, unsigned int offset) unsigned int reg = INPUT_VAL; unsigned int val, mask; - armada_37xx_update_reg(®, offset); + armada_37xx_update_reg(®, &offset); mask = BIT(offset); val = readl(info->base + reg); @@ -447,7 +447,7 @@ static int armada_37xx_gpio_set(struct udevice *dev, unsigned int offset, unsigned int reg = OUTPUT_VAL; unsigned int mask, val; - armada_37xx_update_reg(®, offset); + armada_37xx_update_reg(®, &offset); mask = BIT(offset); val = value ? mask : 0; @@ -463,7 +463,7 @@ static int armada_37xx_gpio_get_direction(struct udevice *dev, unsigned int reg = OUTPUT_EN; unsigned int val, mask; - armada_37xx_update_reg(®, offset); + armada_37xx_update_reg(®, &offset); mask = BIT(offset); val = readl(info->base + reg); @@ -480,7 +480,7 @@ static int armada_37xx_gpio_direction_input(struct udevice *dev, unsigned int reg = OUTPUT_EN; unsigned int mask; - armada_37xx_update_reg(®, offset); + armada_37xx_update_reg(®, &offset); mask = BIT(offset); clrbits_le32(info->base + reg, mask); @@ -495,7 +495,7 @@ static int armada_37xx_gpio_direction_output(struct udevice *dev, unsigned int reg = OUTPUT_EN; unsigned int mask; - armada_37xx_update_reg(®, offset); + armada_37xx_update_reg(®, &offset); mask = BIT(offset); setbits_le32(info->base + reg, mask);