From: Jörg Wunsch <openocd@uriah.heep.sax.de>
Date: Thu, 8 Jan 2015 14:36:25 +0000 (+0100)
Subject: flash: add AT91SAM4SD16C device
X-Git-Tag: v0.9.0-rc1~191
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=03b190522330093db55e2268392ae9f291f6aa0e;p=openocd

flash: add AT91SAM4SD16C device

Change-Id: I12f740a1a2d10637b0e5b1e8d054dd912576d190
Signed-off-by: Jörg Wunsch <openocd@uriah.heep.sax.de>
Reviewed-on: http://openocd.zylin.com/2455
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
---

diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 6e53b4e9..3371fcfc 100644
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -574,6 +574,50 @@ static const struct sam4_chip_details all_sam4_details[] = {
 		},
 	},
 
+	/*at91sam4sd16c*/
+	{
+		.chipid_cidr    = 0x29a70ce0,
+		.name           = "at91sam4sd16c",
+		.total_flash_size     = 1024 * 1024,
+		.total_sram_size      = 160 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 2,
+
+/*		.bank[0] = { */
+		{
+			{
+				.probed = 0,
+				.pChip  = NULL,
+				.pBank  = NULL,
+				.bank_number = 0,
+				.base_address = FLASH_BANK0_BASE_SD,
+				.controller_address = 0x400e0a00,
+				.flash_wait_states = 6,	/* workaround silicon bug */
+				.present = 1,
+				.size_bytes =  512 * 1024,
+				.nsectors   =  64,
+				.sector_size = 8192,
+				.page_size   = 512,
+			},
+
+/*		.bank[1] = { */
+			{
+				.probed = 0,
+				.pChip  = NULL,
+				.pBank  = NULL,
+				.bank_number = 1,
+				.base_address = FLASH_BANK1_BASE_1024K_SD,
+				.controller_address = 0x400e0c00,
+				.flash_wait_states = 6,	/* workaround silicon bug */
+				.present = 1,
+				.size_bytes =  512 * 1024,
+				.nsectors   =  64,
+				.sector_size = 8192,
+				.page_size   = 512,
+			},
+		},
+	},
+
 	/* at91samg53n19 */
 	{
 		.chipid_cidr    = 0x247e0ae0,