From: Matthias Fuchs Date: Fri, 20 Feb 2009 09:19:18 +0000 (+0100) Subject: ppc4xx: Use correct io accessors for esd 405 boards X-Git-Tag: v2009.06-rc1~148^2~10 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=049216f045fd8e0f45bcef121c2bb1c7d3de6988;p=u-boot ppc4xx: Use correct io accessors for esd 405 boards This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32 macros. Also volatile pointer references are replaced by the new accessors. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c index ac9bbb3f45..5a021552dd 100644 --- a/board/esd/apc405/apc405.c +++ b/board/esd/apc405/apc405.c @@ -93,7 +93,7 @@ int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0])); int board_revision(void) { unsigned long cntrl0Reg; - volatile unsigned long value; + unsigned long value; /* * Get version of APC405 board from GPIO's diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c index c4b4b67670..14520e11a6 100644 --- a/board/esd/ar405/ar405.c +++ b/board/esd/ar405/ar405.c @@ -24,6 +24,7 @@ #include #include "ar405.h" #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -137,18 +138,14 @@ int board_early_init_f (void) mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ - *(ushort *) 0xf03000ec = 0x0fff; /* enable all interrupts in fpga */ + out_be16((void *)0xf03000ec, 0x0fff); /* enable interrupts in fpga */ return 0; } - -/* ------------------------------------------------------------------------- */ - /* * Check Board Identity: */ - int checkboard (void) { int index; @@ -192,14 +189,15 @@ int checkboard (void) #if 1 /* test-only: some internal test routines... */ +#define DIGEN ((void *)0xf03000b4) /* u8 */ +#define DIGOUT ((void *)0xf03000b0) /* u16 */ +#define DIGIN ((void *)0xf03000a0) /* u16 */ + /* * Some test routines */ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - volatile uchar *digen = (volatile uchar *)0xf03000b4; - volatile ushort *digout = (volatile ushort *)0xf03000b0; - volatile ushort *digin = (volatile ushort *)0xf03000a0; int i; int k; int start; @@ -216,7 +214,7 @@ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* * Enable digital outputs */ - *digen = 0x08; + out_8(DIGEN, 0x08); printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n", start, end); @@ -226,12 +224,13 @@ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) */ for (;;) { for (i=start; i<=end; i++) { - *digout = 0x0001 << i; + out_be16(DIGOUT, 0x0001 << i); for (k=0; k<200; k++) udelay(1000); - if (*digin != (0x0001 << i)) { - printf("ERROR: OUT=0x%04X, IN=0x%04X\n", 0x0001 << i, *digin); + if (in_be16(DIGIN) != (0x0001 << i)) { + printf("ERROR: OUT=0x%04X, IN=0x%04X\n", + 0x0001 << i, in_be16(DIGIN)); return 0; } @@ -255,13 +254,13 @@ U_BOOT_CMD( #define ERROR_DELTA 256 struct io { - volatile short val; + short val; short dummy; }; int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - volatile short val; + short val; int i; int volt; struct io *out; @@ -274,9 +273,9 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) volt = 0; printf("Setting Channel %d to %dV...\n", i, volt); - out[i].val = (volt * 0x7fff) / 10; + out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10); udelay(10000); - val = in[i*2].val; + val = in_be16((void *)&(in[i*2].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -284,7 +283,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ((volt * 0x7fff) / 40) + ERROR_DELTA); return -1; } - val = in[i*2+1].val; + val = in_be16((void *)&(in[i*2+1].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -295,9 +294,9 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) volt = 5; printf("Setting Channel %d to %dV...\n", i, volt); - out[i].val = (volt * 0x7fff) / 10; + out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10); udelay(10000); - val = in[i*2].val; + val = in_be16((void *)&(in[i*2].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -305,7 +304,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ((volt * 0x7fff) / 40) + ERROR_DELTA); return -1; } - val = in[i*2+1].val; + val = in_be16((void *)&(in[i*2+1].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -316,9 +315,9 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) volt = 10; printf("Setting Channel %d to %dV...\n", i, volt); - out[i].val = (volt * 0x7fff) / 10; + out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10); udelay(10000); - val = in[i*2].val; + val = in_be16((void *)&(in[i*2].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -326,7 +325,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ((volt * 0x7fff) / 40) + ERROR_DELTA); return -1; } - val = in[i*2+1].val; + val = in_be16((void *)&(in[i*2+1].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -350,28 +349,27 @@ int counter = 0; void cyclicInt(void *ptr) { - *(ushort *)0xf03000e8 = 0x0800; /* ack int */ + out_be16((void *)0xf03000e8, 0x0800); /* ack int */ counter++; } int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - volatile uchar *digout = (volatile uchar *)0xf03000b4; - volatile ulong *incin; + ulong *incin; int i; - incin = (volatile ulong *)0xf0300040; + incin = (ulong *)0xf0300040; /* * Clear inc counter */ - incin[0] = 0; - incin[1] = 0; - incin[2] = 0; - incin[3] = 0; + out_be32((void *)&incin[0], 0); + out_be32((void *)&incin[1], 0); + out_be32((void *)&incin[2], 0); + out_be32((void *)&incin[3], 0); - incin = (volatile ulong *)0xf0300050; + incin = (ulong *)0xf0300050; /* * Inc a little @@ -379,28 +377,29 @@ int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) for (i=0; i<10000; i++) { switch (i & 0x03) { case 0: - *digout = 0x02; + out_8(DIGEN, 0x02); break; case 1: - *digout = 0x03; + out_8(DIGEN, 0x03); break; case 2: - *digout = 0x01; + out_8(DIGEN, 0x01); break; case 3: - *digout = 0x00; + out_8(DIGEN, 0x00); break; } udelay(10); } - printf("Inc 0 = %ld\n", incin[0]); - printf("Inc 1 = %ld\n", incin[1]); - printf("Inc 2 = %ld\n", incin[2]); - printf("Inc 3 = %ld\n", incin[3]); + printf("Inc 0 = %d\n", in_be32((void *)&incin[0])); + printf("Inc 1 = %d\n", in_be32((void *)&incin[1])); + printf("Inc 2 = %d\n", in_be32((void *)&incin[2])); + printf("Inc 3 = %d\n", in_be32((void *)&incin[3])); - *(ushort *)0xf03000e0 = 0x0c80-1; /* set counter */ - *(ushort *)0xf03000ec |= 0x0800; /* enable int */ + out_be16((void *)0xf03000e0, 0x0c80-1); /* set counter */ + out_be16((void *)0xf03000ec, + in_be16((void *)0xf03000ec) | 0x0800); /* enable int */ irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL); printf("counter=%d\n", counter); diff --git a/board/esd/ash405/ash405.c b/board/esd/ash405/ash405.c index dd1e2ec2e2..074fe08b1c 100644 --- a/board/esd/ash405/ash405.c +++ b/board/esd/ash405/ash405.c @@ -84,10 +84,6 @@ int board_early_init_f (void) int misc_init_r (void) { - volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); - volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); - volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4); - volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4); unsigned char *dst; ulong len = sizeof(fpgadata); int status; @@ -165,10 +161,10 @@ int misc_init_r (void) /* * Enable interrupts in exar duart mcr[3] */ - *duart0_mcr = 0x08; - *duart1_mcr = 0x08; - *duart2_mcr = 0x08; - *duart3_mcr = 0x08; + out_8((void *)(DUART0_BA + 4), 0x08); + out_8((void *)(DUART1_BA + 4), 0x08); + out_8((void *)(DUART2_BA + 4), 0x08); + out_8((void *)(DUART3_BA + 4), 0x08); return (0); } diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c index 30fa605abb..2fe6b7bf04 100644 --- a/board/esd/canbt/canbt.c +++ b/board/esd/canbt/canbt.c @@ -24,6 +24,7 @@ #include #include "canbt.h" #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -117,9 +118,9 @@ int board_early_init_f (void) /* * Setup port pins for normal operation */ - out32 (GPIO0_ODR, 0x00000000); /* no open drain pins */ - out32 (GPIO0_TCR, 0x07038100); /* setup for output */ - out32 (GPIO0_OR, 0x07030100); /* set output pins to high (default) */ + out_be32 ((void *)GPIO0_ODR, 0x00000000); /* no open drain pins */ + out_be32 ((void *)GPIO0_TCR, 0x07038100); /* setup for output */ + out_be32 ((void *)GPIO0_OR, 0x07030100); /* set output pins to high (default) */ /* * IRQ 0-15 405GP internally generated; active high; level sensitive diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c index d0ee193298..9a522b2c0b 100644 --- a/board/esd/cms700/cms700.c +++ b/board/esd/cms700/cms700.c @@ -95,14 +95,12 @@ int misc_init_r (void) /* * Check Board Identity: */ - +#define LED_REG (CONFIG_SYS_PLD_BASE + 0x1000) int checkboard (void) { char str[64]; int flashcnt; int delay; - volatile unsigned char *led_reg = (unsigned char *)((ulong)CONFIG_SYS_PLD_BASE + 0x1000); - volatile unsigned char *ver_reg = (unsigned char *)((ulong)CONFIG_SYS_PLD_BASE + 0x1001); puts ("Board: "); @@ -112,20 +110,21 @@ int checkboard (void) puts(str); } - printf(" (PLD-Version=%02d)\n", *ver_reg); + printf(" (PLD-Version=%02d)\n", + in_8((void *)(CONFIG_SYS_PLD_BASE + 0x1001))); /* * Flash LEDs */ for (flashcnt = 0; flashcnt < 3; flashcnt++) { - *led_reg = 0x00; /* LEDs off */ + out_8((void *)LED_REG, 0x00); /* LEDs off */ for (delay = 0; delay < 100; delay++) udelay(1000); - *led_reg = 0x0f; /* LEDs on */ + out_8((void *)LED_REG, 0x0f); /* LEDs on */ for (delay = 0; delay < 50; delay++) udelay(1000); } - *led_reg = 0x70; + out_8((void *)LED_REG, 0x70); return 0; } diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c index 517b1740a4..aba240f172 100644 --- a/board/esd/cpci2dp/cpci2dp.c +++ b/board/esd/cpci2dp/cpci2dp.c @@ -23,6 +23,7 @@ #include #include +#include #include #include @@ -36,12 +37,14 @@ int board_early_init_f (void) * Setup GPIO pins */ cntrl0Reg = mfdcr(cntrl0); - mtdcr(cntrl0, cntrl0Reg | ((CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED | CONFIG_SYS_SELF_RST | CONFIG_SYS_INTA_FAKE) << 5)); + mtdcr(cntrl0, cntrl0Reg | + ((CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED | + CONFIG_SYS_SELF_RST | CONFIG_SYS_INTA_FAKE) << 5)); /* set output pins to high */ - out32(GPIO0_OR, CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, CONFIG_SYS_EEPROM_WP); /* setup for output (LED=off) */ - out32(GPIO0_TCR, CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED); + out_be32((void *)GPIO0_TCR, CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED); /* * IRQ 0-15 405GP internally generated; active high; level sensitive @@ -124,17 +127,20 @@ int eeprom_write_enable (unsigned dev_addr, int state) { switch (state) { case 1: /* Enable write access, clear bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP); state = 0; break; case 0: /* Disable write access, set bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_EEPROM_WP); state = 0; break; default: /* Read current status back. */ - state = (0 == (in32(GPIO0_OR) & CONFIG_SYS_EEPROM_WP)); + state = (0 == (in_be32((void *)GPIO0_OR) & + CONFIG_SYS_EEPROM_WP)); break; } } diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index 0aca825c12..ccbe245d76 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -111,10 +111,10 @@ int board_early_init_f(void) * First pull fpga-prg pin low, * to disable fpga logic (on version 2 board) */ - out32(GPIO0_ODR, 0x00000000); /* no open drain pins */ - out32(GPIO0_TCR, CONFIG_SYS_FPGA_PRG); /* setup for output */ - out32(GPIO0_OR, CONFIG_SYS_FPGA_PRG); /* set output pins to high */ - out32(GPIO0_OR, 0); /* pull prg low */ + out_be32((void *)GPIO0_ODR, 0x00000000); /* no open drain pins */ + out_be32((void *)GPIO0_TCR, CONFIG_SYS_FPGA_PRG); /* setup for output */ + out_be32((void *)GPIO0_OR, CONFIG_SYS_FPGA_PRG); /* set output pins to high */ + out_be32((void *)GPIO0_OR, 0); /* pull prg low */ /* * Boot onboard FPGA diff --git a/board/esd/cpciiser4/cpciiser4.c b/board/esd/cpciiser4/cpciiser4.c index b5d25433f5..6e97392c4b 100644 --- a/board/esd/cpciiser4/cpciiser4.c +++ b/board/esd/cpciiser4/cpciiser4.c @@ -58,7 +58,6 @@ const unsigned char fpgadata[] = { int board_early_init_f (void) { int index, len, i; - volatile unsigned char dummy; int status; #ifdef FPGA_DEBUG @@ -116,7 +115,7 @@ int board_early_init_f (void) /* * Init FPGA via RESET (read access on CS3) */ - dummy = *(unsigned char *) 0xf0200000; + in_8((void *)0xf0200000); /* * IRQ 0-15 405GP internally generated; active high; level sensitive diff --git a/board/esd/dasa_sim/cmd_dasa_sim.c b/board/esd/dasa_sim/cmd_dasa_sim.c index f405be9485..0310c47cf1 100644 --- a/board/esd/dasa_sim/cmd_dasa_sim.c +++ b/board/esd/dasa_sim/cmd_dasa_sim.c @@ -25,6 +25,7 @@ #include #include #include +#include #define OK 0 #define ERROR (-1) @@ -136,8 +137,8 @@ static void updatePci9054 (void) /* * Set EEPROM write-protect register to 0 */ - out32 (pci9054_iobase + 0x0c, - in32 (pci9054_iobase + 0x0c) & 0xffff00ff); + out_be32 ((void *)(pci9054_iobase + 0x0c), + in_be32 ((void *)(pci9054_iobase + 0x0c)) & 0xffff00ff); /* Long Serial EEPROM Load Registers... */ val = PciEepromWriteLongVPD (0x00, 0x905410b5); @@ -190,8 +191,8 @@ static void clearPci9054 (void) /* * Set EEPROM write-protect register to 0 */ - out32 (pci9054_iobase + 0x0c, - in32 (pci9054_iobase + 0x0c) & 0xffff00ff); + out_be32 ((void *)(pci9054_iobase + 0x0c), + in_be32 ((void *)(pci9054_iobase + 0x0c)) & 0xffff00ff); /* Long Serial EEPROM Load Registers... */ val = PciEepromWriteLongVPD (0x00, 0xffffffff); diff --git a/board/esd/dasa_sim/dasa_sim.c b/board/esd/dasa_sim/dasa_sim.c index 47d6bb3cc7..127374bff4 100644 --- a/board/esd/dasa_sim/dasa_sim.c +++ b/board/esd/dasa_sim/dasa_sim.c @@ -74,7 +74,8 @@ static int fpgaBoot (void) #ifdef FPGA_DEBUG printf ("%s\n", - ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE"); + ((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ? + "NOT DONE" : "DONE"); #endif /* init fpga by asserting and deasserting PROGRAM* (USER2)... */ @@ -86,7 +87,8 @@ static int fpgaBoot (void) #ifdef FPGA_DEBUG printf ("%s\n", - ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE"); + ((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ? + "NOT DONE" : "DONE"); #endif /* cs1: disable burst, disable ready */ @@ -109,7 +111,8 @@ static int fpgaBoot (void) #ifdef FPGA_DEBUG printf ("%s\n", - ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE"); + ((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ? + "NOT DONE" : "DONE"); #endif /* set cs1 to 32 bit data-width, disable burst, enable ready */ @@ -125,7 +128,8 @@ static int fpgaBoot (void) #ifdef FPGA_DEBUG printf ("%s\n", - ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE"); + ((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ? + "NOT DONE" : "DONE"); #endif /* wait for 30 ms... */ diff --git a/board/esd/dasa_sim/eeprom.c b/board/esd/dasa_sim/eeprom.c index 1b4c7b34f7..aa6f52c71c 100644 --- a/board/esd/dasa_sim/eeprom.c +++ b/board/esd/dasa_sim/eeprom.c @@ -24,7 +24,7 @@ #include #include - +#include #define EEPROM_CAP 0x50000358 #define EEPROM_DATA 0x5000035c @@ -33,23 +33,23 @@ unsigned int eepromReadLong(int offs) { unsigned int value; - volatile unsigned short ret; + unsigned short ret; int count; - *(unsigned short *)EEPROM_CAP = offs; + out_be16((void *)EEPROM_CAP, offs); count = 0; for (;;) { count++; - ret = *(unsigned short *)EEPROM_CAP; + ret = in_be16((void *)EEPROM_CAP); if ((ret & 0x8000) != 0) break; } - value = *(unsigned long *)EEPROM_DATA; + value = in_be32((void *)EEPROM_DATA); return value; } @@ -69,18 +69,18 @@ unsigned char eepromReadByte(int offs) void eepromWriteLong(int offs, unsigned int value) { - volatile unsigned short ret; + unsigned short ret; int count; count = 0; - *(unsigned long *)EEPROM_DATA = value; - *(unsigned short *)EEPROM_CAP = 0x8000 + offs; + out_be32((void *)EEPROM_DATA, value); + out_be16((void *)EEPROM_CAP, 0x8000 + offs); for (;;) { count++; - ret = *(unsigned short *)EEPROM_CAP; + ret = in_be16((void *)EEPROM_CAP); if ((ret & 0x8000) == 0) break; diff --git a/board/esd/vom405/vom405.c b/board/esd/vom405/vom405.c index 1b1479f43f..d67b23eae2 100644 --- a/board/esd/vom405/vom405.c +++ b/board/esd/vom405/vom405.c @@ -23,6 +23,7 @@ #include #include +#include #include #include @@ -67,9 +68,11 @@ int board_early_init_f (void) /* * Reset CPLD via GPIO12 (CS3) pin */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 12)); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 12)); udelay(1000); /* wait 1ms */ - out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 12)); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | (0x80000000 >> 12)); udelay(1000); /* wait 1ms */ return 0; @@ -93,7 +96,7 @@ int checkboard (void) int i = getenv_r ("serial#", str, sizeof(str)); int flashcnt; int delay; - volatile unsigned char *led_reg = (unsigned char *)((ulong)CAN_BA + 0x1000); + u8 *led_reg = (u8 *)(CAN_BA + 0x1000); puts ("Board: "); @@ -103,20 +106,20 @@ int checkboard (void) puts(str); } - printf(" (PLD-Version=%02d)\n", *led_reg); + printf(" (PLD-Version=%02d)\n", in_8(led_reg)); /* * Flash LEDs */ for (flashcnt = 0; flashcnt < 3; flashcnt++) { - *led_reg = 0x40; /* LED_B..D off */ + out_8(led_reg, 0x40); /* LED_B..D off */ for (delay = 0; delay < 100; delay++) udelay(1000); - *led_reg = 0x47; /* LED_B..D on */ + out_8(led_reg, 0x47); /* LED_B..D on */ for (delay = 0; delay < 50; delay++) udelay(1000); } - *led_reg = 0x40; + out_8(led_reg, 0x40); return 0; } diff --git a/board/esd/wuh405/wuh405.c b/board/esd/wuh405/wuh405.c index 5eca3bd380..e330fff16c 100644 --- a/board/esd/wuh405/wuh405.c +++ b/board/esd/wuh405/wuh405.c @@ -82,10 +82,6 @@ int board_early_init_f (void) int misc_init_r (void) { - volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); - volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); - volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4); - volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4); unsigned char *dst; ulong len = sizeof(fpgadata); int status; @@ -155,18 +151,20 @@ int misc_init_r (void) /* * Reset external DUARTs */ - out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_DUART_RST); udelay(10); /* wait 10us */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_DUART_RST); udelay(1000); /* wait 1ms */ /* * Enable interrupts in exar duart mcr[3] */ - *duart0_mcr = 0x08; - *duart1_mcr = 0x08; - *duart2_mcr = 0x08; - *duart3_mcr = 0x08; + out_8((void *)(DUART0_BA + 4), 0x08); + out_8((void *)(DUART1_BA + 4), 0x08); + out_8((void *)(DUART2_BA + 4), 0x08); + out_8((void *)(DUART3_BA + 4), 0x08); return (0); }