From: Spencer Oliver <spen@spen-soft.co.uk>
Date: Mon, 26 Mar 2012 16:22:27 +0000 (+0100)
Subject: cfg: add support for STM3220G-EVAL onboard STLINK
X-Git-Tag: v0.6.0-rc1~168
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=067ac78b61ebd90523f9750ec7bcd4b67263b435;p=openocd

cfg: add support for STM3220G-EVAL onboard STLINK

Change-Id: Icd7a1baf6f2623e5b57d29c4602a2762af730936
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/541
Tested-by: jenkins
---

diff --git a/tcl/board/stm3220g_eval_stlink.cfg b/tcl/board/stm3220g_eval_stlink.cfg
new file mode 100644
index 00000000..6ac3751f
--- /dev/null
+++ b/tcl/board/stm3220g_eval_stlink.cfg
@@ -0,0 +1,15 @@
+# STM3220G-EVAL: This is an STM32F2 eval board with a single STM32F207IGH6
+# (128KB) chip.
+# http://www.st.com/internet/evalboard/product/250374.jsp
+#
+# This is for using the onboard STLINK/V2
+
+source [find interface/stlink-v2.cfg]
+
+# increase working area to 128KB
+set WORKAREASIZE 0x20000
+
+# chip name
+set CHIPNAME STM32F207IGH6
+
+source [find target/stm32f2x_stlink.cfg]