From: Bin Meng <bmeng.cn@gmail.com>
Date: Sat, 7 May 2016 14:46:13 +0000 (-0700)
Subject: x86: irq: Reserve IRQ9 for ACPI in PIC mode
X-Git-Tag: v2016.07-rc1~177^2~71
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=07ac84eaaa5daeae4a56ff70649a3e50fc470db5;p=u-boot

x86: irq: Reserve IRQ9 for ACPI in PIC mode

Reserve IRQ9 which is to be used as SCI interrupt number
for ACPI in PIC mode.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index 2950783055..7586fc2b0c 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -121,6 +121,11 @@ static int create_pirq_routing_table(struct udevice *dev)
 	priv->irq_mask = fdtdec_get_int(blob, node,
 					"intel,pirq-mask", PIRQ_BITMAP);
 
+	if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) {
+		/* Reserve IRQ9 for SCI */
+		priv->irq_mask &= ~(1 << 9);
+	}
+
 	if (priv->config == PIRQ_VIA_IBASE) {
 		int ibase_off;