From: Ebony Zhu <b45385@freescale.com>
Date: Thu, 4 Sep 2014 16:53:00 +0000 (-0500)
Subject: powerpc/mpc85xx: Serdes protocol "00" is supported
X-Git-Tag: v2014.10-rc3~14^2~3
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=07c4eea4846cde938c4b0d8c1ddee95d373693ed;p=u-boot

powerpc/mpc85xx: Serdes protocol "00" is supported

"0x00" is a valid serdes protocol for QorIQ parts, and can not be
used to test whether the serdes is enabled or disabled.

Signed-off-by: Ebony Zhu <b45385@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
---

diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index d1fc76a13e..8edf5bb20e 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -186,11 +186,6 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift)
 #endif
 
 	cfg = in_be32(&gur->rcwsr[4]) & sd_prctl_mask;
-	/* Is serdes enabled at all? */
-	if (!cfg) {
-		printf("SERDES%d is not enabled\n", sd + 1);
-		return 0;
-	}
 
 /* Erratum A-007186
  * Freescale Scratch Pad Fuse Register n (SFP_FSPFR0)