From: York Sun Date: Mon, 25 Mar 2013 07:33:20 +0000 (+0000) Subject: powerpc/mpc8xxx: Fix DDR 3-way interleaving X-Git-Tag: v2013.07-rc1~1^2~16^2~21 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=0a7c5353a4cd96d862016356177525da475cb5b0;p=u-boot powerpc/mpc8xxx: Fix DDR 3-way interleaving Should check if interleaving is enabled before using interleaving mode. Signed-off-by: York Sun Signed-off-by: Andy Fleming --- diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c index 5311a262a2..1a8d5933ae 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c @@ -541,14 +541,17 @@ phys_size_t fsl_ddr_sdram(void) total_memory = fsl_ddr_compute(&info, STEP_GET_SPD, 0); /* setup 3-way interleaving before enabling DDRC */ - switch (info.memctl_opts[0].memctl_interleaving_mode) { - case FSL_DDR_3WAY_1KB_INTERLEAVING: - case FSL_DDR_3WAY_4KB_INTERLEAVING: - case FSL_DDR_3WAY_8KB_INTERLEAVING: - fsl_ddr_set_intl3r(info.memctl_opts[0].memctl_interleaving_mode); - break; - default: - break; + if (info.memctl_opts[0].memctl_interleaving) { + switch (info.memctl_opts[0].memctl_interleaving_mode) { + case FSL_DDR_3WAY_1KB_INTERLEAVING: + case FSL_DDR_3WAY_4KB_INTERLEAVING: + case FSL_DDR_3WAY_8KB_INTERLEAVING: + fsl_ddr_set_intl3r( + info.memctl_opts[0].memctl_interleaving_mode); + break; + default: + break; + } } /* Program configuration registers. */