From: Rick Chen <rick@andestech.com>
Date: Thu, 23 Nov 2017 03:04:34 +0000 (+0800)
Subject: ae3xx: timer: Fix ae3xx timer work abnormal in 64 bit.
X-Git-Tag: v2018.01-rc1~58^2~14
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=0e920ef052e2a5d33b1fd37b0b0ef7b74831e851;p=u-boot

ae3xx: timer: Fix ae3xx timer work abnormal in 64 bit.

It will be work fine with unsigned long declaretion in timer
register struct when system is 32 bit. But it will not work
well when system is 64 bit. Replace it by u32 and verify both
ok in 32/64 bit.

Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

diff --git a/drivers/timer/ae3xx_timer.c b/drivers/timer/ae3xx_timer.c
index bcc07a0c86..b710c28f6c 100644
--- a/drivers/timer/ae3xx_timer.c
+++ b/drivers/timer/ae3xx_timer.c
@@ -14,7 +14,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define REG32_TMR(x)	(*(unsigned long *)	((plat->regs) + (x>>2)))
+#define REG32_TMR(x)	(*(u32 *)	((plat->regs) + (x>>2)))
 
 /*
  * Definition of register offsets
@@ -68,7 +68,7 @@ struct atctmr_timer_regs {
 };
 
 struct atftmr_timer_platdata {
-	unsigned long *regs;
+	u32 *regs;
 };
 
 static int atftmr_timer_get_count(struct udevice *dev, u64 *count)