From: Mathias K Date: Wed, 27 Feb 2013 13:01:21 +0000 (+0100) Subject: Change reset configuration. X-Git-Tag: v0.7.0-rc1~71 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=0f1d00bda65975ede19fc20df3b490b08a7c1afd;p=openocd Change reset configuration. This patch change the default reset config from SYSRESETREQ to the working VECTRESET. Change-Id: I21a9a74b9c0c68cfa3a6e6dac9b123acc98a93cb Signed-off-by: Mathias K Reviewed-on: http://openocd.zylin.com/1186 Tested-by: jenkins Reviewed-by: Spencer Oliver --- diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg index 6614383b..fbbea97d 100644 --- a/tcl/target/lpc4350.cfg +++ b/tcl/target/lpc4350.cfg @@ -43,6 +43,9 @@ jtag newtap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \ target create $_CHIPNAME.m4 cortex_m3 -chain-position $_CHIPNAME.m4 target create $_CHIPNAME.m0 cortex_m3 -chain-position $_CHIPNAME.m0 -# if srst is not fitted use SYSRESETREQ to -# perform a soft reset -cortex_m3 reset_config sysresetreq +# on this CPU we should use VECTRESET to perform a soft reset and +# manually reset the periphery +# SRST or SYSRESETREQ disable the debug interface for the time of +# the reset and will not fit our requirements for a consistent debug +# session +cortex_m3 reset_config vectreset