From: Chris Packham <judge.packham@gmail.com>
Date: Mon, 4 Sep 2017 05:38:31 +0000 (+1200)
Subject: ARM: mvebu: Add SoC IDs for Marvell's integrated CPUs
X-Git-Tag: v2017.11-rc1~36^2~5
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=0f8031a3334144246ecaa45c739a7c6c998a443f;p=u-boot

ARM: mvebu: Add SoC IDs for Marvell's integrated CPUs

These SoCs are network packet processors (switch chips) with integrated
ARMv7 cores. They share a great deal of commonality with the Armada-XP
CPUs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
---

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 14457317ce..f7f83bfa36 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -62,6 +62,11 @@ int mvebu_soc_family(void)
 	case SOC_88F6820_ID:
 	case SOC_88F6828_ID:
 		return MVEBU_SOC_A38X;
+
+	case SOC_98DX3236_ID:
+	case SOC_98DX3336_ID:
+	case SOC_98DX4251_ID:
+		return MVEBU_SOC_MSYS;
 	}
 
 	return MVEBU_SOC_UNKNOWN;
@@ -208,6 +213,15 @@ int print_cpuinfo(void)
 	case SOC_88F6828_ID:
 		puts("MV88F6828-");
 		break;
+	case SOC_98DX3236_ID:
+		puts("98DX3236-");
+		break;
+	case SOC_98DX3336_ID:
+		puts("98DX3336-");
+		break;
+	case SOC_98DX4251_ID:
+		puts("98DX4251-");
+		break;
 	default:
 		puts("Unknown-");
 		break;
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index d241eea956..b67b77ae0d 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -65,6 +65,7 @@ enum {
 	MVEBU_SOC_AXP,
 	MVEBU_SOC_A375,
 	MVEBU_SOC_A38X,
+	MVEBU_SOC_MSYS,
 	MVEBU_SOC_UNKNOWN,
 };
 
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 0900e4008c..cdd64fb285 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -18,6 +18,9 @@
 #define SOC_88F6810_ID		0x6810
 #define SOC_88F6820_ID		0x6820
 #define SOC_88F6828_ID		0x6828
+#define SOC_98DX3236_ID		0xf410
+#define SOC_98DX3336_ID		0xf400
+#define SOC_98DX4251_ID		0xfc00
 
 /* A375 revisions */
 #define MV_88F67XX_A0_ID	0x3