From: Dave Liu <daveliu@freescale.com>
Date: Tue, 17 Nov 2009 12:49:05 +0000 (+0800)
Subject: Fix the local bus divider mapping
X-Git-Tag: v2010.03-rc1~105^2~2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=0fd2fa6cce6eb91271ebf9733878d0f1fcbc9b32;p=u-boot

Fix the local bus divider mapping

The real clock divider is 4 times of the bits LCRR[CLKDIV],
according the latest RevF RM.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 9193992888..268edbc5b7 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -170,7 +170,12 @@ void get_sys_info (sys_info_t * sysInfo)
 	}
 #endif
 	if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
-#if !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
+#if defined(CONFIG_FSL_CORENET)
+		/* If this is corenet based SoC, bit-representation
+		 * for four times the clock divider values.
+		 */
+		lcrr_div *= 4;
+#elif !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
     !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
 		/*
 		 * Yes, the entire PQ38 family use the same