From: York Sun Date: Mon, 25 Mar 2013 07:33:31 +0000 (+0000) Subject: powerpc: Add T4160QDS X-Git-Tag: v2013.07-rc1~1^2~16^2~12 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=10d644b10d35672fa8860756ce3339aac18d394f;p=u-boot powerpc: Add T4160QDS T4160QDS shares the same platform as T4240QDS. T4160 is a low power version of T4240, with eight e6500 cores, two DDR3 controllers, and slightly different SerDes protocols. Signed-off-by: York Sun Signed-off-by: Andy Fleming --- diff --git a/boards.cfg b/boards.cfg index 27815c67a2..34fc20f891 100644 --- a/boards.cfg +++ b/boards.cfg @@ -896,6 +896,9 @@ stxssa_4M powerpc mpc85xx stxssa stx T4240QDS powerpc mpc85xx t4qds freescale - T4240QDS:PPC_T4240 T4240QDS_SDCARD powerpc mpc85xx t4qds freescale - T4240QDS:PPC_T4240,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 T4240QDS_SPIFLASH powerpc mpc85xx t4qds freescale - T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 +T4160QDS powerpc mpc85xx t4qds freescale - T4240QDS:PPC_T4160 +T4160QDS_SDCARD powerpc mpc85xx t4qds freescale - T4240QDS:PPC_T4160,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 +T4160QDS_SPIFLASH powerpc mpc85xx t4qds freescale - T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 B4860QDS powerpc mpc85xx b4860qds freescale - B4860QDS:PPC_B4860 B4860QDS_NAND powerpc mpc85xx b4860qds freescale - B4860QDS:PPC_B4860,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000 B4860QDS_SPIFLASH powerpc mpc85xx b4860qds freescale - B4860QDS:PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index dbaa7ea9d3..a8346f0800 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -791,8 +791,21 @@ unsigned long get_board_ddr_clk(void); #define __USB_PHY_TYPE utmi +/* + * T4240 has 3 DDR controllers. Default to 3way_4KB interleaving. It can be + * 3way_1KB, 3way_4KB, 3way_8KB. T4160 has 2 DDR controllers. Default to + * cacheline interleaving. It can be cacheline, page, bank, superbank. + * See doc/README.fsl-ddr for details. + */ +#ifdef CONFIG_PPC_T4240 +#define CTRL_INTLV_PREFERED 3way_4KB +#else +#define CTRL_INTLV_PREFERED cacheline +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=fsl_ddr:ctlr_intlv=3way_4KB," \ + "hwconfig=fsl_ddr:" \ + "ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) "," \ "bank_intlv=auto;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \