From: richardbarry Date: Mon, 13 Sep 2010 10:39:40 +0000 (+0000) Subject: First version of IAR project for RX RDK added. X-Git-Tag: V6.1.0~40 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=11528c0ef7939b830752bf9e0979fc89a06bff61;p=freertos First version of IAR project for RX RDK added. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1095 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/Demo/RX600_RX62N-RDK_IAR/FreeRTOSConfig.h b/Demo/RX600_RX62N-RDK_IAR/FreeRTOSConfig.h new file mode 100644 index 000000000..739bd23e5 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/FreeRTOSConfig.h @@ -0,0 +1,158 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/* Board specifics. */ +#include "yrdkrx62ndef.h" + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCPU_CLOCK_HZ ( ICLK_FREQUENCY ) /* Set in rskrx62ndef.h. */ +#define configPERIPHERAL_CLOCK_HZ ( PCLK_FREQUENCY ) /* Set in rskrx62ndef.h. */ +#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 140 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 45 * 1024 ) ) +#define configMAX_TASK_NAME_LEN ( 12 ) +#define configUSE_TRACE_FACILITY 1 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_CO_ROUTINES 0 +#define configUSE_MUTEXES 1 +#define configGENERATE_RUN_TIME_STATS 1 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configQUEUE_REGISTRY_SIZE 0 +#define configUSE_MALLOC_FAILED_HOOK 1 +#define configUSE_APPLICATION_TASK_TAG 0 + +#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 7 ) +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) + +/* The interrupt priority used by the kernel itself for the tick interrupt and +the pended interrupt. This would normally be the lowest priority. */ +#define configKERNEL_INTERRUPT_PRIORITY 1 + +/* The maximum interrupt priority from which FreeRTOS API calls can be made. +Interrupts that use a priority above this will not be effected by anything the +kernel is doing. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + +/* The peripheral used to generate the tick interrupt is configured as part of +the application code. This constant should be set to the vector number of the +peripheral chosen. As supplied this is CMT0. */ +#define configTICK_VECTOR 28 /*VECT_CMT0_CMI0*/ + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ + +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 +#define INCLUDE_xTaskGetSchedulerState 1 + +extern volatile unsigned long ulHighFrequencyTickCount; +#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() portNOP() /* Run time stats use the same timer as the high frequency timer test. */ +#define portGET_RUN_TIME_COUNTER_VALUE() ulHighFrequencyTickCount + + +/* Override some of the priorities set in the common demo tasks. This is +required to ensure flase positive timing errors are not reported. */ +#define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 2 ) +#define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 3 ) + + +/*----------------------------------------------------------- + * Ethernet configuration. + *-----------------------------------------------------------*/ + +/* MAC address configuration. */ +#define configMAC_ADDR0 0x00 +#define configMAC_ADDR1 0x12 +#define configMAC_ADDR2 0x13 +#define configMAC_ADDR3 0x10 +#define configMAC_ADDR4 0x15 +#define configMAC_ADDR5 0x11 + +/* IP address configuration. */ +#define configIP_ADDR0 192 +#define configIP_ADDR1 168 +#define configIP_ADDR2 0 +#define configIP_ADDR3 200 + +/* Netmask configuration. */ +#define configNET_MASK0 255 +#define configNET_MASK1 255 +#define configNET_MASK2 255 +#define configNET_MASK3 0 + +#endif /* FREERTOS_CONFIG_H */ diff --git a/Demo/RX600_RX62N-RDK_IAR/HighFrequencyTimerTest.c b/Demo/RX600_RX62N-RDK_IAR/HighFrequencyTimerTest.c new file mode 100644 index 000000000..50250217b --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/HighFrequencyTimerTest.c @@ -0,0 +1,169 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* + * High frequency timer test as described in main.c. + */ + +/* Scheduler includes. */ +#include "FreeRTOS.h" + +/* Hardware specifics. */ +#include + +/* The set frequency of the interrupt. Deviations from this are measured as +the jitter. */ +#define timerINTERRUPT_FREQUENCY ( 20000UL ) + +/* The expected time between each of the timer interrupts - if the jitter was +zero. */ +#define timerEXPECTED_DIFFERENCE_VALUE ( ( unsigned short ) ( ( configPERIPHERAL_CLOCK_HZ / 8UL ) / timerINTERRUPT_FREQUENCY ) ) + +/* The highest available interrupt priority. */ +#define timerHIGHEST_PRIORITY ( 15 ) + +/* Misc defines. */ +#define timerTIMER_3_COUNT_VALUE ( *( ( unsigned short * ) 0x8801a ) ) /*( CMT3.CMCNT )*/ + +/*-----------------------------------------------------------*/ + +/* Interrupt handler in which the jitter is measured. */ +__interrupt void vTimer2IntHandler( void ); + +/* Stores the value of the maximum recorded jitter between interrupts. */ +volatile unsigned short usMaxJitter = 0; + +/* Counts the number of high frequency interrupts - used to generate the run +time stats. */ +volatile unsigned long ulHighFrequencyTickCount = 0UL; + +/*-----------------------------------------------------------*/ + +void vSetupHighFrequencyTimer( void ) +{ + /* Timer CMT2 is used to generate the interrupts, and CMT3 is used + to measure the jitter. */ + + /* Enable compare match timer 2 and 3. */ + MSTP( CMT2 ) = 0; + MSTP( CMT3 ) = 0; + + /* Interrupt on compare match. */ + CMT2.CMCR.BIT.CMIE = 1; + + /* Set the compare match value. */ + CMT2.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / timerINTERRUPT_FREQUENCY ) -1 ) / 8 ); + + /* Divide the PCLK by 8. */ + CMT2.CMCR.BIT.CKS = 0; + CMT3.CMCR.BIT.CKS = 0; + + /* Enable the interrupt... */ + _IEN( _CMT2_CMI2 ) = 1; + + /* ...and set its priority to the maximum possible, this is above the priority + set by configMAX_SYSCALL_INTERRUPT_PRIORITY so will nest. */ + _IPR( _CMT2_CMI2 ) = timerHIGHEST_PRIORITY; + + /* Start the timers. */ + CMT.CMSTR1.BIT.STR2 = 1; + CMT.CMSTR1.BIT.STR3 = 1; +} +/*-----------------------------------------------------------*/ + +#pragma vector = VECT_CMT2_CMI2 +__interrupt void vTimer2IntHandler( void ) +{ +volatile unsigned short usCurrentCount; +static unsigned short usMaxCount = 0; +static unsigned long ulErrorCount = 0UL; + + /* We use the timer 1 counter value to measure the clock cycles between + the timer 0 interrupts. First stop the clock. */ + CMT.CMSTR1.BIT.STR3 = 0; + portNOP(); + portNOP(); + usCurrentCount = timerTIMER_3_COUNT_VALUE; + + /* Is this the largest count we have measured yet? */ + if( usCurrentCount > usMaxCount ) + { + if( usCurrentCount > timerEXPECTED_DIFFERENCE_VALUE ) + { + usMaxJitter = usCurrentCount - timerEXPECTED_DIFFERENCE_VALUE; + } + else + { + /* This should not happen! */ + ulErrorCount++; + } + + usMaxCount = usCurrentCount; + } + + /* Used to generate the run time stats. */ + ulHighFrequencyTickCount++; + + /* Clear the timer. */ + timerTIMER_3_COUNT_VALUE = 0; + + /* Then start the clock again. */ + CMT.CMSTR1.BIT.STR3 = 1; +} + + + + + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/IntQueueTimer.c b/Demo/RX600_RX62N-RDK_IAR/IntQueueTimer.c new file mode 100644 index 000000000..469ed7f7e --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/IntQueueTimer.c @@ -0,0 +1,147 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* + * This file contains the non-portable and therefore RX62N specific parts of + * the IntQueue standard demo task - namely the configuration of the timers + * that generate the interrupts and the interrupt entry points. + */ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo includes. */ +#include "IntQueueTimer.h" +#include "IntQueue.h" + +/* Hardware specifics. */ +#include + +#define tmrTIMER_0_1_FREQUENCY ( 2000UL ) +#define tmrTIMER_2_3_FREQUENCY ( 2001UL ) + +/* Handlers for the two timers used. */ +__interrupt void vT0_1InterruptHandler( void ); +__interrupt void vT2_3InterruptHandler( void ); + +void vInitialiseTimerForIntQueueTest( void ) +{ + /* Ensure interrupts do not start until full configuration is complete. */ + portENTER_CRITICAL(); + { + /* Cascade two 8bit timer channels to generate the interrupts. + 8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are + utilised for this test. */ + + /* Enable the timers. */ + SYSTEM.MSTPCRA.BIT.MSTPA5 = 0; + SYSTEM.MSTPCRA.BIT.MSTPA4 = 0; + + /* Enable compare match A interrupt request. */ + TMR0.TCR.BIT.CMIEA = 1; + TMR2.TCR.BIT.CMIEA = 1; + + /* Clear the timer on compare match A. */ + TMR0.TCR.BIT.CCLR = 1; + TMR2.TCR.BIT.CCLR = 1; + + /* Set the compare match value. */ + TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 ); + TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 ); + + /* 16 bit operation ( count from timer 1,2 ). */ + TMR0.TCCR.BIT.CSS = 3; + TMR2.TCCR.BIT.CSS = 3; + + /* Use PCLK as the input. */ + TMR1.TCCR.BIT.CSS = 1; + TMR3.TCCR.BIT.CSS = 1; + + /* Divide PCLK by 8. */ + TMR1.TCCR.BIT.CKS = 2; + TMR3.TCCR.BIT.CKS = 2; + + /* Enable TMR 0, 2 interrupts. */ + IEN( TMR0, CMIA0 ) = 1; + IEN( TMR2, CMIA2 ) = 1; + + /* Set the timer interrupts to be above the kernel. The interrupts are + assigned different priorities so they nest with each other. */ + IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1; + IPR( TMR2, CMIA2 ) = ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 ); + } + portEXIT_CRITICAL(); + + /* Ensure the interrupts are clear as they are edge detected. */ + IR( TMR0, CMIA0 ) = 0; + IR( TMR2, CMIA2 ) = 0; +} +/*-----------------------------------------------------------*/ + +#pragma vector = VECT_TMR0_CMIA0 +__interrupt void vT0_1InterruptHandler( void ) +{ + portYIELD_FROM_ISR( xFirstTimerHandler() ); +} +/*-----------------------------------------------------------*/ + +#pragma vector = VECT_TMR2_CMIA2 +__interrupt void vT2_3InterruptHandler( void ) +{ + portYIELD_FROM_ISR( xSecondTimerHandler() ); +} + + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/ParTest.c b/Demo/RX600_RX62N-RDK_IAR/ParTest.c new file mode 100644 index 000000000..06caecdb5 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/ParTest.c @@ -0,0 +1,254 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/*----------------------------------------------------------- + * Simple IO routines to control the LEDs. + *-----------------------------------------------------------*/ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo includes. */ +#include "partest.h" + +/* Hardware specifics. */ +#include + +#define partestNUM_LEDS ( 12 ) + +long lParTestGetLEDState( unsigned long ulLED ); + +/*-----------------------------------------------------------*/ + +void vParTestInitialise( void ) +{ + /* Port pin configuration is done by the low level set up prior to this + function being called. */ +} +/*-----------------------------------------------------------*/ + +void vParTestSetLED( unsigned long ulLED, signed long xValue ) +{ + if( ulLED < partestNUM_LEDS ) + { + if( xValue != 0 ) + { + /* Turn the LED on. */ + taskENTER_CRITICAL(); + { + switch( ulLED ) + { + case 0: LED4 = LED_ON; + break; + case 1: LED5 = LED_ON; + break; + case 2: LED6 = LED_ON; + break; + case 3: LED7 = LED_ON; + break; + case 4: LED8 = LED_ON; + break; + case 5: LED9 = LED_ON; + break; + case 6: LED10 = LED_ON; + break; + case 7: LED11 = LED_ON; + break; + case 8: LED12 = LED_ON; + break; + case 9: LED13 = LED_ON; + break; + case 10:LED14 = LED_ON; + break; + case 11:LED15 = LED_ON; + break; + } + } + taskEXIT_CRITICAL(); + } + else + { + /* Turn the LED off. */ + taskENTER_CRITICAL(); + { + switch( ulLED ) + { + case 0: LED4 = LED_OFF; + break; + case 1: LED5 = LED_OFF; + break; + case 2: LED6 = LED_OFF; + break; + case 3: LED7 = LED_OFF; + break; + case 4: LED8 = LED_OFF; + break; + case 5: LED9 = LED_OFF; + break; + case 6: LED10 = LED_OFF; + break; + case 7: LED11 = LED_OFF; + break; + case 8: LED12 = LED_OFF; + break; + case 9: LED13 = LED_OFF; + break; + case 10:LED14 = LED_OFF; + break; + case 11:LED15 = LED_OFF; + break; + } + + } + taskEXIT_CRITICAL(); + } + } +} +/*-----------------------------------------------------------*/ + +void vParTestToggleLED( unsigned long ulLED ) +{ + if( ulLED < partestNUM_LEDS ) + { + taskENTER_CRITICAL(); + { + if( lParTestGetLEDState( ulLED ) != 0x00 ) + { + vParTestSetLED( ulLED, 0 ); + } + else + { + vParTestSetLED( ulLED, 1 ); + } + } + taskEXIT_CRITICAL(); + } +} +/*-----------------------------------------------------------*/ + +long lParTestGetLEDState( unsigned long ulLED ) +{ +long lReturn = pdFALSE; + + if( ulLED < partestNUM_LEDS ) + { + switch( ulLED ) + { + case 0 : if( LED4 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 1 : if( LED5 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 2 : if( LED6 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 3 : if( LED7 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 4 : if( LED8 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 5 : if( LED9 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 6 : if( LED10 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 7 : if( LED11 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 8 : if( LED12 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 9 : if( LED13 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 10 : if( LED14 != 0 ) + { + lReturn = pdTRUE; + } + break; + case 11 : if( LED15 != 0 ) + { + lReturn = pdTRUE; + } + break; + } + } + + return lReturn; +} +/*-----------------------------------------------------------*/ + diff --git a/Demo/RX600_RX62N-RDK_IAR/RSKRX62N_Demo.c b/Demo/RX600_RX62N-RDK_IAR/RSKRX62N_Demo.c new file mode 100644 index 000000000..38457cc5e --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/RSKRX62N_Demo.c @@ -0,0 +1,260 @@ +/* + * Copyright (c) 20010 IAR Systems AB. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * IAR Embedded Workbench tutorial + * + * Test Program for the RSKRX62N Board. + * LED's perform different display according to + * which switch is pressed. + * Used to check that all the LED's, switches, + * clock function and AD trigger are working fine. + * + * $Revision: 1556 $ + */ + +#include "iorx62n.h" +#include "intrinsics.h" + +void ScrollLedsLowHigh(void); +void ScrollLedsHighLow(void); + +unsigned long pause; +unsigned long off_set; + +#define ON 0 +#define OFF 1 +#define LED0 PORT0.DR.BIT.B2 // P02 LED0 +#define LED1 PORT0.DR.BIT.B3 // P03 LED1 +#define LED2 PORT0.DR.BIT.B5 // P05 LED2 +#define LED3 PORT3.DR.BIT.B4 // P34 LED3 +#define LED4 PORT6.DR.BIT.B0 // P50 LED4 +#define LED5 PORT7.DR.BIT.B3 // P73 LED5 + +/* defined words used in this program */ +enum { + SW1, + SW2, + SW3, + NONE +}GetKey; + +/* SW1 ISR */ +#pragma vector = 72 +__interrupt void isr_sw1(void) +{ + GetKey=SW1; + + CMT.CMSTR0.BIT.STR0 = 0; // stop timer + ICU.IR[72].BIT.IR = 0; // clear interrupt request flag +} + +/* SW2 ISR */ +#pragma vector = 73 +__interrupt void isr_sw2(void) +{ + GetKey=SW2; + + CMT.CMSTR0.BIT.STR0 = 0; // stop timer + ICU.IR[73].BIT.IR = 0; // clear interrupt request flag +} + +/* SW3 ISR */ +#pragma vector = 79 +__interrupt void isr_sw3(void) +{ + GetKey=SW3; + + CMT.CMSTR0.BIT.STR0 = 1; // start timer + ICU.IR[79].BIT.IR = 0; // clear interrupt request flag +} + +/* Timer ISR */ +#pragma vector = 0x1c +__interrupt void isr_cmt0(void) +{ + // Toggle LED's + LED0 = ~LED0; + LED1 = ~LED1; + LED2 = ~LED2; + LED3 = ~LED3; + LED4 = ~LED4; + LED5 = ~LED5; + ICU.IR[70].BIT.IR = 0; // clear interrupt request flag +} + +/* Main program. */ +void main (void) +{ + // enable modules + SYSTEM.MSTPCRA.BIT.MSTPA23 = 0; // A/D Converter (Unit 0) Module + + // Set up RV1 (potentiometer) + AD0.ADCR.BIT.MODE = 2; // Continuous scan mode + AD0.ADCSR.BIT.CH = 0; // only AD0 + AD0.ADCSR.BIT.ADST = 1; // Start A/D + + // Set up SW1, SW2, SW3 + PORT0.DDR.BIT.B0 = 0; // SW1 input on P00 + PORT0.DDR.BIT.B1 = 0; // SW2 input on P01 + PORT0.DDR.BIT.B7 = 0; // SW3 input on P07 + + PORT0.ICR.BIT.B0 = 1; // Enable input buffer + PORT0.ICR.BIT.B1 = 1; // Enable input buffer + PORT0.ICR.BIT.B7 = 1; // Enable input buffer + + // IRQ8-A used for SW1 + IOPORT.PF8IRQ.BIT.ITS8 = 0; // P00 is designated as the IRQ8-A input pin. + IEN(ICU,IRQ8) = 1; + IPR(ICU,IRQ8) = 3; + + // IRQ9-A used for SW2 + IOPORT.PF8IRQ.BIT.ITS9 = 0; // P01 is designated as IRQ9-A input pin. + IEN(ICU,IRQ9) = 1; + IPR(ICU,IRQ9) = 3; + + // IRQ15-A used for SW3 + IOPORT.PF8IRQ.BIT.ITS15 = 0; // P07 is designated as the IRQ15-A input pin. + IEN(ICU,IRQ15) = 1; + IPR(ICU,IRQ15) = 3; + + // Set up LED's + PORT0.DDR.BIT.B2 = 1; // P02 LED0 + PORT0.DDR.BIT.B3 = 1; // P03 LED1 + PORT0.DDR.BIT.B5 = 1; // P05 LED2 + PORT3.DDR.BIT.B4 = 1; // P34 LED3 + PORT6.DDR.BIT.B0 = 1; // P50 LED4 + PORT7.DDR.BIT.B3 = 1; // P73 LED5 + + // Turn al LED's off + LED0 = LED1 = LED2 = LED3 = LED4 = LED5 = OFF; + + // Set up Timer + SYSTEM.MSTPCRA.BIT.MSTPA15 = 0; // CMT timers 0, + CMT0.CMCR.BIT.CKS = 3; // 25MHz/512 = 48.8kHz + CMT0.CMCR.BIT.CMIE = 1; // enable peripheral interrupt source + CMT0.CMCOR = 12212; // 4 Hz operation + ICU.IER[3].BIT.IEN4 = 1; // enable timer 0 interrupt + IPR(CMT0,CMI0) = 1; // LED level 1 + + __enable_interrupt(); + + GetKey=SW1; + + for (;;) + { + switch (GetKey) + { + case SW1: + ScrollLedsLowHigh(); + break; + case SW2: + ScrollLedsHighLow(); + break; + case SW3: + GetKey=NONE; + break; + } + } +} + +/* scrolls the LED's from low to high */ +void ScrollLedsLowHigh() +{ + char led_number = 0; + + while (GetKey == SW1) + { + if (led_number > 5) + led_number = 0; + + switch(led_number) + { + case 0: + LED0=ON; + LED1=LED2=LED3=LED4=LED5=OFF; + break; + case 1: + LED1=ON; + LED0=LED2=LED3=LED4=LED5=OFF; + break; + case 2: + LED2=ON; + LED0=LED1=LED3=LED4=LED5=OFF; + break; + case 3: + LED3=ON; + LED0=LED1=LED2=LED4=LED5=OFF; + break; + case 4: + LED4=ON; + LED0=LED1=LED2=LED3=LED5=OFF; + break; + case 5: + LED5=ON; + LED0=LED1=LED2=LED3=LED4=OFF; + break; + } + led_number++; + + off_set = AD0.ADDRA*1000; + for (pause = off_set; pause != 0; pause --); + } +} + +/* scrolls the LED's from high to low */ +void ScrollLedsHighLow() +{ + signed char led_number = 3; + + while (GetKey == SW2) + { + if (led_number < 0) + led_number = 5; + + switch(led_number) + { + case 0: + LED0=ON; + LED1=LED2=LED3=LED4=LED5=OFF; + break; + case 1: + LED1=ON; + LED0=LED2=LED3=LED4=LED5=OFF; + break; + case 2: + LED2=ON; + LED0=LED1=LED3=LED4=LED5=OFF; + break; + case 3: + LED3=ON; + LED0=LED1=LED2=LED4=LED5=OFF; + break; + case 4: + LED4=ON; + LED0=LED1=LED2=LED3=LED5=OFF; + break; + case 5: + LED5=ON; + LED0=LED1=LED2=LED3=LED4=OFF; + break; + } + led_number--; + + off_set = AD0.ADDRA*1000; + for (pause = off_set; pause != 0; pause --); + } +} diff --git a/Demo/RX600_RX62N-RDK_IAR/RTOSDemo.dep b/Demo/RX600_RX62N-RDK_IAR/RTOSDemo.dep new file mode 100644 index 000000000..578d35253 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/RTOSDemo.dep @@ -0,0 +1,1876 @@ + + + + 2 + 1767481010 + + Blinky + + $PROJ_DIR$\Blinky\Obj\heap_2.pbi + $PROJ_DIR$\Blinky\Obj\main-blinky.o + $PROJ_DIR$\Blinky\Obj\tasks.o + $PROJ_DIR$\Blinky\Obj\hwsetup.pbi + $PROJ_DIR$\..\..\Source\portable\IAR\RX600\portmacro.h + $PROJ_DIR$\..\..\Source\include\task.h + $PROJ_DIR$\..\..\Source\include\croutine.h + $PROJ_DIR$\Blinky\Exe\RTOSDemo.out + $PROJ_DIR$\Blinky\Obj\ParTest.pbi + $PROJ_DIR$\Blinky\Obj\list.o + $PROJ_DIR$\Blinky\Obj\main-blinky.pbi + $PROJ_DIR$\..\Common\include\partest.h + $PROJ_DIR$\..\..\Source\include\StackMacros.h + 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BUILDACTION + 1 + + + + + + + ILINK + 1 + + 0 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 1 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Blinky + + RX + + 1 + + General + 2 + + 3 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCRX + 3 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARX + 2 + + 3 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 1 + + 0 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 1 + + 0 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 1 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Debug-with-optimisation + + RX + + 1 + + General + 2 + + 3 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCRX + 3 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARX + 2 + + 3 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 1 + + 0 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 1 + + 0 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 1 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Common Demo Files + + Blinky + + + $PROJ_DIR$\..\Common\Minimal\BlockQ.c + + + $PROJ_DIR$\..\Common\Minimal\blocktim.c + + + $PROJ_DIR$\..\Common\Minimal\death.c + + + $PROJ_DIR$\..\Common\Minimal\flash.c + + + $PROJ_DIR$\..\Common\Minimal\flop.c + + + $PROJ_DIR$\..\Common\Minimal\GenQTest.c + + + $PROJ_DIR$\..\Common\Minimal\integer.c + + + $PROJ_DIR$\..\Common\Minimal\IntQueue.c + + + $PROJ_DIR$\..\Common\Minimal\PollQ.c + + + $PROJ_DIR$\..\Common\Minimal\QPeek.c + + + $PROJ_DIR$\..\Common\Minimal\recmutex.c + + + $PROJ_DIR$\..\Common\Minimal\semtest.c + + + + FreeRTOS Source + + Portable Layer + + $PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c + + + $PROJ_DIR$\..\..\Source\portable\IAR\RX600\port.c + + + $PROJ_DIR$\..\..\Source\portable\IAR\RX600\port_asm.s + + + + $PROJ_DIR$\..\..\Source\list.c + + + $PROJ_DIR$\..\..\Source\queue.c + + + $PROJ_DIR$\..\..\Source\tasks.c + + + + FreeTCPIP (based on uIP) + + webserver + + Common + + $PROJ_DIR$\..\Common\ethernet\FreeTCPIP\apps\httpd\http-strings.c + + Blinky + + + + $PROJ_DIR$\..\Common\ethernet\FreeTCPIP\apps\httpd\httpd-fs.c + + Blinky + + + + $PROJ_DIR$\..\Common\ethernet\FreeTCPIP\apps\httpd\httpd.c + + Blinky + + + + + Port specific + + $PROJ_DIR$\webserver\EMAC.c + + Blinky + + + + $PROJ_DIR$\webserver\httpd-cgi.c + + Blinky + + + + $PROJ_DIR$\webserver\phy.c + + Blinky + + + + + + $PROJ_DIR$\..\Common\ethernet\FreeTCPIP\psock.c + + Blinky + + + + $PROJ_DIR$\..\Common\ethernet\FreeTCPIP\timer.c + + Blinky + + + + $PROJ_DIR$\..\Common\ethernet\FreeTCPIP\uip.c + + Blinky + + + + $PROJ_DIR$\..\Common\ethernet\FreeTCPIP\uip_arp.c + + Blinky + + + + + Renesas Files + + $PROJ_DIR$\Renesas-Files\hwsetup.c + + + + $PROJ_DIR$\HighFrequencyTimerTest.c + + Blinky + + + + $PROJ_DIR$\IntQueueTimer.c + + Blinky + + + + $PROJ_DIR$\main-blinky.c + + Debug + Debug-with-optimisation + + + + $PROJ_DIR$\main-full.c + + Blinky + + + + $PROJ_DIR$\ParTest.c + + + $PROJ_DIR$\RegTest.s + + Blinky + + + + $PROJ_DIR$\uIP_Task.c + + Blinky + + + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/RTOSDemo.eww b/Demo/RX600_RX62N-RDK_IAR/RTOSDemo.eww new file mode 100644 index 000000000..239a9381e --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/RTOSDemo.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\RTOSDemo.ewp + + + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/RegTest.s b/Demo/RX600_RX62N-RDK_IAR/RegTest.s new file mode 100644 index 000000000..4a08b34d3 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/RegTest.s @@ -0,0 +1,225 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + + PUBLIC _prvRegTest1Implementation + PUBLIC _prvRegTest2Implementation + + EXTERN _ulRegTest1CycleCount + EXTERN _ulRegTest2CycleCount + + RSEG CODE:CODE(4) + +/* This function is explained in the comments at the top of main.c. */ +_prvRegTest1Implementation: + + /* Put a known value in each register. */ + MOV #1, R1 + MOV #2, R2 + MOV #3, R3 + MOV #4, R4 + MOV #5, R5 + MOV #6, R6 + MOV #7, R7 + MOV #8, R8 + MOV #9, R9 + MOV #10, R10 + MOV #11, R11 + MOV #12, R12 + MOV #13, R13 + MOV #14, R14 + MOV #15, R15 + + /* Loop, checking each itteration that each register still contains the + expected value. */ +TestLoop1: + + /* Push the registers that are going to get clobbered. */ + PUSHM R14-R15 + + /* Increment the loop counter to show this task is still getting CPU time. */ + MOV #_ulRegTest1CycleCount, R14 + MOV [ R14 ], R15 + ADD #1, R15 + MOV R15, [ R14 ] + + /* Yield to extend the text coverage. Set the bit in the ITU SWINTR register. */ + MOV #1, R14 + MOV #0872E0H, R15 + MOV.B R14, [R15] + NOP + NOP + + /* Restore the clobbered registers. */ + POPM R14-R15 + + /* Now compare each register to ensure it still contains the value that was + set before this loop was entered. */ + CMP #1, R1 + BNE RegTest1Error + CMP #2, R2 + BNE RegTest1Error + CMP #3, R3 + BNE RegTest1Error + CMP #4, R4 + BNE RegTest1Error + CMP #5, R5 + BNE RegTest1Error + CMP #6, R6 + BNE RegTest1Error + CMP #7, R7 + BNE RegTest1Error + CMP #8, R8 + BNE RegTest1Error + CMP #9, R9 + BNE RegTest1Error + CMP #10, R10 + BNE RegTest1Error + CMP #11, R11 + BNE RegTest1Error + CMP #12, R12 + BNE RegTest1Error + CMP #13, R13 + BNE RegTest1Error + CMP #14, R14 + BNE RegTest1Error + CMP #15, R15 + BNE RegTest1Error + + /* All comparisons passed, start a new itteratio of this loop. */ + BRA TestLoop1 + +RegTest1Error: + /* A compare failed, just loop here so the loop counter stops incrementing + - causing the check task to indicate the error. */ + BRA RegTest1Error +/*-----------------------------------------------------------*/ + +/* This function is explained in the comments at the top of main.c. */ +_prvRegTest2Implementation: + + /* Put a known value in each register. */ + MOV #10H, R1 + MOV #20H, R2 + MOV #30H, R3 + MOV #40H, R4 + MOV #50H, R5 + MOV #60H, R6 + MOV #70H, R7 + MOV #80H, R8 + MOV #90H, R9 + MOV #100H, R10 + MOV #110H, R11 + MOV #120H, R12 + MOV #130H, R13 + MOV #140H, R14 + MOV #150H, R15 + + /* Loop, checking each itteration that each register still contains the + expected value. */ +TestLoop2: + + /* Push the registers that are going to get clobbered. */ + PUSHM R14-R15 + + /* Increment the loop counter to show this task is still getting CPU time. */ + MOV #_ulRegTest2CycleCount, R14 + MOV [ R14 ], R15 + ADD #1, R15 + MOV R15, [ R14 ] + + /* Restore the clobbered registers. */ + POPM R14-R15 + + /* Now compare each register to ensure it still contains the value that was + set before this loop was entered. */ + CMP #10H, R1 + BNE RegTest2Error + CMP #20H, R2 + BNE RegTest2Error + CMP #30H, R3 + BNE RegTest2Error + CMP #40H, R4 + BNE RegTest2Error + CMP #50H, R5 + BNE RegTest2Error + CMP #60H, R6 + BNE RegTest2Error + CMP #70H, R7 + BNE RegTest2Error + CMP #80H, R8 + BNE RegTest2Error + CMP #90H, R9 + BNE RegTest2Error + CMP #100H, R10 + BNE RegTest2Error + CMP #110H, R11 + BNE RegTest2Error + CMP #120H, R12 + BNE RegTest2Error + CMP #130H, R13 + BNE RegTest2Error + CMP #140H, R14 + BNE RegTest2Error + CMP #150H, R15 + BNE RegTest2Error + + /* All comparisons passed, start a new itteratio of this loop. */ + BRA TestLoop2 + +RegTest2Error: + /* A compare failed, just loop here so the loop counter stops incrementing + - causing the check task to indicate the error. */ + BRA RegTest2Error + + + END diff --git a/Demo/RX600_RX62N-RDK_IAR/Renesas-Files/hwsetup.c b/Demo/RX600_RX62N-RDK_IAR/Renesas-Files/hwsetup.c new file mode 100644 index 000000000..e177682f3 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/Renesas-Files/hwsetup.c @@ -0,0 +1,150 @@ +/****************************************************************************** +* DISCLAIMER + +* This software is supplied by Renesas Technology Corp. and is only +* intended for use with Renesas products. No other uses are authorized. + +* This software is owned by Renesas Technology Corp. and is protected under +* all applicable laws, including copyright laws. + +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES +* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, +* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A +* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY +* DISCLAIMED. + +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES +* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS +* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + +* Renesas reserves the right, without notice, to make changes to this +* software and to discontinue the availability of this software. +* By using this software, you agree to the additional terms and +* conditions found by accessing the following link: +* http://www.renesas.com/disclaimer +****************************************************************************** +* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved. +******************************************************************************* +* File Name : hwsetup.c +* Version : 1.00 +* Description : Power up hardware initializations +****************************************************************************** +* History : DD.MM.YYYY Version Description +* : 15.02.2010 1.00 First Release +******************************************************************************/ + + +/****************************************************************************** +Includes , "Project Includes" +******************************************************************************/ +#include +#include +#include "yrdkrx62ndef.h" +// #include "lcd.h" Uncomment this if an LCD is present. + +/****************************************************************************** +Typedef definitions +******************************************************************************/ + +/****************************************************************************** +Macro definitions +******************************************************************************/ + +/****************************************************************************** +Imported global variables and functions (from other files) +******************************************************************************/ + +/****************************************************************************** +Exported global variables and functions (to be accessed by other files) +******************************************************************************/ + +/****************************************************************************** +Private global variables and functions +******************************************************************************/ + +/****************************************************************************** +* Function Name: HardwareSetup +* Description : This function does initial setting for CPG port pins used in +* : the Demo including the MII pins of the Ethernet PHY connection. +* Arguments : none +* Return Value : none +******************************************************************************/ +void HardwareSetup(void) +{ + uint32_t sckcr = 0; + + /* Configure system clocks based on header */ + sckcr += (ICLK_MUL==8) ? (0ul << 24) : (ICLK_MUL==4) ? (1ul << 24) : (ICLK_MUL==2) ? (2ul << 24) : (3ul << 24); + sckcr += (BCLK_MUL==8) ? (0ul << 16) : (BCLK_MUL==4) ? (1ul << 16) : (BCLK_MUL==2) ? (2ul << 16) : (3ul << 16); + sckcr += (PCLK_MUL==8) ? (0ul << 8) : (PCLK_MUL==4) ? (1ul << 8) : (PCLK_MUL==2) ? (2ul << 8) : (3ul << 8); + SYSTEM.SCKCR.LONG = sckcr; + + /* Module standby clear - EtherC, EDMAC */ + SYSTEM.MSTPCRB.BIT.MSTPB15 = 0; + + PORT0.DDR.BYTE = 0x00 ; // Port 0: inputs (IRQ's from ethernet & WiFi) + PORT1.DDR.BYTE = 0x00 ; // Port 1: inputs (IIC and USB settings will override these later) + PORT2.DDR.BYTE = 0x1A ; // Port 2: USB signals + PORT3.DDR.BYTE = 0x04 ; // Port 3: JTAG (P30, P31, P34), CAN (P32=Tx, P33=Rx), NMI (P35) + PORT4.DDR.BYTE = 0x00 ; // Port 4: Switches (P40-P42), AIN (P43-P47) + PORT5.DDR.BYTE = 0x3B ; // Port 5: Audio (P55,P54), BCLK (P53), SCI (P52=Rx, P50=Tx), LCD-RS (P51) + + PORTA.DR.BYTE = 0x00 ; // Port A outputs all LOW to start + PORTA.DDR.BYTE = 0xFF ; // Port A: Expansion (PA0-PA2), Ether (PA3-PA5), Audio (PA6-PA7) + + PORTB.DR.BYTE = 0x00 ; + PORTB.DDR.BYTE = 0x70 ; // Port B: Ether + + PORTC.DR.BYTE = 0xF7 ; // Port C: Chip selects, clock = high; IO reset = low (not reset, needed by Ether PHY) + PORTC.DDR.BYTE = 0x7F ; // Port C: SPI (PC0-2, PC4-7), IO reset (PC3) + + // Ethernet settings + IOPORT.PFENET.BYTE = 0x82; // Enable Ether poins, RMII mode, enable LINKSTA + PORTA.ICR.BIT.B5 = 1; // ET_LINKSTA + PORTA.ICR.BIT.B3 = 1; // ET_MDIO + PORTB.ICR.BIT.B0 = 1; // RMII_RXD1 + PORTB.ICR.BIT.B1 = 1; // RMII_RXD0 + PORTB.ICR.BIT.B2 = 1; // REF50CLK + PORTB.ICR.BIT.B3 = 1; // RMII_RX_ER + PORTB.ICR.BIT.B7 = 1; // RMII_CRS_DV + + + /* Configure LEDs */ + LED4 = LED_OFF; + LED5 = LED_OFF; + LED6 = LED_OFF; + LED7 = LED_OFF; + LED8 = LED_OFF; + LED9 = LED_OFF; + LED10 = LED_OFF; + LED11 = LED_OFF; + LED12 = LED_OFF; + LED13 = LED_OFF; + LED14 = LED_OFF; + LED15 = LED_OFF; + + LED4_DDR = 1; + LED5_DDR = 1; + LED6_DDR = 1; + LED7_DDR = 1; + LED8_DDR = 1; + LED9_DDR = 1; + LED10_DDR = 1; + LED11_DDR = 1; + LED12_DDR = 1; + LED13_DDR = 1; + LED14_DDR = 1; + LED15_DDR = 1; + + /* Configure push button switches */ + SW1_DDR = 0; + SW2_DDR = 0; + SW3_DDR = 0; + SW1_ICR = 1; + SW2_ICR = 1; + SW3_ICR = 1; +} + + diff --git a/Demo/RX600_RX62N-RDK_IAR/include/IntQueueTimer.h b/Demo/RX600_RX62N-RDK_IAR/include/IntQueueTimer.h new file mode 100644 index 000000000..ce40d7e29 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/include/IntQueueTimer.h @@ -0,0 +1,62 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +#ifndef INT_QUEUE_TIMER_H +#define INT_QUEUE_TIMER_H + +void vInitialiseTimerForIntQueueTest( void ); +portBASE_TYPE xTimer0Handler( void ); +portBASE_TYPE xTimer1Handler( void ); + +#endif + diff --git a/Demo/RX600_RX62N-RDK_IAR/include/inthandler.h b/Demo/RX600_RX62N-RDK_IAR/include/inthandler.h new file mode 100644 index 000000000..f55efcaf6 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/include/inthandler.h @@ -0,0 +1,714 @@ +/***********************************************************************/ +/* */ +/* FILE :inthandler.h */ +/* DATE :Wed, Aug 25, 2010 */ +/* DESCRIPTION :Interrupt Handler Declarations */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by KPIT GNU Project Generator. */ +/* */ +/***********************************************************************/ + + + +#ifndef INTHANDLER_H +#define INTHANDLER_H + +// Exception(Supervisor Instruction) +void INT_Excep_SuperVisorInst(void) __attribute__ ((interrupt)); + +// Exception(Undefined Instruction) +void INT_Excep_UndefinedInst(void) __attribute__ ((interrupt)); + +// Exception(Floating Point) +void INT_Excep_FloatingPoint(void) __attribute__ ((interrupt)); + +// NMI +void INT_NonMaskableInterrupt(void) __attribute__ ((interrupt)); + +// Dummy +void Dummy (void) __attribute__ ((interrupt)); + +// BRK +void INT_Excep_BRK(void) __attribute__ ((interrupt)); + +// vector 1 reserved +// vector 2 reserved +// vector 3 reserved +// vector 4 reserved +// vector 5 reserved +// vector 6 reserved +// vector 7 reserved +// vector 8 reserved +// vector 9 reserved +// vector 10 reserved +// vector 11 reserved +// vector 12 reserved +// vector 13 reserved +// vector 14 reserved +// vector 15 reserved + +// BUSERR + +void INT_Excep_BUSERR(void) __attribute__ ((interrupt)); + +// vector 17 reserved +// vector 18 reserved +// vector 19 reserved +// vector 20 reserved + +// FCU_FCUERR + +void INT_Excep_FCU_FCUERR(void) __attribute__ ((interrupt)); + +// vector 22 reserved + +// FCU_FRDYI + +void INT_Excep_FCU_FRDYI(void) __attribute__ ((interrupt)); + +// vector 24 reserved +// vector 25 reserved +// vector 26 reserved +// vector 27 reserved + +// CMTU0_CMT0 + +void INT_Excep_CMTU0_CMT0(void) __attribute__ ((interrupt)); + +// CMTU0_CMT1 + +void INT_Excep_CMTU0_CMT1(void) __attribute__ ((interrupt)); + +// CMTU1_CMT2 + +void INT_Excep_CMTU1_CMT2(void) __attribute__ ((interrupt)); + +// CMTU1_CMT3 + +void INT_Excep_CMTU1_CMT3(void) __attribute__ ((interrupt)); + +// vector 32 reserved +// vector 33 reserved +// vector 34 reserved +// vector 35 reserved +// vector 36 reserved +// vector 37 reserved +// vector 38 reserved +// vector 39 reserved +// vector 40 reserved +// vector 41 reserved +// vector 42 reserved +// vector 43 reserved +// vector 44 reserved +// vector 45 reserved +// vector 46 reserved +// vector 47 reserved +// vector 48 reserved +// vector 49 reserved +// vector 50 reserved +// vector 51 reserved +// vector 52 reserved +// vector 53 reserved +// vector 54 reserved +// vector 55 reserved +// vector 56 reserved +// vector 57 reserved +// vector 58 reserved +// vector 59 reserved +// vector 60 reserved +// vector 61 reserved +// vector 62 reserved +// vector 63 reserved + +// IRQ0 + +void INT_Excep_IRQ0(void) __attribute__ ((interrupt)); + +// IRQ1 + +void INT_Excep_IRQ1(void) __attribute__ ((interrupt)); + +// IRQ2 + +void INT_Excep_IRQ2(void) __attribute__ ((interrupt)); + +// IRQ3 + +void INT_Excep_IRQ3(void) __attribute__ ((interrupt)); + +// IRQ4 + +void INT_Excep_IRQ4(void) __attribute__ ((interrupt)); + +// IRQ5 + +void INT_Excep_IRQ5(void) __attribute__ ((interrupt)); + +// IRQ6 + +void INT_Excep_IRQ6(void) __attribute__ ((interrupt)); + +// IRQ7 + +void INT_Excep_IRQ7(void) __attribute__ ((interrupt)); + +// IRQ8 + +void INT_Excep_IRQ8(void) __attribute__ ((interrupt)); + +// IRQ9 + +void INT_Excep_IRQ9(void) __attribute__ ((interrupt)); + +// IRQ10 + +void INT_Excep_IRQ10(void) __attribute__ ((interrupt)); + +// IRQ11 + +void INT_Excep_IRQ11(void) __attribute__ ((interrupt)); + +// IRQ12 + +void INT_Excep_IRQ12(void) __attribute__ ((interrupt)); + +// IRQ13 + +void INT_Excep_IRQ13(void) __attribute__ ((interrupt)); + +// IRQ14 + +void INT_Excep_IRQ14(void) __attribute__ ((interrupt)); + +// IRQ15 + +void INT_Excep_IRQ15(void) __attribute__ ((interrupt)); + +// vector 80 reserved +// vector 81 reserved +// vector 82 reserved +// vector 83 reserved +// vector 84 reserved +// vector 85 reserved +// vector 86 reserved +// vector 87 reserved +// vector 88 reserved +// vector 89 reserved +// vector 90 reserved +// vector 91 reserved +// vector 92 reserved +// vector 93 reserved +// vector 94 reserved +// vector 95 reserved + +// WDT_WOVI + +void INT_Excep_WDT_WOVI(void) __attribute__ ((interrupt)); + +// vector 97 reserved + +// AD0_ADI0 + +void INT_Excep_AD0_ADI0(void) __attribute__ ((interrupt)); + +// AD1_ADI1 + +void INT_Excep_AD1_ADI1(void) __attribute__ ((interrupt)); + +// AD2_ADI2 + +void INT_Excep_AD2_ADI2(void) __attribute__ ((interrupt)); + +// AD3_ADI3 + +void INT_Excep_AD3_ADI3(void) __attribute__ ((interrupt)); + +// vector 102 reserved +// vector 103 reserved + +// TPU0_TGI0A + +void INT_Excep_TPU0_TGI0A(void) __attribute__ ((interrupt)); + +// TPU0_TGI0B + +void INT_Excep_TPU0_TGI0B(void) __attribute__ ((interrupt)); + +// TPU0_TGI0C + +void INT_Excep_TPU0_TGI0C(void) __attribute__ ((interrupt)); + +// TPU0_TGI0D + +void INT_Excep_TPU0_TGI0D(void) __attribute__ ((interrupt)); + +// TPU0_TCI0V + +void INT_Excep_TPU0_TCI0V(void) __attribute__ ((interrupt)); + +// vector 109 reserved +// vector 110 reserved + +// TPU1_TGI1A + +void INT_Excep_TPU1_TGI1A(void) __attribute__ ((interrupt)); + +// TPU1_TGI1B + +void INT_Excep_TPU1_TGI1B(void) __attribute__ ((interrupt)); + +// vector 113 reserved +// vector 114 reserved + +// TPU1_TCI1V + +void INT_Excep_TPU1_TCI1V(void) __attribute__ ((interrupt)); + +// TPU1_TCI1U + +void INT_Excep_TPU1_TCI1U(void) __attribute__ ((interrupt)); + +// TPU2_TGI2A + +void INT_Excep_TPU2_TGI2A(void) __attribute__ ((interrupt)); + +// TPU2_TGI2B + +void INT_Excep_TPU2_TGI2B(void) __attribute__ ((interrupt)); + +// vector 119 reserved + +// TPU2_TCI2V + +void INT_Excep_TPU2_TCI2V(void) __attribute__ ((interrupt)); + +// TPU2_TCI2U + +void INT_Excep_TPU2_TCI2U(void) __attribute__ ((interrupt)); + +// TPU3_TGI3A + +void INT_Excep_TPU3_TGI3A(void) __attribute__ ((interrupt)); + +// TPU3_TGI3B + +void INT_Excep_TPU3_TGI3B(void) __attribute__ ((interrupt)); + +// TPU3_TGI3C + +void INT_Excep_TPU3_TGI3C(void) __attribute__ ((interrupt)); + +// TPU3_TGI3D + +void INT_Excep_TPU3_TGI3D(void) __attribute__ ((interrupt)); + +// TPU3_TCI3V + +void INT_Excep_TPU3_TCI3V(void) __attribute__ ((interrupt)); + +// TPU4_TGI4A + +void INT_Excep_TPU4_TGI4A(void) __attribute__ ((interrupt)); + +// TPU4_TGI4B + +void INT_Excep_TPU4_TGI4B(void) __attribute__ ((interrupt)); + +// vector 129 reserved +// vector 130 reserved + +// TPU4_TCI4V + +void INT_Excep_TPU4_TCI4V(void) __attribute__ ((interrupt)); + +// TPU4_TCI4U + +void INT_Excep_TPU4_TCI4U(void) __attribute__ ((interrupt)); + +// TPU5_TGI5A + +void INT_Excep_TPU5_TGI5A(void) __attribute__ ((interrupt)); + +// TPU5_TGI5B + +void INT_Excep_TPU5_TGI5B(void) __attribute__ ((interrupt)); + +// vector 135 reserved + +// TPU5_TCI5V + +void INT_Excep_TPU5_TCI5V(void) __attribute__ ((interrupt)); + +// TPU5_TCI5U + +void INT_Excep_TPU5_TCI5U(void) __attribute__ ((interrupt)); + +// TPU6_TGI6A + +void INT_Excep_TPU6_TGI6A(void) __attribute__ ((interrupt)); + +// TPU6_TGI6B + +void INT_Excep_TPU6_TGI6B(void) __attribute__ ((interrupt)); + +// TPU6_TGI6C + +void INT_Excep_TPU6_TGI6C(void) __attribute__ ((interrupt)); + +// TPU6_TGI6D + +void INT_Excep_TPU6_TGI6D(void) __attribute__ ((interrupt)); + +// TPU6_TCI6V + +void INT_Excep_TPU6_TCI6V(void) __attribute__ ((interrupt)); + +// vector 143 reserved +// vector 144 reserved + +// TPU7_TGI7A + +void INT_Excep_TPU7_TGI7A(void) __attribute__ ((interrupt)); + +// TPU7_TGI7B + +void INT_Excep_TPU7_TGI7B(void) __attribute__ ((interrupt)); + +// vector 147 reserved +// vector 148 reserved + +// TPU7_TCI7V + +void INT_Excep_TPU7_TCI7V(void) __attribute__ ((interrupt)); + +// TPU7_TCI7U + +void INT_Excep_TPU7_TCI7U(void) __attribute__ ((interrupt)); + +// TPU8_TGI8A + +void INT_Excep_TPU8_TGI8A(void) __attribute__ ((interrupt)); + +// TPU8_TGI8B + +void INT_Excep_TPU8_TGI8B(void) __attribute__ ((interrupt)); + +// vector 153 reserved + +// TPU8_TCI8V + +void INT_Excep_TPU8_TCI8V(void) __attribute__ ((interrupt)); + +// TPU8_TCI8U + +void INT_Excep_TPU8_TCI8U(void) __attribute__ ((interrupt)); + +// TPU9_TGI9A + +void INT_Excep_TPU9_TGI9A(void) __attribute__ ((interrupt)); + +// TPU9_TGI9B + +void INT_Excep_TPU9_TGI9B(void) __attribute__ ((interrupt)); + +// TPU9_TGI9C + +void INT_Excep_TPU9_TGI9C(void) __attribute__ ((interrupt)); + +// TPU9_TGI9D + +void INT_Excep_TPU9_TGI9D(void) __attribute__ ((interrupt)); + +// TPU9_TCI9V + +void INT_Excep_TPU9_TCI9V(void) __attribute__ ((interrupt)); + +// TPU10_TGI10A + +void INT_Excep_TPU10_TGI10A(void) __attribute__ ((interrupt)); + +// TPU10_TGI10B + +void INT_Excep_TPU10_TGI10B(void) __attribute__ ((interrupt)); + +// vector 163 reserved +// vector 164 reserved + +// TPU10_TCI10V + +void INT_Excep_TPU10_TCI10V(void) __attribute__ ((interrupt)); + +// TPU10_TCI10U + +void INT_Excep_TPU10_TCI10U(void) __attribute__ ((interrupt)); + +// TPU11_TGI11A + +void INT_Excep_TPU11_TGI11A(void) __attribute__ ((interrupt)); + +// TPU11_TGI11B + +void INT_Excep_TPU11_TGI11B(void) __attribute__ ((interrupt)); + +// vector 169 reserved + +// TPU11_TCI11V + +void INT_Excep_TPU11_TCI11V(void) __attribute__ ((interrupt)); + +// TPU11_TCI11U + +void INT_Excep_TPU11_TCI11U(void) __attribute__ ((interrupt)); + +// vector 172 reserved +// vector 173 reserved + +// TMR0_CMI0A + +void INT_Excep_TMR0_CMI0A(void) __attribute__ ((interrupt)); + +// TMR0_CMI0B + +void INT_Excep_TMR0_CMI0B(void) __attribute__ ((interrupt)); + +// TMR0_OV0I + +void INT_Excep_TMR0_OV0I(void) __attribute__ ((interrupt)); + +// TMR1_CMI1A + +void INT_Excep_TMR1_CMI1A(void) __attribute__ ((interrupt)); + +// TMR1_CMI1B + +void INT_Excep_TMR1_CMI1B(void) __attribute__ ((interrupt)); + +// TMR1_OV1I + +void INT_Excep_TMR1_OV1I(void) __attribute__ ((interrupt)); + +// TMR2_CMI2A + +void INT_Excep_TMR2_CMI2A(void) __attribute__ ((interrupt)); + +// TMR2_CMI2B + +void INT_Excep_TMR2_CMI2B(void) __attribute__ ((interrupt)); + +// TMR2_OV2I + +void INT_Excep_TMR2_OV2I(void) __attribute__ ((interrupt)); + +// TMR3_CMI3A + +void INT_Excep_TMR3_CMI3A(void) __attribute__ ((interrupt)); + +// TMR3_CMI3B + +void INT_Excep_TMR3_CMI3B(void) __attribute__ ((interrupt)); + +// TMR3_OV3I + +void INT_Excep_TMR3_OV3I(void) __attribute__ ((interrupt)); + +// vector 186 reserved +// vector 187 reserved +// vector 188 reserved +// vector 189 reserved +// vector 190 reserved +// vector 191 reserved +// vector 192 reserved +// vector 193 reserved +// vector 194 reserved +// vector 195 reserved +// vector 196 reserved +// vector 197 reserved + +// DMAC_DMTEND0 + +void INT_Excep_DMAC_DMTEND0(void); + +// DMAC_DMTEND1 + +void INT_Excep_DMAC_DMTEND1(void) __attribute__ ((interrupt)); + +// DMAC_DMTEND2 + +void INT_Excep_DMAC_DMTEND2(void) __attribute__ ((interrupt)); + +// DMAC_DMTEND3 + +void INT_Excep_DMAC_DMTEND3(void) __attribute__ ((interrupt)); + +// vector 202 reserved +// vector 203 reserved +// vector 204 reserved +// vector 205 reserved +// vector 206 reserved +// vector 207 reserved +// vector 208 reserved +// vector 209 reserved +// vector 210 reserved +// vector 211 reserved +// vector 212 reserved +// vector 213 reserved + +// SCI0_ERI0 + +void INT_Excep_SCI0_ERI0(void) __attribute__ ((interrupt)); + +// SCI0_RXI0 + +void INT_Excep_SCI0_RXI0(void) __attribute__ ((interrupt)); + +// SCI0_TXI0 + +void INT_Excep_SCI0_TXI0(void) __attribute__ ((interrupt)); + +// SCI0_TEI0 + +void INT_Excep_SCI0_TEI0(void) __attribute__ ((interrupt)); + +// SCI1_ERI1 + +void INT_Excep_SCI1_ERI1(void) __attribute__ ((interrupt)); + +// SCI1_RXI1 + +void INT_Excep_SCI1_RXI1(void) __attribute__ ((interrupt)); + +// SCI1_TXI1 + +void INT_Excep_SCI1_TXI1(void) __attribute__ ((interrupt)); + +// SCI1_TEI1 + +void INT_Excep_SCI1_TEI1(void) __attribute__ ((interrupt)); + +// SCI2_ERI2 + +void INT_Excep_SCI2_ERI2(void) __attribute__ ((interrupt)); + +// SCI2_RXI2 + +void INT_Excep_SCI2_RXI2(void) __attribute__ ((interrupt)); + +// SCI2_TXI2 + +void INT_Excep_SCI2_TXI2(void) __attribute__ ((interrupt)); + +// SCI2_TEI2 + +void INT_Excep_SCI2_TEI2(void) __attribute__ ((interrupt)); + +// SCI3_ERI3 + +void INT_Excep_SCI3_ERI3(void) __attribute__ ((interrupt)); + +// SCI3_RXI3 + +void INT_Excep_SCI3_RXI3(void) __attribute__ ((interrupt)); + +// SCI3_TXI3 + +void INT_Excep_SCI3_TXI3(void) __attribute__ ((interrupt)); + +// SCI3_TEI3 + +void INT_Excep_SCI3_TEI3(void) __attribute__ ((interrupt)); + +// SCI4_ERI4 + +void INT_Excep_SCI4_ERI4(void) __attribute__ ((interrupt)); + +// SCI4_RXI4 + +void INT_Excep_SCI4_RXI4(void) __attribute__ ((interrupt)); + +// SCI4_TXI4 + +void INT_Excep_SCI4_TXI4(void) __attribute__ ((interrupt)); + +// SCI4_TEI4 + +void INT_Excep_SCI4_TEI4(void) __attribute__ ((interrupt)); + +// SCI5_ERI5 + +void INT_Excep_SCI5_ERI5(void) __attribute__ ((interrupt)); + +// SCI5_RXI5 + +void INT_Excep_SCI5_RXI5(void) __attribute__ ((interrupt)); + +// SCI5_TXI5 + +void INT_Excep_SCI5_TXI5(void) __attribute__ ((interrupt)); + +// SCI5_TEI5 + +void INT_Excep_SCI5_TEI5(void) __attribute__ ((interrupt)); + +// SCI6_ERI6 + +void INT_Excep_SCI6_ERI6(void) __attribute__ ((interrupt)); + +// SCI6_RXI6 + +void INT_Excep_SCI6_RXI6(void) __attribute__ ((interrupt)); + +// SCI6_TXI6 + +void INT_Excep_SCI6_TXI6(void) __attribute__ ((interrupt)); + +// SCI6_TEI6 + +void INT_Excep_SCI6_TEI6(void) __attribute__ ((interrupt)); + +// vector 242 reserved +// vector 243 reserved +// vector 244 reserved +// vector 245 reserved + +// RIIC0_EEI0 + +void INT_Excep_RIIC0_EEI0(void) __attribute__ ((interrupt)); + +// RIIC0_RXI0 + +void INT_Excep_RIIC0_RXI0(void) __attribute__ ((interrupt)); + +// RIIC0_TXI0 + +void INT_Excep_RIIC0_TXI0(void) __attribute__ ((interrupt)); + +// RIIC0_TEI0 + +void INT_Excep_RIIC0_TEI0(void) __attribute__ ((interrupt)); + +// RIIC1_EEI1 + +void INT_Excep_RIIC1_EEI1(void) __attribute__ ((interrupt)); + +// RIIC1_RXI1 + +void INT_Excep_RIIC1_RXI1(void) __attribute__ ((interrupt)); + +// RIIC1_TXI1 + +void INT_Excep_RIIC1_TXI1(void) __attribute__ ((interrupt)); + +// RIIC1_TEI1 + +void INT_Excep_RIIC1_TEI1(void) __attribute__ ((interrupt)); + +// vector 254 reserved +// vector 255 reserved + +//;<> +//;Power On Reset PC +extern void PowerON_Reset_PC(void) __attribute__ ((interrupt)); +//;<> + +#endif \ No newline at end of file diff --git a/Demo/RX600_RX62N-RDK_IAR/include/typedefine.h b/Demo/RX600_RX62N-RDK_IAR/include/typedefine.h new file mode 100644 index 000000000..49b303a56 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/include/typedefine.h @@ -0,0 +1,23 @@ +/***********************************************************************/ +/* */ +/* FILE :typedefine.h */ +/* DATE :Wed, Aug 25, 2010 */ +/* DESCRIPTION :Aliases of Integer Type */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by KPIT GNU Project Generator. */ +/* */ +/***********************************************************************/ + + + +typedef signed char _SBYTE; +typedef unsigned char _UBYTE; +typedef signed short _SWORD; +typedef unsigned short _UWORD; +typedef signed int _SINT; +typedef unsigned int _UINT; +typedef signed long _SDWORD; +typedef unsigned long _UDWORD; +typedef signed long long _SQWORD; +typedef unsigned long long _UQWORD; diff --git a/Demo/RX600_RX62N-RDK_IAR/include/yrdkrx62ndef.h b/Demo/RX600_RX62N-RDK_IAR/include/yrdkrx62ndef.h new file mode 100644 index 000000000..29a1acee7 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/include/yrdkrx62ndef.h @@ -0,0 +1,104 @@ + +/****************************************************************************** +* DISCLAIMER +* Please refer to http://www.renesas.com/disclaimer +****************************************************************************** + Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved. +******************************************************************************* +* File Name : rsksh7216.h +* Version : 1.00 +* Description : RSK 7216 board specific settings +****************************************************************************** +* History : DD.MM.YYYY Version Description +* : 06.10.2009 1.00 First Release +******************************************************************************/ + +#ifndef RDKRX62N_H +#define RDKRX62N_H + +/****************************************************************************** +Includes , "Project Includes" +******************************************************************************/ + +/****************************************************************************** +Typedef definitions +******************************************************************************/ + +/****************************************************************************** +Macro definitions +******************************************************************************/ + +/* System Clock Settings */ +#define XTAL_FREQUENCY (12000000L) +#define ICLK_MUL (8) +#define PCLK_MUL (4) +#define BCLK_MUL (4) +#define ICLK_FREQUENCY (XTAL_FREQUENCY * ICLK_MUL) +#define PCLK_FREQUENCY (XTAL_FREQUENCY * PCLK_MUL) +#define BCLK_FREQUENCY (XTAL_FREQUENCY * BCLK_MUL) + +#define CMT0_CLK_SELECT (512) + +/* General Values */ +#define LED_ON (1) +#define LED_OFF (0) +#define SET_BIT_HIGH (1) +#define SET_BIT_LOW (0) +#define SET_BYTE_HIGH (0xFF) +#define SET_BYTE_LOW (0x00) + +/* Define switches to be polled if not available as interrupts */ +#define SW_ACTIVE FALSE +#define SW1 PORT4.PORT.BIT.B0 +#define SW2 PORT4.PORT.BIT.B1 +#define SW3 PORT4.PORT.BIT.B2 +#define SW1_DDR PORT4.DDR.BIT.B0 +#define SW2_DDR PORT4.DDR.BIT.B1 +#define SW3_DDR PORT4.DDR.BIT.B2 +#define SW1_ICR PORT4.ICR.BIT.B0 +#define SW2_ICR PORT4.ICR.BIT.B1 +#define SW3_ICR PORT4.ICR.BIT.B2 + +/* LEDs */ +#define LED4 PORTD.DR.BIT.B5 +#define LED5 PORTE.DR.BIT.B3 +#define LED6 PORTD.DR.BIT.B2 +#define LED7 PORTE.DR.BIT.B0 +#define LED8 PORTD.DR.BIT.B4 +#define LED9 PORTE.DR.BIT.B2 +#define LED10 PORTD.DR.BIT.B1 +#define LED11 PORTD.DR.BIT.B7 +#define LED12 PORTD.DR.BIT.B3 +#define LED13 PORTE.DR.BIT.B1 +#define LED14 PORTD.DR.BIT.B0 +#define LED15 PORTD.DR.BIT.B6 + +#define LED4_DDR PORTD.DDR.BIT.B5 +#define LED5_DDR PORTE.DDR.BIT.B3 +#define LED6_DDR PORTD.DDR.BIT.B2 +#define LED7_DDR PORTE.DDR.BIT.B0 +#define LED8_DDR PORTD.DDR.BIT.B4 +#define LED9_DDR PORTE.DDR.BIT.B2 +#define LED10_DDR PORTD.DDR.BIT.B1 +#define LED11_DDR PORTD.DDR.BIT.B7 +#define LED12_DDR PORTD.DDR.BIT.B3 +#define LED13_DDR PORTE.DDR.BIT.B1 +#define LED14_DDR PORTD.DDR.BIT.B0 +#define LED15_DDR PORTD.DDR.BIT.B6 + + + + +/****************************************************************************** +Variable Externs +******************************************************************************/ + +/****************************************************************************** +Functions Prototypes +******************************************************************************/ + + + +/* RDKRX62N_H */ +#endif + diff --git a/Demo/RX600_RX62N-RDK_IAR/main-blinky.c b/Demo/RX600_RX62N-RDK_IAR/main-blinky.c new file mode 100644 index 000000000..04e6f92df --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/main-blinky.c @@ -0,0 +1,229 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* + * This is a very simple demo that creates two tasks and one queue. One task + * (the queue receive task) blocks on the queue to wait for data to arrive, + * toggling an LED each time '100' is received. The other task (the queue send + * task) repeatedly blocks for a fixed period before sending '100' to the queue + * (causing the first task to toggle the LED). + * + * For a much more complete and complex example select either the Debug or + * Debug_with_optimisation build configurations within the HEW IDE. +*/ + +/* Hardware specific includes. */ +#include + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" + +/* Demo includes. */ +#include "partest.h" + +/* Priorities at which the tasks are created. */ +#define configQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define configQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) + +/* The rate at which data is sent to the queue, specified in milliseconds. */ +#define mainQUEUE_SEND_FREQUENCY_MS ( 500 / portTICK_RATE_MS ) + +/* The number of items the queue can hold. This is 1 as the receive task +will remove items as they are added so the send task should always find the +queue empty. */ +#define mainQUEUE_LENGTH ( 1 ) + +/* + * The tasks as defined at the top of this file. + */ +static void prvQueueReceiveTask( void *pvParameters ); +static void prvQueueSendTask( void *pvParameters ); + +/* The queue used by both tasks. */ +static xQueueHandle xQueue = NULL; + +/* This variable is not used by this simple Blinky example. It is defined +purely to allow the project to link as it is used by the full project. */ +volatile unsigned long ulHighFrequencyTickCount = 0UL; +/*-----------------------------------------------------------*/ + +void main(void) +{ +extern void HardwareSetup( void ); + + /* Renesas provided CPU configuration routine. The clocks are configured in + here. */ + HardwareSetup(); + + /* Create the queue. */ + xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) ); + + if( xQueue != NULL ) + { + /* Start the two tasks as described at the top of this file. */ + xTaskCreate( prvQueueReceiveTask, "Rx", configMINIMAL_STACK_SIZE, NULL, configQUEUE_RECEIVE_TASK_PRIORITY, NULL ); + xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, configQUEUE_SEND_TASK_PRIORITY, NULL ); + + /* Start the tasks running. */ + vTaskStartScheduler(); + } + + /* If all is well we will never reach here as the scheduler will now be + running. If we do reach here then it is likely that there was insufficient + heap available for the idle task to be created. */ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +static void prvQueueSendTask( void *pvParameters ) +{ +portTickType xNextWakeTime; +const unsigned long ulValueToSend = 100UL; + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for( ;; ) + { + /* Place this task in the blocked state until it is time to run again. + The block state is specified in ticks, the constant used converts ticks + to ms. */ + vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS ); + + /* Send to the queue - causing the queue receive task to flash its LED. 0 + is used so the send does not block - it shouldn't need to as the queue + should always be empty here. */ + xQueueSend( xQueue, &ulValueToSend, 0 ); + } +} +/*-----------------------------------------------------------*/ + +static void prvQueueReceiveTask( void *pvParameters ) +{ +unsigned long ulReceivedValue; + + for( ;; ) + { + /* Wait until something arives in the queue - this will block + indefinitely provided INCLUDE_vTaskSuspend is set to 1 in + FreeRTOSConfig.h. */ + xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY ); + + /* To get here something must have arrived, but is it the expected + value? If it is, toggle the LED. */ + if( ulReceivedValue == 100UL ) + { + vParTestToggleLED( 0 ); + } + } +} +/*-----------------------------------------------------------*/ + +void vApplicationSetupTimerInterrupt( void ) +{ + /* Enable compare match timer 0. */ + MSTP( CMT0 ) = 0; + + /* Interrupt on compare match. */ + CMT0.CMCR.BIT.CMIE = 1; + + /* Set the compare match value. */ + CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 ); + + /* Divide the PCLK by 8. */ + CMT0.CMCR.BIT.CKS = 0; + + /* Enable the interrupt... */ + _IEN( _CMT0_CMI0 ) = 1; + + /* ...and set its priority to the application defined kernel priority. */ + _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY; + + /* Start the timer. */ + CMT.CMSTR0.BIT.STR0 = 1; +} +/*-----------------------------------------------------------*/ + +/* This function is explained by the comments above its prototype at the top +of this file. */ +void vApplicationMallocFailedHook( void ) +{ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +/* This function is explained by the comments above its prototype at the top +of this file. */ +void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName ) +{ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +/* This function is explained by the comments above its prototype at the top +of this file. */ +void vApplicationIdleHook( void ) +{ + /* Just to prevent the variable getting optimised away. */ + ( void ) ulHighFrequencyTickCount; +} +/*-----------------------------------------------------------*/ + +/* The following two functions are here just to allow all three build +configurations to use the same vector table. They are not used in this +demo, but linker errors will result if they are not defined. They can +be ignored. */ +void vT0_1InterruptHandler( void ) {} +void vT2_3InterruptHandler( void ) {} \ No newline at end of file diff --git a/Demo/RX600_RX62N-RDK_IAR/main-full.c b/Demo/RX600_RX62N-RDK_IAR/main-full.c new file mode 100644 index 000000000..abc1ae2e8 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/main-full.c @@ -0,0 +1,534 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* **************************************************************************** + * This project includes a lot of tasks and tests and is therefore complex. + * If you would prefer a much simpler project to get started with then select + * the 'Blinky' build configuration within the HEW IDE. + * **************************************************************************** + * + * Creates all the demo application tasks, then starts the scheduler. The web + * documentation provides more details of the standard demo application tasks, + * which provide no particular functionality but do provide a good example of + * how to use the FreeRTOS API. The tasks defined in flop.c are included in the + * set of standard demo tasks to ensure the floating point unit gets some + * exercise. + * + * In addition to the standard demo tasks, the following tasks and tests are + * defined and/or created within this file: + * + * Webserver ("uIP") task - This serves a number of dynamically generated WEB + * pages to a standard WEB browser. The IP and MAC addresses are configured by + * constants defined at the bottom of FreeRTOSConfig.h. Use either a standard + * Ethernet cable to connect through a hug, or a cross over (point to point) + * cable to connect directly. Ensure the IP address used is compatible with the + * IP address of the machine running the browser - the easiest way to achieve + * this is to ensure the first three octets of the IP addresses are the same. + * + * "Reg test" tasks - These fill the registers with known values, then check + * that each register still contains its expected value. Each task uses + * different values. The tasks run with very low priority so get preempted + * very frequently. A check variable is incremented on each iteration of the + * test loop. A register containing an unexpected value is indicative of an + * error in the context switching mechanism and will result in a branch to a + * null loop - which in turn will prevent the check variable from incrementing + * any further and allow the check task (described below) to determine that an + * error has occurred. The nature of the reg test tasks necessitates that they + * are written in assembly code. + * + * "Check" task - This only executes every five seconds but has a high priority + * to ensure it gets processor time. Its main function is to check that all the + * standard demo tasks are still operational. While no errors have been + * discovered the check task will toggle LED 5 every 5 seconds - the toggle + * rate increasing to 200ms being a visual indication that at least one task has + * reported unexpected behaviour. + * + * "High frequency timer test" - A high frequency periodic interrupt is + * generated using a timer - the interrupt is assigned a priority above + * configMAX_SYSCALL_INTERRUPT_PRIORITY so should not be effected by anything + * the kernel is doing. The frequency and priority of the interrupt, in + * combination with other standard tests executed in this demo, should result + * in interrupts nesting at least 3 and probably 4 deep. This test is only + * included in build configurations that have the optimiser switched on. In + * optimised builds the count of high frequency ticks is used as the time base + * for the run time stats. + * + * *NOTE 1* If LED5 is toggling every 5 seconds then all the demo application + * tasks are executing as expected and no errors have been reported in any + * tasks. The toggle rate increasing to 200ms indicates that at least one task + * has reported unexpected behaviour. + * + * *NOTE 2* vApplicationSetupTimerInterrupt() is called by the kernel to let + * the application set up a timer to generate the tick interrupt. In this + * example a compare match timer is used for this purpose. + * + * *NOTE 3* The CPU must be in Supervisor mode when the scheduler is started. + * The PowerON_Reset_PC() supplied in resetprg.c with this demo has + * Change_PSW_PM_to_UserMode() commented out to ensure this is the case. + * + * *NOTE 4* The IntQueue common demo tasks test interrupt nesting and make use + * of all the 8bit timers (as two cascaded 16bit units). +*/ + +/* Standard includes. */ +#include +#include + +/* Hardware specific includes. */ +#include + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Standard demo includes. */ +#include "partest.h" +#include "flash.h" +#include "IntQueue.h" +#include "BlockQ.h" +#include "death.h" +#include "integer.h" +#include "blocktim.h" +#include "semtest.h" +#include "PollQ.h" +#include "GenQTest.h" +#include "QPeek.h" +#include "recmutex.h" +#include "flop.h" + +/* Values that are passed into the reg test tasks using the task parameter. The +tasks check that the values are passed in correctly. */ +#define mainREG_TEST_1_PARAMETER ( 0x12121212UL ) +#define mainREG_TEST_2_PARAMETER ( 0x12345678UL ) + +/* Priorities at which the tasks are created. */ +#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) +#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) +#define mainFLASH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainuIP_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY ) + +/* The WEB server uses string handling functions, which in turn use a bit more +stack than most of the other tasks. */ +#define mainuIP_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 ) + +/* The LED toggled by the check task. */ +#define mainCHECK_LED ( 5 ) + +/* The rate at which mainCHECK_LED will toggle when all the tasks are running +without error. Controlled by the check task as described at the top of this +file. */ +#define mainNO_ERROR_CYCLE_TIME ( 5000 / portTICK_RATE_MS ) + +/* The rate at which mainCHECK_LED will toggle when an error has been reported +by at least one task. Controlled by the check task as described at the top of +this file. */ +#define mainERROR_CYCLE_TIME ( 200 / portTICK_RATE_MS ) + +/* For outputing debug console messages - just maps to printf. */ +#ifdef DEBUG_BUILD + #define xPrintf( x ) printf( x ) +#else + #define xPrintf( x ) ( void ) x +#endif + +/* + * vApplicationMallocFailedHook() will only be called if + * configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook + * function that will execute if a call to pvPortMalloc() fails. + * pvPortMalloc() is called internally by the kernel whenever a task, queue or + * semaphore is created. It is also called by various parts of the demo + * application. + */ +void vApplicationMallocFailedHook( void ); + +/* + * vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set to 1 + * in FreeRTOSConfig.h. It is a hook function that is called on each iteration + * of the idle task. It is essential that code added to this hook function + * never attempts to block in any way (for example, call xQueueReceive() with + * a block time specified). If the application makes use of the vTaskDelete() + * API function (as this demo application does) then it is also important that + * vApplicationIdleHook() is permitted to return to its calling function because + * it is the responsibility of the idle task to clean up memory allocated by the + * kernel to any task that has since been deleted. + */ +void vApplicationIdleHook( void ); + +/* + * vApplicationStackOverflowHook() will only be called if + * configCHECK_FOR_STACK_OVERFLOW is set to a non-zero value. The handle and + * name of the offending task should be passed in the function parameters, but + * it is possible that the stack overflow will have corrupted these - in which + * case pxCurrentTCB can be inspected to find the same information. + */ +void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName ); + +/* + * The reg test tasks as described at the top of this file. + */ +static void prvRegTest1Task( void *pvParameters ); +static void prvRegTest2Task( void *pvParameters ); + +/* + * The actual implementation of the reg test functionality, which, because of + * the direct register access, have to be in assembly. + */ +extern void prvRegTest1Implementation( void ); +extern void prvRegTest2Implementation( void ); + + +/* + * The check task as described at the top of this file. + */ +static void prvCheckTask( void *pvParameters ); + +/* + * Contains the implementation of the WEB server. + */ +extern void vuIP_Task( void *pvParameters ); + +/*-----------------------------------------------------------*/ + +/* Variables that are incremented on each iteration of the reg test tasks - +provided the tasks have not reported any errors. The check task inspects these +variables to ensure they are still incrementing as expected. If a variable +stops incrementing then it is likely that its associate task has stalled. */ +unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL; + +/* The status message that is displayed at the bottom of the "task stats" web +page, which is served by the uIP task. This will report any errors picked up +by the reg test task. */ +static const char *pcStatusMessage = NULL; + +/*-----------------------------------------------------------*/ + +void main(void) +{ +extern void HardwareSetup( void ); + + /* Renesas provided CPU configuration routine. The clocks are configured in + here. */ + HardwareSetup(); + + xPrintf( "http://www.FreeRTOS.org\r\n" ); + + /* Start the reg test tasks which test the context switching mechanism. */ + xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL ); + + /* The web server task. */ + xTaskCreate( vuIP_Task, "uIP", mainuIP_STACK_SIZE, NULL, mainuIP_TASK_PRIORITY, NULL ); + + /* Start the check task as described at the top of this file. */ + xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE * 3, NULL, mainCHECK_TASK_PRIORITY, NULL ); + + /* Create the standard demo tasks. */ + vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); + vCreateBlockTimeTasks(); + vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); + vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY ); + vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY ); + vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY ); + vStartLEDFlashTasks( mainFLASH_TASK_PRIORITY ); + vStartQueuePeekTasks(); + vStartRecursiveMutexTasks(); + vStartInterruptQueueTasks(); + vStartMathTasks( mainFLOP_TASK_PRIORITY ); + + /* The suicide tasks must be created last as they need to know how many + tasks were running prior to their creation in order to ascertain whether + or not the correct/expected number of tasks are running at any given time. */ + vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY ); + + /* Start the tasks running. */ + vTaskStartScheduler(); + + /* If all is well we will never reach here as the scheduler will now be + running. If we do reach here then it is likely that there was insufficient + heap available for the idle task to be created. */ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +static void prvCheckTask( void *pvParameters ) +{ +static volatile unsigned long ulLastRegTest1CycleCount = 0UL, ulLastRegTest2CycleCount = 0UL; +portTickType xNextWakeTime, xCycleFrequency = mainNO_ERROR_CYCLE_TIME; +extern void vSetupHighFrequencyTimer( void ); + + /* If this is being executed then the kernel has been started. Start the high + frequency timer test as described at the top of this file. This is only + included in the optimised build configuration - otherwise it takes up too much + CPU time. */ + #ifdef INCLUDE_HIGH_FREQUENCY_TIMER_TEST + vSetupHighFrequencyTimer(); + #endif + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for( ;; ) + { + /* Place this task in the blocked state until it is time to run again. */ + vTaskDelayUntil( &xNextWakeTime, xCycleFrequency ); + + /* Check the standard demo tasks are running without error. */ + if( xAreGenericQueueTasksStillRunning() != pdTRUE ) + { + /* Increase the rate at which this task cycles, which will increase the + rate at which mainCHECK_LED flashes to give visual feedback that an error + has occurred. */ + pcStatusMessage = "Error: GenQueue"; + xPrintf( pcStatusMessage ); + } + + if( xAreQueuePeekTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: QueuePeek\r\n"; + xPrintf( pcStatusMessage ); + } + + if( xAreBlockingQueuesStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: BlockQueue\r\n"; + xPrintf( pcStatusMessage ); + } + + if( xAreBlockTimeTestTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: BlockTime\r\n"; + xPrintf( pcStatusMessage ); + } + + if( xAreSemaphoreTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: SemTest\r\n"; + xPrintf( pcStatusMessage ); + } + + if( xArePollingQueuesStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: PollQueue\r\n"; + xPrintf( pcStatusMessage ); + } + + if( xIsCreateTaskStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: Death\r\n"; + xPrintf( pcStatusMessage ); + } + + if( xAreIntegerMathsTaskStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: IntMath\r\n"; + xPrintf( pcStatusMessage ); + } + + if( xAreRecursiveMutexTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: RecMutex\r\n"; + xPrintf( pcStatusMessage ); + } + + if( xAreIntQueueTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: IntQueue\r\n"; + xPrintf( pcStatusMessage ); + } + + if( xAreMathsTaskStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Flop\r\n"; + xPrintf( pcStatusMessage ); + } + + /* Check the reg test tasks are still cycling. They will stop incrementing + their loop counters if they encounter an error. */ + if( ulRegTest1CycleCount == ulLastRegTest1CycleCount ) + { + pcStatusMessage = "Error: RegTest1\r\n"; + xPrintf( pcStatusMessage ); + } + + if( ulRegTest2CycleCount == ulLastRegTest2CycleCount ) + { + pcStatusMessage = "Error: RegTest2\r\n"; + xPrintf( pcStatusMessage ); + } + + ulLastRegTest1CycleCount = ulRegTest1CycleCount; + ulLastRegTest2CycleCount = ulRegTest2CycleCount; + + /* Toggle the check LED to give an indication of the system status. If + the LED toggles every 5 seconds then everything is ok. A faster toggle + indicates an error. */ + vParTestToggleLED( mainCHECK_LED ); + + /* Ensure the LED toggles at a faster rate if an error has occurred. */ + if( pcStatusMessage != NULL ) + { + xCycleFrequency = mainERROR_CYCLE_TIME; + } + } +} +/*-----------------------------------------------------------*/ + +/* The RX port uses this callback function to configure its tick interrupt. +This allows the application to choose the tick interrupt source. */ +void vApplicationSetupTimerInterrupt( void ) +{ + /* Enable compare match timer 0. */ + MSTP( CMT0 ) = 0; + + /* Interrupt on compare match. */ + CMT0.CMCR.BIT.CMIE = 1; + + /* Set the compare match value. */ + CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 ); + + /* Divide the PCLK by 8. */ + CMT0.CMCR.BIT.CKS = 0; + + /* Enable the interrupt... */ + _IEN( _CMT0_CMI0 ) = 1; + + /* ...and set its priority to the application defined kernel priority. */ + _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY; + + /* Start the timer. */ + CMT.CMSTR0.BIT.STR0 = 1; +} +/*-----------------------------------------------------------*/ + +/* This function is explained by the comments above its prototype at the top +of this file. */ +void vApplicationMallocFailedHook( void ) +{ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +/* This function is explained by the comments above its prototype at the top +of this file. */ +void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName ) +{ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +/* This function is explained by the comments above its prototype at the top +of this file. */ +void vApplicationIdleHook( void ) +{ +} +/*-----------------------------------------------------------*/ + +/* This function is explained in the comments at the top of this file. */ +static void prvRegTest1Task( void *pvParameters ) +{ + if( ( ( unsigned long ) pvParameters ) != mainREG_TEST_1_PARAMETER ) + { + /* The parameter did not contain the expected value. */ + for( ;; ) + { + /* Stop the tick interrupt so its obvious something has gone wrong. */ + taskDISABLE_INTERRUPTS(); + } + } + + /* This is an asm function that never returns. */ + prvRegTest1Implementation(); +} +/*-----------------------------------------------------------*/ + +/* This function is explained in the comments at the top of this file. */ +static void prvRegTest2Task( void *pvParameters ) +{ + if( ( ( unsigned long ) pvParameters ) != mainREG_TEST_2_PARAMETER ) + { + /* The parameter did not contain the expected value. */ + for( ;; ) + { + /* Stop the tick interrupt so its obvious something has gone wrong. */ + taskDISABLE_INTERRUPTS(); + } + } + + /* This is an asm function that never returns. */ + prvRegTest2Implementation(); +} +/*-----------------------------------------------------------*/ + +char *pcGetTaskStatusMessage( void ) +{ + /* Not bothered about a critical section here although technically because of + the task priorities the pointer could change it will be atomic if not near + atomic and its not critical. */ + if( pcStatusMessage == NULL ) + { + return "All tasks running without error"; + } + else + { + return ( char * ) pcStatusMessage; + } +} +/*-----------------------------------------------------------*/ + + diff --git a/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.cspy.bat b/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.cspy.bat new file mode 100644 index 000000000..b5065a38e --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.cspy.bat @@ -0,0 +1,33 @@ +@REM This bat file has been generated by the IAR Embeddded Workbench +@REM C-SPY interactive debugger,as an aid to preparing a command +@REM line for running the cspybat command line utility with the +@REM appropriate settings. +@REM +@REM After making some adjustments to this file, you can launch cspybat +@REM by typing the name of this file followed by the name of the debug +@REM file (usually an ubrof file). Note that this file is generated +@REM every time a new debug session is initialized, so you may want to +@REM move or rename the file before making changes. +@REM +@REM Note: some command line arguments cannot be properly generated +@REM by this process. Specifically, the plugin which is responsible +@REM for the Terminal I/O window (and other C runtime functionality) +@REM comes in a special version for cspybat, and the name of that +@REM plugin dll is not known when generating this file. It resides in +@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or +@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding +@REM tool chain. Replace the '' parameter +@REM below with the appropriate file name. Other plugins loaded by +@REM C-SPY are usually not needed by, or will not work in, cspybat +@REM but they are listed at the end of this file for reference. + + +"C:\devtools\IAR Systems\Embedded Workbench 6.0\common\bin\cspybat" "C:\devtools\IAR Systems\Embedded Workbench 6.0\rx\bin\rxproc.dll" "C:\devtools\IAR Systems\Embedded Workbench 6.0\rx\bin\rxemue20.dll" %1 --plugin "C:\devtools\IAR Systems\Embedded Workbench 6.0\rx\bin\" --backend -B "--core" "RX600" "-p" "C:\devtools\IAR Systems\Embedded Workbench 6.0\rx\config\debugger\ior5f562n8.ddf" "--double" "32" "--endian" "l" "--int" "32" "-d" "emue20" "--emu" "jlink" "--drv_communication" "USB" "--verify_download" "all" + + +@REM Loaded plugins: +@REM rxLibSupport.dll +@REM C:\devtools\IAR Systems\Embedded Workbench 6.0\common\plugins\CodeCoverage\CodeCoverage.dll +@REM C:\devtools\IAR Systems\Embedded Workbench 6.0\common\plugins\Profiling\Profiling.dll +@REM C:\devtools\IAR Systems\Embedded Workbench 6.0\common\plugins\stack\stack.dll +@REM C:\devtools\IAR Systems\Embedded Workbench 6.0\common\plugins\SymList\SymList.dll diff --git a/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.dbgdt b/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.dbgdt new file mode 100644 index 000000000..5ed809c08 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.dbgdt @@ -0,0 +1,63 @@ + + + + + + + + + 300BuildBreakpoints201622 + + + + + + 20121632481300Debug-LogBreakpoints + + + + + + + 164272727 + + + + + + 200100 + 200ethfifo-status4struct Descriptor-status420020916610010030010300Debug-LogBuild200110$PROJ_DIR$\TermIOInput.txt10 + + + + + + + + TabID-20000-3827 + Workspace + Workspace + + + RTOSDemoRTOSDemo/FreeRTOS SourceRTOSDemo/FreeRTOS Source/Portable Layer + + + + 0TabID-2655-13188Debug LogDebug-Log0 + + + + + + TextEditor$WS_DIR$\main-full.c032512555125550TextEditor$WS_DIR$\ParTest.c05234093409TextEditor$WS_DIR$\IntQueueTimer.c03634723492TextEditor$WS_DIR$\Renesas-Files\hwsetup.c02221192119TextEditor$WS_DIR$\webserver\phy.c02221482148TextEditor$WS_DIR$\..\Common\Minimal\flop.c021490589058TextEditor$WS_DIR$\..\..\Source\queue.c039837351373510100000010000001 + + + + + + + iaridepm.enu1debuggergui.enu1-2-2740238-2-212114172024143585142857755601-2-21981682-2-216842001002381203666119048203666 + + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.dni b/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.dni new file mode 100644 index 000000000..04a79e7a4 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.dni @@ -0,0 +1,55 @@ +[E20] +TimeConnected=1284374325 +ComuniDllSave=87228416 +FfwnsdDllSave=87293952 +ChipName=R5F562N8 +CpuMode=0 +InputClock=12.500000 +WorkRamStart=12288 +JtagClock=10 +DebugFlags=0,0 +EmulatorMode=0 +NeedInit=1 +[DebugChecksum] +Checksum=-1439406671 +[DisAssemblyWindow] +NumStates=_ 1 +State 1=_ 1 +[InstructionProfiling] +Enabled=_ 0 +[CodeCoverage] +Enabled=_ 0 +[Profiling] +Enabled=0 +[StackPlugin] +Enabled=1 +OverflowWarningsEnabled=1 +WarningThreshold=90 +SpWarningsEnabled=0 +WarnHow=0 +UseTrigger=1 +TriggerName=main +LimitSize=0 +ByteLimit=50 +[Log file] +LoggingEnabled=_ 0 +LogFile=_ "" +Category=_ 0 +[TermIOLog] +LoggingEnabled=_ 0 +LogFile=_ "" +[DriverProfiling] +Enabled=0 +Source=2 +Graph=0 +[Breakpoints] +Count=0 +[Monitor Execution] +Leave target running=0 +Release target=0 +[Aliases] +Count=0 +SuppressDialog=0 +[TraceHelper] +Enabled=0 +ShowSource=1 diff --git a/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.wsdt b/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.wsdt new file mode 100644 index 000000000..f04cf465b --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/settings/RTOSDemo.wsdt @@ -0,0 +1,67 @@ + + + + + + RTOSDemo/Debug-with-optimisation + + + + + + + + + 277272727 + + + + + + + 20121632481 + + 181624 + + + + + + + TabID-10758-3386 + Workspace + Workspace + + + RTOSDemo + + + + 0 + + + TabID-16801-3477 + Build + Build + + + TabID-414-15843BreakpointsBreakpointsTabID-3320-15993Debug LogDebug-Log + + 0 + + + + + + TextEditor$WS_DIR$\main-full.c032512555125550TextEditor$WS_DIR$\ParTest.c05234093409TextEditor$WS_DIR$\IntQueueTimer.c03634723492TextEditor$WS_DIR$\Renesas-Files\hwsetup.c02221192119TextEditor$WS_DIR$\webserver\phy.c02221482148TextEditor$WS_DIR$\..\Common\Minimal\flop.c021490589058TextEditor$WS_DIR$\..\..\Source\queue.c039837351373510100000010000001 + + + + + + + iaridepm.enu1-2-2706351-2-2331284197024289206210119720978-2-22321682-2-216842341002381238289197024289206 + + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/uIP_Task.c b/Demo/RX600_RX62N-RDK_IAR/uIP_Task.c new file mode 100644 index 000000000..8a1ad0e3b --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/uIP_Task.c @@ -0,0 +1,270 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* Standard includes. */ +#include + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* uip includes. */ +#include "net/uip.h" +#include "net/uip_arp.h" +#include "apps/httpd/httpd.h" +#include "sys/timer.h" +#include "net/clock-arch.h" +#include "r_ether.h" + +/* Demo includes. */ +#include "ParTest.h" + +/*-----------------------------------------------------------*/ + +/* How long to wait before attempting to connect the MAC again. */ +#define uipINIT_WAIT ( 100 / portTICK_RATE_MS ) + +/* Shortcut to the header within the Rx buffer. */ +#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ]) + +/* Standard constant. */ +#define uipTOTAL_FRAME_HEADER_SIZE 54 + +/*-----------------------------------------------------------*/ + +/* + * Setup the MAC address in the MAC itself, and in the uIP stack. + */ +static void prvSetMACAddress( void ); + +/* + * Port functions required by the uIP stack. + */ +void clock_init( void ); +clock_time_t clock_time( void ); + +/*-----------------------------------------------------------*/ + +/* The semaphore used by the ISR to wake the uIP task. */ +xSemaphoreHandle xEMACSemaphore = NULL; + +/*-----------------------------------------------------------*/ + +void clock_init(void) +{ + /* This is done when the scheduler starts. */ +} +/*-----------------------------------------------------------*/ + +clock_time_t clock_time( void ) +{ + return xTaskGetTickCount(); +} +/*-----------------------------------------------------------*/ + +void vuIP_Task( void *pvParameters ) +{ +portBASE_TYPE i, xDoneSomething; +uip_ipaddr_t xIPAddr; +struct timer periodic_timer, arp_timer; + + ( void ) pvParameters; + + /* Initialise the uIP stack. */ + timer_set( &periodic_timer, configTICK_RATE_HZ / 2 ); + timer_set( &arp_timer, configTICK_RATE_HZ * 10 ); + uip_init(); + uip_ipaddr( &xIPAddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 ); + uip_sethostaddr( &xIPAddr ); + uip_ipaddr( &xIPAddr, configNET_MASK0, configNET_MASK1, configNET_MASK2, configNET_MASK3 ); + uip_setnetmask( &xIPAddr ); + prvSetMACAddress(); + httpd_init(); + + /* Create the semaphore used to wake the uIP task. */ + vSemaphoreCreateBinary( xEMACSemaphore ); + + /* Initialise the MAC. */ + vInitEmac(); + + while( lEMACWaitForLink() != pdPASS ) + { + vTaskDelay( uipINIT_WAIT ); + } + + for( ;; ) + { + xDoneSomething = pdFALSE; + + /* Is there received data ready to be processed? */ + uip_len = ( unsigned short ) ulEMACRead(); + + if( ( uip_len > 0 ) && ( uip_buf != NULL ) ) + { + /* Standard uIP loop taken from the uIP manual. */ + if( xHeader->type == htons( UIP_ETHTYPE_IP ) ) + { + uip_arp_ipin(); + uip_input(); + + /* If the above function invocation resulted in data that + should be sent out on the network, the global variable + uip_len is set to a value > 0. */ + if( uip_len > 0 ) + { + uip_arp_out(); + vEMACWrite(); + } + + xDoneSomething = pdTRUE; + } + else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) ) + { + uip_arp_arpin(); + + /* If the above function invocation resulted in data that + should be sent out on the network, the global variable + uip_len is set to a value > 0. */ + if( uip_len > 0 ) + { + vEMACWrite(); + } + + xDoneSomething = pdTRUE; + } + } + + if( timer_expired( &periodic_timer ) && ( uip_buf != NULL ) ) + { + timer_reset( &periodic_timer ); + for( i = 0; i < UIP_CONNS; i++ ) + { + uip_periodic( i ); + + /* If the above function invocation resulted in data that + should be sent out on the network, the global variable + uip_len is set to a value > 0. */ + if( uip_len > 0 ) + { + uip_arp_out(); + vEMACWrite(); + } + } + + /* Call the ARP timer function every 10 seconds. */ + if( timer_expired( &arp_timer ) ) + { + timer_reset( &arp_timer ); + uip_arp_timer(); + } + + xDoneSomething = pdTRUE; + } + + if( xDoneSomething == pdFALSE ) + { + /* We did not receive a packet, and there was no periodic + processing to perform. Block for a fixed period. If a packet + is received during this period we will be woken by the ISR + giving us the Semaphore. */ + xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 20 ); + } + } +} +/*-----------------------------------------------------------*/ + +static void prvSetMACAddress( void ) +{ +struct uip_eth_addr xAddr; + + /* Configure the MAC address in the uIP stack. */ + xAddr.addr[ 0 ] = configMAC_ADDR0; + xAddr.addr[ 1 ] = configMAC_ADDR1; + xAddr.addr[ 2 ] = configMAC_ADDR2; + xAddr.addr[ 3 ] = configMAC_ADDR3; + xAddr.addr[ 4 ] = configMAC_ADDR4; + xAddr.addr[ 5 ] = configMAC_ADDR5; + uip_setethaddr( xAddr ); +} +/*-----------------------------------------------------------*/ + +void vApplicationProcessFormInput( char *pcInputString ) +{ +char *c; + + /* Process the form input sent by the IO page of the served HTML. */ + + c = strstr( pcInputString, "?" ); + if( c ) + { + /* Turn the LED's on or off in accordance with the check box status. */ + if( strstr( c, "LED0=1" ) != NULL ) + { + /* Turn LEDs on. */ + vParTestSetLED( 7, 1 ); + vParTestSetLED( 8, 1 ); + vParTestSetLED( 9, 1 ); + vParTestSetLED( 10, 1 ); + } + else + { + /* Turn LED 4 off. */ + vParTestSetLED( 7, 0 ); + vParTestSetLED( 8, 0 ); + vParTestSetLED( 9, 0 ); + vParTestSetLED( 10, 0 ); + } + } +} + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/EMAC.c b/Demo/RX600_RX62N-RDK_IAR/webserver/EMAC.c new file mode 100644 index 000000000..9b844670c --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/EMAC.c @@ -0,0 +1,555 @@ +/* + FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd. + + *************************************************************************** + * * + * If you are: * + * * + * + New to FreeRTOS, * + * + Wanting to learn FreeRTOS or multitasking in general quickly * + * + Looking for basic training, * + * + Wanting to improve your FreeRTOS skills and productivity * + * * + * then take a look at the FreeRTOS eBook * + * * + * "Using the FreeRTOS Real Time Kernel - a Practical Guide" * + * http://www.FreeRTOS.org/Documentation * + * * + * A pdf reference manual is also available. Both are usually delivered * + * to your inbox within 20 minutes to two hours when purchased between 8am * + * and 8pm GMT (although please allow up to 24 hours in case of * + * exceptional circumstances). Thank you for your support! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + ***NOTE*** The exception to the GPL is included to allow you to distribute + a combined work that includes FreeRTOS without being obliged to provide the + source code for proprietary components outside of the FreeRTOS kernel. + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* Hardware specific includes. */ +#include +#include "typedefine.h" +#include "r_ether.h" +#include "phy.h" + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* uIP includes. */ +#include "net/uip.h" + +/* The time to wait between attempts to obtain a free buffer. */ +#define emacBUFFER_WAIT_DELAY_ms ( 3 / portTICK_RATE_MS ) + +/* The number of times emacBUFFER_WAIT_DELAY_ms should be waited before giving +up on attempting to obtain a free buffer all together. */ +#define emacBUFFER_WAIT_ATTEMPTS ( 30 ) + +/* The number of Rx descriptors. */ +#define emacNUM_RX_DESCRIPTORS 8 + +/* The number of Tx descriptors. When using uIP there is not point in having +more than two. */ +#define emacNUM_TX_BUFFERS 2 + +/* The total number of EMAC buffers to allocate. */ +#define emacNUM_BUFFERS ( emacNUM_RX_DESCRIPTORS + emacNUM_TX_BUFFERS ) + +/* The time to wait for the Tx descriptor to become free. */ +#define emacTX_WAIT_DELAY_ms ( 10 / portTICK_RATE_MS ) + +/* The total number of times to wait emacTX_WAIT_DELAY_ms for the Tx descriptor to +become free. */ +#define emacTX_WAIT_ATTEMPTS ( 50 ) + +/* Only Rx end and Tx end interrupts are used by this driver. */ +#define emacTX_END_INTERRUPT ( 1UL << 21UL ) +#define emacRX_END_INTERRUPT ( 1UL << 18UL ) + +/*-----------------------------------------------------------*/ + +/* The buffers and descriptors themselves. */ +#pragma data_alignment=32 +volatile ethfifo xRxDescriptors[ emacNUM_RX_DESCRIPTORS ]; + +#pragma data_alignment=32 +volatile ethfifo xTxDescriptors[ emacNUM_TX_BUFFERS ]; + +#pragma data_alignment=32 +char xEthernetBuffers[ emacNUM_BUFFERS ][ UIP_BUFSIZE ]; + + +/* Used to indicate which buffers are free and which are in use. If an index +contains 0 then the corresponding buffer in xEthernetBuffers is free, otherwise +the buffer is in use or about to be used. */ +static unsigned char ucBufferInUse[ emacNUM_BUFFERS ]; + +/*-----------------------------------------------------------*/ + +/* + * Initialise both the Rx and Tx descriptors. + */ +static void prvInitialiseDescriptors( void ); + +/* + * Return a pointer to a free buffer within xEthernetBuffers. + */ +static unsigned char *prvGetNextBuffer( void ); + +/* + * Return a buffer to the list of free buffers. + */ +static void prvReturnBuffer( unsigned char *pucBuffer ); + +/* + * Examine the status of the next Rx FIFO to see if it contains new data. + */ +static unsigned long prvCheckRxFifoStatus( void ); + +/* + * Setup the microcontroller for communication with the PHY. + */ +static void prvResetMAC( void ); + +/* + * Configure the Ethernet interface peripherals. + */ +static void prvConfigureEtherCAndEDMAC( void ); + +/* + * Something has gone wrong with the descriptor usage. Reset all the buffers + * and descriptors. + */ +static void prvResetEverything( void ); + +/*-----------------------------------------------------------*/ + +/* Points to the Rx descriptor currently in use. */ +static volatile ethfifo *pxCurrentDesc = NULL; + +/* The buffer used by the uIP stack to both receive and send. This points to +one of the Ethernet buffers when its actually in use. */ +unsigned char *uip_buf = NULL; + +/*-----------------------------------------------------------*/ + +void vInitEmac( void ) +{ + /* Software reset. */ + prvResetMAC(); + + /* Set the Rx and Tx descriptors into their initial state. */ + prvInitialiseDescriptors(); + + /* Set the MAC address into the ETHERC */ + ETHERC.MAHR = ( ( unsigned long ) configMAC_ADDR0 << 24UL ) | + ( ( unsigned long ) configMAC_ADDR1 << 16UL ) | + ( ( unsigned long ) configMAC_ADDR2 << 8UL ) | + ( unsigned long ) configMAC_ADDR3; + + ETHERC.MALR.BIT.MA = ( ( unsigned long ) configMAC_ADDR4 << 8UL ) | + ( unsigned long ) configMAC_ADDR5; + + /* Perform rest of interface hardware configuration. */ + prvConfigureEtherCAndEDMAC(); + + /* Nothing received yet, so uip_buf points nowhere. */ + uip_buf = NULL; + + /* Initialize the PHY */ + phy_init(); +} +/*-----------------------------------------------------------*/ + +void vEMACWrite( void ) +{ +long x; + + /* Wait until the second transmission of the last packet has completed. */ + for( x = 0; x < emacTX_WAIT_ATTEMPTS; x++ ) + { + if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 ) + { + /* Descriptor is still active. */ + vTaskDelay( emacTX_WAIT_DELAY_ms ); + } + else + { + break; + } + } + + /* Is the descriptor free after waiting for it? */ + if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 ) + { + /* Something has gone wrong. */ + prvResetEverything(); + } + + /* Setup both descriptors to transmit the frame. */ + xTxDescriptors[ 0 ].buf_p = ( char * ) uip_buf; + xTxDescriptors[ 0 ].bufsize = uip_len; + xTxDescriptors[ 1 ].buf_p = ( char * ) uip_buf; + xTxDescriptors[ 1 ].bufsize = uip_len; + + /* uip_buf is being sent by the Tx descriptor. Allocate a new buffer + for use by the stack. */ + uip_buf = prvGetNextBuffer(); + + /* Clear previous settings and go. */ + xTxDescriptors[0].status &= ~( FP1 | FP0 ); + xTxDescriptors[0].status |= ( FP1 | FP0 | ACT ); + xTxDescriptors[1].status &= ~( FP1 | FP0 ); + xTxDescriptors[1].status |= ( FP1 | FP0 | ACT ); + + EDMAC.EDTRR.LONG = 0x00000001; +} +/*-----------------------------------------------------------*/ + +unsigned long ulEMACRead( void ) +{ +unsigned long ulBytesReceived; + + ulBytesReceived = prvCheckRxFifoStatus(); + + if( ulBytesReceived > 0 ) + { + pxCurrentDesc->status &= ~( FP1 | FP0 ); + pxCurrentDesc->status |= ACT; + + if( EDMAC.EDRRR.LONG == 0x00000000L ) + { + /* Restart Ethernet if it has stopped */ + EDMAC.EDRRR.LONG = 0x00000001L; + } + + /* Mark the pxDescriptor buffer as free as uip_buf is going to be set to + the buffer that contains the received data. */ + prvReturnBuffer( uip_buf ); + + uip_buf = ( void * ) pxCurrentDesc->buf_p; + + /* Move onto the next buffer in the ring. */ + pxCurrentDesc = pxCurrentDesc->next; + } + + return ulBytesReceived; +} +/*-----------------------------------------------------------*/ + +long lEMACWaitForLink( void ) +{ +long lReturn; + + /* Set the link status. */ + switch( phy_set_autonegotiate() ) + { + /* Half duplex link */ + case PHY_LINK_100H: + ETHERC.ECMR.BIT.DM = 0; + ETHERC.ECMR.BIT.RTM = 1; + lReturn = pdPASS; + break; + + case PHY_LINK_10H: + ETHERC.ECMR.BIT.DM = 0; + ETHERC.ECMR.BIT.RTM = 0; + lReturn = pdPASS; + break; + + + /* Full duplex link */ + case PHY_LINK_100F: + ETHERC.ECMR.BIT.DM = 1; + ETHERC.ECMR.BIT.RTM = 1; + lReturn = pdPASS; + break; + + case PHY_LINK_10F: + ETHERC.ECMR.BIT.DM = 1; + ETHERC.ECMR.BIT.RTM = 0; + lReturn = pdPASS; + break; + + default: + lReturn = pdFAIL; + break; + } + + if( lReturn == pdPASS ) + { + /* Enable receive and transmit. */ + ETHERC.ECMR.BIT.RE = 1; + ETHERC.ECMR.BIT.TE = 1; + + /* Enable EDMAC receive */ + EDMAC.EDRRR.LONG = 0x1; + } + + return lReturn; +} +/*-----------------------------------------------------------*/ + +static void prvInitialiseDescriptors( void ) +{ +volatile ethfifo *pxDescriptor; +long x; + + for( x = 0; x < emacNUM_BUFFERS; x++ ) + { + /* Ensure none of the buffers are shown as in use at the start. */ + ucBufferInUse[ x ] = pdFALSE; + } + + /* Initialise the Rx descriptors. */ + for( x = 0; x < emacNUM_RX_DESCRIPTORS; x++ ) + { + pxDescriptor = &( xRxDescriptors[ x ] ); + pxDescriptor->buf_p = &( xEthernetBuffers[ x ][ 0 ] ); + + pxDescriptor->bufsize = UIP_BUFSIZE; + pxDescriptor->size = 0; + pxDescriptor->status = ACT; + pxDescriptor->next = ( ethfifo * ) &xRxDescriptors[ x + 1 ]; + + /* Mark this buffer as in use. */ + ucBufferInUse[ x ] = pdTRUE; + } + + /* The last descriptor points back to the start. */ + pxDescriptor->status |= DL; + pxDescriptor->next = ( ethfifo * ) &xRxDescriptors[ 0 ]; + + /* Initialise the Tx descriptors. */ + for( x = 0; x < emacNUM_TX_BUFFERS; x++ ) + { + pxDescriptor = &( xTxDescriptors[ x ] ); + + /* A buffer is not allocated to the Tx descriptor until a send is + actually required. */ + pxDescriptor->buf_p = NULL; + + pxDescriptor->bufsize = UIP_BUFSIZE; + pxDescriptor->size = 0; + pxDescriptor->status = 0; + pxDescriptor->next = ( ethfifo * ) &xTxDescriptors[ x + 1 ]; + } + + /* The last descriptor points back to the start. */ + pxDescriptor->status |= DL; + pxDescriptor->next = ( ethfifo * ) &( xTxDescriptors[ 0 ] ); + + /* Use the first Rx descriptor to start with. */ + pxCurrentDesc = &( xRxDescriptors[ 0 ] ); +} +/*-----------------------------------------------------------*/ + +static unsigned char *prvGetNextBuffer( void ) +{ +long x; +unsigned char *pucReturn = NULL; +unsigned long ulAttempts = 0; + + while( pucReturn == NULL ) + { + /* Look through the buffers to find one that is not in use by + anything else. */ + for( x = 0; x < emacNUM_BUFFERS; x++ ) + { + if( ucBufferInUse[ x ] == pdFALSE ) + { + ucBufferInUse[ x ] = pdTRUE; + pucReturn = ( unsigned char * ) &( xEthernetBuffers[ x ][ 0 ] ); + break; + } + } + + /* Was a buffer found? */ + if( pucReturn == NULL ) + { + ulAttempts++; + + if( ulAttempts >= emacBUFFER_WAIT_ATTEMPTS ) + { + break; + } + + /* Wait then look again. */ + vTaskDelay( emacBUFFER_WAIT_DELAY_ms ); + } + } + + return pucReturn; +} +/*-----------------------------------------------------------*/ + +static void prvReturnBuffer( unsigned char *pucBuffer ) +{ +unsigned long ul; + + /* Return a buffer to the pool of free buffers. */ + for( ul = 0; ul < emacNUM_BUFFERS; ul++ ) + { + if( &( xEthernetBuffers[ ul ][ 0 ] ) == ( void * ) pucBuffer ) + { + ucBufferInUse[ ul ] = pdFALSE; + break; + } + } +} +/*-----------------------------------------------------------*/ + +static void prvResetEverything( void ) +{ + /* Temporary code just to see if this gets called. This function has not + been implemented. */ + portDISABLE_INTERRUPTS(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +static unsigned long prvCheckRxFifoStatus( void ) +{ +unsigned long ulReturn = 0; + + if( ( pxCurrentDesc->status & ACT ) != 0 ) + { + /* Current descriptor is still active. */ + } + else if( ( pxCurrentDesc->status & FE ) != 0 ) + { + /* Frame error. Clear the error. */ + pxCurrentDesc->status &= ~( FP1 | FP0 | FE ); + pxCurrentDesc->status &= ~( RMAF | RRF | RTLF | RTSF | PRE | CERF ); + pxCurrentDesc->status |= ACT; + pxCurrentDesc = pxCurrentDesc->next; + + if( EDMAC.EDRRR.LONG == 0x00000000UL ) + { + /* Restart Ethernet if it has stopped. */ + EDMAC.EDRRR.LONG = 0x00000001UL; + } + } + else + { + /* The descriptor contains a frame. Because of the size of the buffers + the frame should always be complete. */ + if( ( pxCurrentDesc->status & FP0 ) == FP0 ) + { + ulReturn = pxCurrentDesc->size; + } + else + { + /* Do not expect to get here. */ + prvResetEverything(); + } + } + + return ulReturn; +} +/*-----------------------------------------------------------*/ + +static void prvResetMAC( void ) +{ + /* Ensure the EtherC and EDMAC are enabled. */ + SYSTEM.MSTPCRB.BIT.MSTPB15 = 0; + vTaskDelay( 100 / portTICK_RATE_MS ); + + EDMAC.EDMR.BIT.SWR = 1; + + /* Crude wait for reset to complete. */ + vTaskDelay( 500 / portTICK_RATE_MS ); +} +/*-----------------------------------------------------------*/ + +static void prvConfigureEtherCAndEDMAC( void ) +{ + /* Initialisation code taken from Renesas example project. */ + + /* TODO: Check bit 5 */ + ETHERC.ECSR.LONG = 0x00000037; /* Clear all ETHERC statuS BFR, PSRTO, LCHNG, MPD, ICD */ + + /* Set the EDMAC interrupt priority. */ + _IPR( _ETHER_EINT ) = configKERNEL_INTERRUPT_PRIORITY; + + /* TODO: Check bit 5 */ + /* Enable interrupts of interest only. */ + EDMAC.EESIPR.LONG = emacTX_END_INTERRUPT | emacRX_END_INTERRUPT; + ETHERC.RFLR.LONG = 1518; /* Ether payload is 1500+ CRC */ + ETHERC.IPGR.LONG = 0x00000014; /* Intergap is 96-bit time */ + + /* EDMAC */ + EDMAC.EESR.LONG = 0x47FF0F9F; /* Clear all ETHERC and EDMAC status bits */ + #if __LITTLE_ENDIAN__ == 1 + EDMAC.EDMR.BIT.DE = 1; + #endif + EDMAC.RDLAR = ( void * ) pxCurrentDesc; /* Initialaize Rx Descriptor List Address */ + EDMAC.TDLAR = ( void * ) &( xTxDescriptors[ 0 ] );/* Initialaize Tx Descriptor List Address */ + EDMAC.TRSCER.LONG = 0x00000000; /* Copy-back status is RFE & TFE only */ + EDMAC.TFTR.LONG = 0x00000000; /* Threshold of Tx_FIFO */ + EDMAC.FDR.LONG = 0x00000000; /* Transmit fifo & receive fifo is 256 bytes */ + EDMAC.RMCR.LONG = 0x00000003; /* Receive function is normal mode(continued) */ + + /* Enable the interrupt... */ + _IEN( _ETHER_EINT ) = 1; +} +/*-----------------------------------------------------------*/ + +#pragma vector = VECT_ETHER_EINT +__interrupt void vEMAC_ISR_Handler( void ) +{ +unsigned long ul = EDMAC.EESR.LONG; +long lHigherPriorityTaskWoken = pdFALSE; +extern xSemaphoreHandle xEMACSemaphore; +static long ulTxEndInts = 0; + + /* Has a Tx end occurred? */ + if( ul & emacTX_END_INTERRUPT ) + { + ++ulTxEndInts; + if( ulTxEndInts >= 2 ) + { + /* Only return the buffer to the pool once both Txes have completed. */ + prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p ); + ulTxEndInts = 0; + } + EDMAC.EESR.LONG = emacTX_END_INTERRUPT; + } + + /* Has an Rx end occurred? */ + if( ul & emacRX_END_INTERRUPT ) + { + /* Make sure the Ethernet task is not blocked waiting for a packet. */ + xSemaphoreGiveFromISR( xEMACSemaphore, &lHigherPriorityTaskWoken ); + portYIELD_FROM_ISR( lHigherPriorityTaskWoken ); + EDMAC.EESR.LONG = emacRX_END_INTERRUPT; + } +} + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-cgi.c b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-cgi.c new file mode 100644 index 000000000..432f957bb --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-cgi.c @@ -0,0 +1,277 @@ +/** + * \addtogroup httpd + * @{ + */ + +/** + * \file + * Web server script interface + * \author + * Adam Dunkels + * + */ + +/* + * Copyright (c) 2001-2006, Adam Dunkels. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * This file is part of the uIP TCP/IP stack. + * + * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $ + * + */ +#include "net/uip.h" +#include "net/psock.h" +#include "apps/httpd/httpd.h" +#include "apps/httpd/httpd-cgi.h" +#include "apps/httpd/httpd-fs.h" + +#include +#include + +#include "FreeRTOS.h" +#include "task.h" + +HTTPD_CGI_CALL( file, "file-stats", file_stats ); +HTTPD_CGI_CALL( tcp, "tcp-connections", tcp_stats ); +HTTPD_CGI_CALL( net, "net-stats", net_stats ); +HTTPD_CGI_CALL( rtos, "rtos-stats", rtos_stats ); +HTTPD_CGI_CALL( run, "run-time", run_time ); +HTTPD_CGI_CALL( io, "led-io", led_io ); + +static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &run, &io, NULL }; + +/*---------------------------------------------------------------------------*/ +static PT_THREAD( nullfunction ( struct httpd_state *s, char *ptr ) ) +{ + PSOCK_BEGIN( &s->sout ); + ( void ) ptr; + ( void ) PT_YIELD_FLAG; + PSOCK_END( &s->sout ); +} + +/*---------------------------------------------------------------------------*/ +httpd_cgifunction httpd_cgi( char *name ) +{ + const struct httpd_cgi_call **f; + + /* Find the matching name in the table, return the function. */ + for( f = calls; *f != NULL; ++f ) + { + if( strncmp((*f)->name, name, strlen((*f)->name)) == 0 ) + { + return( *f )->function; + } + } + + return nullfunction; +} + +/*---------------------------------------------------------------------------*/ +static unsigned short generate_file_stats( void *arg ) +{ + char *f = ( char * ) arg; + return sprintf( ( char * ) uip_appdata, "%5u", httpd_fs_count(f) ); +} + +/*---------------------------------------------------------------------------*/ +static PT_THREAD( file_stats ( struct httpd_state *s, char *ptr ) ) +{ + PSOCK_BEGIN( &s->sout ); + + ( void ) PT_YIELD_FLAG; + + PSOCK_GENERATOR_SEND( &s->sout, generate_file_stats, strchr(ptr, ' ') + 1 ); + + PSOCK_END( &s->sout ); +} + +/*---------------------------------------------------------------------------*/ +static const char closed[] = /* "CLOSED",*/ { 0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0 }; +static const char syn_rcvd[] = /* "SYN-RCVD",*/ { 0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56, 0x44, 0 }; +static const char syn_sent[] = /* "SYN-SENT",*/ { 0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e, 0x54, 0 }; +static const char established[] = /* "ESTABLISHED",*/ { 0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48, 0x45, 0x44, 0 }; +static const char fin_wait_1[] = /* "FIN-WAIT-1",*/ { 0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49, 0x54, 0x2d, 0x31, 0 }; +static const char fin_wait_2[] = /* "FIN-WAIT-2",*/ { 0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49, 0x54, 0x2d, 0x32, 0 }; +static const char closing[] = /* "CLOSING",*/ { 0x43, 0x4c, 0x4f, 0x53, 0x49, 0x4e, 0x47, 0 }; +static const char time_wait[] = /* "TIME-WAIT,"*/ { 0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41, 0x49, 0x54, 0 }; +static const char last_ack[] = /* "LAST-ACK"*/ { 0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43, 0x4b, 0 }; + +static const char *states[] = { closed, syn_rcvd, syn_sent, established, fin_wait_1, fin_wait_2, closing, time_wait, last_ack }; + +static unsigned short generate_tcp_stats( void *arg ) +{ + struct uip_conn *conn; + struct httpd_state *s = ( struct httpd_state * ) arg; + + conn = &uip_conns[s->count]; + return sprintf( ( char * ) uip_appdata, + "%d%u.%u.%u.%u:%u%s%u%u%c %c\r\n", htons(conn->lport), + htons(conn->ripaddr.u16[0]) >> 8, htons(conn->ripaddr.u16[0]) & 0xff, htons(conn->ripaddr.u16[1]) >> 8, + htons(conn->ripaddr.u16[1]) & 0xff, htons(conn->rport), states[conn->tcpstateflags & UIP_TS_MASK], conn->nrtx, conn->timer, + (uip_outstanding(conn)) ? '*' : ' ', (uip_stopped(conn)) ? '!' : ' ' ); +} + +/*---------------------------------------------------------------------------*/ +static PT_THREAD( tcp_stats ( struct httpd_state *s, char *ptr ) ) +{ + PSOCK_BEGIN( &s->sout ); + ( void ) ptr; + ( void ) PT_YIELD_FLAG; + for( s->count = 0; s->count < UIP_CONNS; ++s->count ) + { + if( (uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED ) + { + PSOCK_GENERATOR_SEND( &s->sout, generate_tcp_stats, s ); + } + } + + PSOCK_END( &s->sout ); +} + +/*---------------------------------------------------------------------------*/ +static unsigned short generate_net_stats( void *arg ) +{ + struct httpd_state *s = ( struct httpd_state * ) arg; + return sprintf( ( char * ) uip_appdata, "%5u\n", (( uip_stats_t * ) &uip_stat)[s->count] ); +} + +static PT_THREAD( net_stats ( struct httpd_state *s, char *ptr ) ) +{ + PSOCK_BEGIN( &s->sout ); + ( void ) ptr; + ( void ) PT_YIELD_FLAG; +#if UIP_STATISTICS + for( s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t); ++s->count ) + { + PSOCK_GENERATOR_SEND( &s->sout, generate_net_stats, s ); + } + +#endif /* UIP_STATISTICS */ + + PSOCK_END( &s->sout ); +} + +/*---------------------------------------------------------------------------*/ +extern void vTaskList( signed char *pcWriteBuffer ); +extern char *pcGetTaskStatusMessage( void ); +static char cCountBuf[128]; +long lRefreshCount = 0; +static unsigned short generate_rtos_stats( void *arg ) +{ + ( void ) arg; + lRefreshCount++; + sprintf( cCountBuf, "


Refresh count = %d


%s", ( int ) lRefreshCount, pcGetTaskStatusMessage() ); + vTaskList( uip_appdata ); + strcat( uip_appdata, cCountBuf ); + + return strlen( uip_appdata ); +} + +/*---------------------------------------------------------------------------*/ +static PT_THREAD( rtos_stats ( struct httpd_state *s, char *ptr ) ) +{ + PSOCK_BEGIN( &s->sout ); + ( void ) ptr; + ( void ) PT_YIELD_FLAG; + PSOCK_GENERATOR_SEND( &s->sout, generate_rtos_stats, NULL ); + PSOCK_END( &s->sout ); +} + +/*---------------------------------------------------------------------------*/ +char *pcStatus; +unsigned long ulString; + +static unsigned short generate_io_state( void *arg ) +{ + extern long lParTestGetLEDState( unsigned long ulLED ); + ( void ) arg; + + /* Are the dynamically setable LEDs currently on or off? */ + if( lParTestGetLEDState( 8 ) ) + { + pcStatus = "checked"; + } + else + { + pcStatus = ""; + } + + sprintf( uip_appdata, "LED

", pcStatus ); + + return strlen( uip_appdata ); +} + +/*---------------------------------------------------------------------------*/ +extern void vTaskGetRunTimeStats( signed char *pcWriteBuffer ); +extern unsigned short usMaxJitter; +static char cJitterBuffer[ 200 ]; +static unsigned short generate_runtime_stats( void *arg ) +{ + ( void ) arg; + lRefreshCount++; + sprintf( cCountBuf, "


Refresh count = %d", ( int ) lRefreshCount ); + + #ifdef INCLUDE_HIGH_FREQUENCY_TIMER_TEST + { + sprintf( cJitterBuffer, "


Max high frequency timer jitter = %d peripheral clock periods.


", ( int ) usMaxJitter ); + vTaskGetRunTimeStats( uip_appdata ); + strcat( uip_appdata, cJitterBuffer ); + } + #else + { + ( void ) cJitterBuffer; + strcpy( uip_appdata, "

Run time stats are only available in the debug_with_optimisation build configuration.

" ); + } + #endif + + strcat( uip_appdata, cCountBuf ); + + return strlen( uip_appdata ); +} + +/*---------------------------------------------------------------------------*/ +static PT_THREAD( run_time ( struct httpd_state *s, char *ptr ) ) +{ + PSOCK_BEGIN( &s->sout ); + ( void ) ptr; + ( void ) PT_YIELD_FLAG; + PSOCK_GENERATOR_SEND( &s->sout, generate_runtime_stats, NULL ); + PSOCK_END( &s->sout ); +} + +/*---------------------------------------------------------------------------*/ +static PT_THREAD( led_io ( struct httpd_state *s, char *ptr ) ) +{ + PSOCK_BEGIN( &s->sout ); + ( void ) ptr; + ( void ) PT_YIELD_FLAG; + PSOCK_GENERATOR_SEND( &s->sout, generate_io_state, NULL ); + PSOCK_END( &s->sout ); +} + +/** @} */ diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/404.html b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/404.html new file mode 100644 index 000000000..43e7f4cad --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/404.html @@ -0,0 +1,8 @@ + + +

+

404 - file not found

+

Go here instead.

+
+ + \ No newline at end of file diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/index.html b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/index.html new file mode 100644 index 000000000..4937dc69a --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/index.html @@ -0,0 +1,13 @@ + + + + FreeRTOS.org uIP WEB server demo + + + +Loading index.shtml. Click here if not automatically redirected. + + + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/index.shtml b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/index.shtml new file mode 100644 index 000000000..882d085ce --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/index.shtml @@ -0,0 +1,20 @@ + + + + FreeRTOS.org uIP WEB server demo + + + +Task Stats | Run Time Stats | TCP Stats | Connections | FreeRTOS Homepage | IO | 37K jpg +

+

+

+

Task statistics

+Page will refresh every 2 seconds.

+

Task          State  Priority  Stack	#
************************************************

+%! rtos-stats
+
+ + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/io.shtml b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/io.shtml new file mode 100644 index 000000000..819e2d39b --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/io.shtml @@ -0,0 +1,28 @@ + + + + FreeRTOS.org uIP WEB server demo + + + +Task Stats | Run Time Stats | TCP Stats | Connections | FreeRTOS Homepage | IO | 37K jpg +

+

+LED and LCD IO
+ +

+ +Use the check box to turn on or off LED 4, then click "Update IO". + + +

+

+%! led-io +

+ +

+

+ + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/logo.jpg b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/logo.jpg new file mode 100644 index 000000000..46d756892 Binary files /dev/null and b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/logo.jpg differ diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/runtime.shtml b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/runtime.shtml new file mode 100644 index 000000000..3464fd471 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/runtime.shtml @@ -0,0 +1,20 @@ + + + + FreeRTOS.org uIP WEB server demo + + + +Task Stats | Run Time Stats | TCP Stats | Connections | FreeRTOS Homepage | IO | 37K jpg +

+

+

+

Run-time statistics

+Page will refresh every 2 seconds.

+

Task            Abs Time      % Time
****************************************

+%! run-time
+
+ + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/stats.shtml b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/stats.shtml new file mode 100644 index 000000000..f54118606 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/stats.shtml @@ -0,0 +1,47 @@ + + + + FreeRTOS.org uIP WEB server demo + + + +Task Stats | Run Time Stats | TCP Stats | Connections | FreeRTOS Homepage | IO | 37K jpg +

+

+

+

Network statistics

+ +
+IP           Packets received
+             Packets sent
+             Forwaded
+             Dropped
+IP errors    IP version/header length
+             IP length, high byte
+             IP length, low byte
+             IP fragments
+             Header checksum
+             Wrong protocol
+ICMP	     Packets received
+             Packets sent
+             Packets dropped
+             Type errors
+             Checksum errors
+TCP          Packets received
+             Packets sent
+             Packets dropped
+             Checksum errors
+             Data packets without ACKs
+             Resets
+             Retransmissionsa
+             Syn to closed port
+UDP          Packets dropped
+             Packets received
+             Packets sent
+             Packets chkerr
+	     No connection avaliable
+
%! net-stats
+
+ + + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/tcp.shtml b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/tcp.shtml new file mode 100644 index 000000000..23dcdcae3 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fs/tcp.shtml @@ -0,0 +1,21 @@ + + + + FreeRTOS.org uIP WEB server demo + + + +Task Stats | Run Time Stats | TCP Stats | Connections | FreeRTOS Homepage | IO | 37K jpg +

+

+
+

Network connections

+

+ + +%! tcp-connections + + + + + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fsdata.c b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fsdata.c new file mode 100644 index 000000000..47823d100 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/httpd-fsdata.c @@ -0,0 +1,3871 @@ +static const char data_404_html[] = { + /* /404.html */ + 0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0, + 0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, 0xa, 0x20, 0x20, + 0x3c, 0x62, 0x6f, 0x64, 0x79, 0x20, 0x62, 0x67, 0x63, 0x6f, + 0x6c, 0x6f, 0x72, 0x3d, 0x22, 0x77, 0x68, 0x69, 0x74, 0x65, + 0x22, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x63, + 0x65, 0x6e, 0x74, 0x65, 0x72, 0x3e, 0xd, 0xa, 0x20, 0x20, + 0x20, 0x20, 0x20, 0x20, 0x3c, 0x68, 0x31, 0x3e, 0x34, 0x30, + 0x34, 0x20, 0x2d, 0x20, 0x66, 0x69, 0x6c, 0x65, 0x20, 0x6e, + 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0x3c, 0x2f, + 0x68, 0x31, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, + 0x20, 0x3c, 0x68, 0x33, 0x3e, 0x47, 0x6f, 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0x6c, 0x3e, 0xd, + 0xa, 0xd, 0xa, 0}; + +const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}}; + +const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}}; + +const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}}; + +const struct httpd_fsdata_file file_io_shtml[] = {{file_index_shtml, data_io_shtml, data_io_shtml + 10, sizeof(data_io_shtml) - 10}}; + +const struct httpd_fsdata_file file_logo_jpg[] = {{file_io_shtml, data_logo_jpg, data_logo_jpg + 10, sizeof(data_logo_jpg) - 10}}; + +const struct httpd_fsdata_file file_runtime_shtml[] = {{file_logo_jpg, data_runtime_shtml, data_runtime_shtml + 15, sizeof(data_runtime_shtml) - 15}}; + +const struct httpd_fsdata_file file_stats_shtml[] = {{file_runtime_shtml, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}}; + +const struct httpd_fsdata_file file_tcp_shtml[] = {{file_stats_shtml, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}}; + +#define HTTPD_FS_ROOT file_tcp_shtml + +#define HTTPD_FS_NUMFILES 8 diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/makefsdata b/Demo/RX600_RX62N-RDK_IAR/webserver/makefsdata new file mode 100644 index 000000000..a953cdd76 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/makefsdata @@ -0,0 +1,79 @@ +#!/usr/bin/perl + +open(OUTPUT, "> httpd-fsdata.c"); + +chdir("httpd-fs"); + +opendir(DIR, "."); +@files = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR); +closedir(DIR); + +foreach $file (@files) { + + if(-d $file && $file !~ /^\./) { + print "Processing directory $file\n"; + opendir(DIR, $file); + @newfiles = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR); + closedir(DIR); + printf "Adding files @newfiles\n"; + @files = (@files, map { $_ = "$file/$_" } @newfiles); + next; + } +} + +foreach $file (@files) { + if(-f $file) { + + print "Adding file $file\n"; + + open(FILE, $file) || die "Could not open file $file\n"; + binmode FILE; + + $file =~ s-^-/-; + $fvar = $file; + $fvar =~ s-/-_-g; + $fvar =~ s-\.-_-g; + # for AVR, add PROGMEM here + print(OUTPUT "static const char data".$fvar."[] = {\n"); + print(OUTPUT "\t/* $file */\n\t"); + for($j = 0; $j < length($file); $j++) { + printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1))); + } + printf(OUTPUT "0,\n"); + + + $i = 0; + while(read(FILE, $data, 1)) { + if($i == 0) { + print(OUTPUT "\t"); + } + printf(OUTPUT "%#02x, ", unpack("C", $data)); + $i++; + if($i == 10) { + print(OUTPUT "\n"); + $i = 0; + } + } + print(OUTPUT "0};\n\n"); + close(FILE); + push(@fvars, $fvar); + push(@pfiles, $file); + } +} + +for($i = 0; $i < @fvars; $i++) { + $file = $pfiles[$i]; + $fvar = $fvars[$i]; + + if($i == 0) { + $prevfile = "NULL"; + } else { + $prevfile = "file" . $fvars[$i - 1]; + } + print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, "); + print(OUTPUT "data$fvar + ". (length($file) + 1) .", "); + print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n"); +} + +print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n"); +print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n"); diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/phy.c b/Demo/RX600_RX62N-RDK_IAR/webserver/phy.c new file mode 100644 index 000000000..c4f20508f --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/phy.c @@ -0,0 +1,474 @@ +/****************************************************************************** +* DISCLAIMER + +* This software is supplied by Renesas Technology Corp. and is only +* intended for use with Renesas products. No other uses are authorized. + +* This software is owned by Renesas Technology Corp. and is protected under +* all applicable laws, including copyright laws. + +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES +* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, +* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A +* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY +* DISCLAIMED. + +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES +* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS +* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + +* Renesas reserves the right, without notice, to make changes to this +* software and to discontinue the availability of this software. +* By using this software, you agree to the additional terms and +* conditions found by accessing the following link: +* http://www.renesas.com/disclaimer +****************************************************************************** +* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved. +******************************************************************************* +* File Name : phy.c +* Version : 1.01 +* Description : Ethernet PHY device driver +****************************************************************************** +* History : DD.MM.YYYY Version Description +* : 15.02.2010 1.00 First Release +* : 06.04.2010 1.01 RX62N changes +******************************************************************************/ + + +/****************************************************************************** +Includes , "Project Includes" +******************************************************************************/ +#include +#include "r_ether.h" +#include "phy.h" + +#include "FreeRTOS.h" +#include "task.h" +/****************************************************************************** +Typedef definitions +******************************************************************************/ + +/****************************************************************************** +Macro definitions +******************************************************************************/ + +/****************************************************************************** +Imported global variables and functions (from other files) +******************************************************************************/ + +/****************************************************************************** +Exported global variables and functions (to be accessed by other files) +******************************************************************************/ + +/****************************************************************************** +Private global variables and functions +******************************************************************************/ +uint16_t _phy_read( uint16_t reg_addr ); +void _phy_write( uint16_t reg_addr, uint16_t data ); +void _phy_preamble( void ); +void _phy_reg_set( uint16_t reg_addr, int32_t option ); +void _phy_reg_read( uint16_t *data ); +void _phy_reg_write( uint16_t data ); +void _phy_ta_z0( void ); +void _phy_ta_10( void ); +void _phy_mii_write_1( void ); +void _phy_mii_write_0( void ); + +/** + * External functions + */ + +/****************************************************************************** +* Function Name: phy_init +* Description : Resets Ethernet PHY device +* Arguments : none +* Return Value : none +******************************************************************************/ +int16_t phy_init( void ) +{ + uint16_t reg; + uint32_t count; + + /* Reset PHY */ + _phy_write(BASIC_MODE_CONTROL_REG, 0x8000); + + count = 0; + + do + { + vTaskDelay( 2 / portTICK_RATE_MS ); + reg = _phy_read(BASIC_MODE_CONTROL_REG); + count++; + } while (reg & 0x8000 && count < PHY_RESET_WAIT); + + if( count < PHY_RESET_WAIT ) + { + return R_PHY_OK; + } + + return R_PHY_ERROR; +} + +/****************************************************************************** +* Function Name: phy_set_100full +* Description : Set Ethernet PHY device to 100 Mbps full duplex +* Arguments : none +* Return Value : none +******************************************************************************/ +void phy_set_100full( void ) +{ + _phy_write(BASIC_MODE_CONTROL_REG, 0x2100); +} + +/****************************************************************************** +* Function Name: phy_set_10half +* Description : Sets Ethernet PHY device to 10 Mbps half duplexR +* Arguments : none +* Return Value : none +******************************************************************************/ +void phy_set_10half( void ) +{ + _phy_write(BASIC_MODE_CONTROL_REG, 0x0000); +} + +/****************************************************************************** +* Function Name: phy_set_autonegotiate +* Description : Starts autonegotiate and reports the other side's +* : physical capability +* Arguments : none +* Return Value : bit 8 - Full duplex 100 mbps +* : bit 7 - Half duplex 100 mbps +* : bit 6 - Full duplex 10 mbps +* : bit 5 - Half duplex 10 mbps +* : bit 4:0 - Always set to 00001 (IEEE 802.3) +* : -1 if error +******************************************************************************/ +int16_t phy_set_autonegotiate( void ) +{ + uint16_t reg; + uint32_t count; + + _phy_write(AN_ADVERTISEMENT_REG, 0x01E1); + _phy_write(BASIC_MODE_CONTROL_REG, 0x1200); + + count = 0; + + do + { + reg = _phy_read(BASIC_MODE_STATUS_REG); + count++; + vTaskDelay( 100 / portTICK_RATE_MS ); + + /* Make sure we don't break out if reg just contains 0xffff. */ + if( reg == 0xffff ) + { + reg = 0; + } + + } while (!(reg & 0x0020) && (count < PHY_AUTO_NEGOTIATON_WAIT)); + + if (count >= PHY_AUTO_NEGOTIATON_WAIT) + { + return R_PHY_ERROR; + } + else + { + /* National DP83640 fix */ + _phy_write(0x13, 0x0006); + reg = _phy_read(0x14); + _phy_write(0x14, (reg&0x7FFF)); + _phy_write(0x13, 0x0000); + + /* Get the link partner response */ + reg = (int16_t)_phy_read(AN_LINK_PARTNER_ABILITY_REG); + + if (reg & ( 1 << 8 ) ) + { + return PHY_LINK_100F; + } + if (reg & ( 1 << 7 ) ) + { + return PHY_LINK_100H; + } + if (reg & ( 1 << 6 ) ) + { + return PHY_LINK_10F; + } + if (reg & 1 << 5 ) + { + return PHY_LINK_10H; + } + + return (-1); + } +} + + +/** + * Internal functions + */ + +/****************************************************************************** +* Function Name: _phy_read +* Description : Reads a PHY register +* Arguments : reg_addr - address of the PHY register +* Return Value : read value +******************************************************************************/ +uint16_t _phy_read( uint16_t reg_addr ) +{ + uint16_t data; + + _phy_preamble(); + _phy_reg_set( reg_addr, PHY_READ ); + _phy_ta_z0(); + _phy_reg_read( &data ); + _phy_ta_z0(); + + return( data ); +} + +/****************************************************************************** +* Function Name: _phy_write +* Description : Writes to a PHY register +* Arguments : reg_addr - address of the PHY register +* : data - value +* Return Value : none +******************************************************************************/ +void _phy_write( uint16_t reg_addr, uint16_t data ) +{ + _phy_preamble(); + _phy_reg_set( reg_addr, PHY_WRITE ); + _phy_ta_10(); + _phy_reg_write( data ); + _phy_ta_z0(); +} + +/****************************************************************************** +* Function Name: _phy_preamble +* Description : As preliminary preparation for access to the PHY module register, +* "1" is output via the MII management interface. +* Arguments : none +* Return Value : none +******************************************************************************/ +void _phy_preamble( void ) +{ + int16_t i; + + i = 32; + while( i > 0 ) + { + _phy_mii_write_1(); + i--; + } +} + +/****************************************************************************** +* Function Name: _phy_reg_set +* Description : Sets a PHY device to read or write mode +* Arguments : reg_addr - address of the PHY register +* : option - mode +* Return Value : none +******************************************************************************/ +void _phy_reg_set( uint16_t reg_addr, int32_t option ) +{ + int32_t i; + uint16_t data; + + data = 0; + data = (PHY_ST << 14); /* ST code */ + + if( option == PHY_READ ) + { + data |= (PHY_READ << 12); /* OP code(RD) */ + } + else + { + data |= (PHY_WRITE << 12); /* OP code(WT) */ + } + + data |= (PHY_ADDR << 7); /* PHY Address */ + data |= (reg_addr << 2); /* Reg Address */ + + i = 14; + while( i > 0 ) + { + if( (data & 0x8000) == 0 ) + { + _phy_mii_write_0(); + } + else + { + _phy_mii_write_1(); + } + data <<= 1; + i--; + } +} + +/****************************************************************************** +* Function Name: _phy_reg_read +* Description : Reads PHY register through MII interface +* Arguments : data - pointer to store the data read +* Return Value : none +******************************************************************************/ +void _phy_reg_read( uint16_t *data ) +{ + int32_t i, j; + uint16_t reg_data; + + reg_data = 0; + i = 16; + while( i > 0 ) + { + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000000; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000001; + } + + reg_data <<= 1; + reg_data |= (uint16_t)((ETHERC.PIR.LONG & 0x00000008) >> 3); /* MDI read */ + + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000001; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000000; + } + i--; + } + *data = reg_data; +} + +/****************************************************************************** +* Function Name: _phy_reg_write +* Description : Writes to PHY register through MII interface +* Arguments : data - value to write +* Return Value : none +******************************************************************************/ +void _phy_reg_write( uint16_t data ) +{ + int32_t i; + + i = 16; + while( i > 0 ) + { + if( (data & 0x8000) == 0 ) + { + _phy_mii_write_0(); + } + else + { + _phy_mii_write_1(); + } + i--; + data <<= 1; + } +} + +/****************************************************************************** +* Function Name: _phy_ta_z0 +* Description : Performs bus release so that PHY can drive data +* : for read operation +* Arguments : none +* Return Value : none +******************************************************************************/ +void _phy_ta_z0( void ) +{ + int32_t j; + + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000000; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000001; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000001; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000000; + } +} + +/****************************************************************************** +* Function Name: _phy_ta_10 +* Description : Switches data bus so MII interface can drive data +* : for write operation +* Arguments : none +* Return Value : none +******************************************************************************/ +void _phy_ta_10(void) +{ + _phy_mii_write_1(); + _phy_mii_write_0(); +} + +/****************************************************************************** +* Function Name: _phy_mii_write_1 +* Description : Outputs 1 to the MII interface +* Arguments : none +* Return Value : none +******************************************************************************/ +void _phy_mii_write_1( void ) +{ + int32_t j; + + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000006; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000007; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000007; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000006; + } +} + +/****************************************************************************** +* Function Name: _phy_mii_write_0 +* Description : Outputs 0 to the MII interface +* Arguments : none +* Return Value : none +******************************************************************************/ +void _phy_mii_write_0( void ) +{ + int32_t j; + + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000002; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000003; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000003; + } + for(j = MDC_WAIT; j > 0; j--) + { + ETHERC.PIR.LONG = 0x00000002; + } +} + + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/phy.h b/Demo/RX600_RX62N-RDK_IAR/webserver/phy.h new file mode 100644 index 000000000..e2429d932 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/phy.h @@ -0,0 +1,84 @@ +/****************************************************************************** +* DISCLAIMER +* Please refer to http://www.renesas.com/disclaimer +****************************************************************************** + Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved. +******************************************************************************* +* File Name : phy.h +* Version : 1.02 +* Description : Ethernet PHY device driver +****************************************************************************** +* History : DD.MM.YYYY Version Description +* : 15.02.2010 1.00 First Release +* : 17.03.2010 1.01 Modification of macro definitions for access timing +* : 06.04.2010 1.02 RX62N changes +******************************************************************************/ + +#ifndef PHY_H +#define PHY_H + +/****************************************************************************** +Includes , "Project Includes" +******************************************************************************/ +#include + +/****************************************************************************** +Typedef definitions +******************************************************************************/ + +/****************************************************************************** +Macro definitions +******************************************************************************/ +/* Standard PHY Registers */ +#define BASIC_MODE_CONTROL_REG 0 +#define BASIC_MODE_STATUS_REG 1 +#define PHY_IDENTIFIER1_REG 2 +#define PHY_IDENTIFIER2_REG 3 +#define AN_ADVERTISEMENT_REG 4 +#define AN_LINK_PARTNER_ABILITY_REG 5 +#define AN_EXPANSION_REG 6 + +/* Media Independent Interface */ +#define PHY_ST 1 +#define PHY_READ 2 +#define PHY_WRITE 1 +#define PHY_ADDR 0x01 + +#define MDC_WAIT 2 + +/* PHY return definitions */ +#define R_PHY_OK 0 +#define R_PHY_ERROR -1 + +/* Auto-Negotiation Link Partner Status */ +#define PHY_AN_LINK_PARTNER_100BASE 0x0180 +#define PHY_AN_LINK_PARTNER_FULL 0x0140 +#define PHY_AN_COMPLETE ( 1 << 5 ) + +/* + * Wait counter definitions of PHY-LSI initialization + * ICLK = 96MHz +*/ +#define PHY_RESET_WAIT 0x00000020L +#define PHY_AUTO_NEGOTIATON_WAIT 75 + +#define PHY_AN_ENABLE 0x1200 +#define PHY_AN_10_100_F_H 0xde1 + +/****************************************************************************** +Variable Externs +******************************************************************************/ + +/****************************************************************************** +Functions Prototypes +******************************************************************************/ +/** + * External prototypes + **/ +int16_t phy_init( void ); +void phy_set_100full( void ); +void phy_set_10half( void ); +int16_t phy_set_autonegotiate( void ); + +#endif /* PHY_H */ + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/r_ether.h b/Demo/RX600_RX62N-RDK_IAR/webserver/r_ether.h new file mode 100644 index 000000000..1dcc46865 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/r_ether.h @@ -0,0 +1,185 @@ +/****************************************************************************** +* DISCLAIMER +* Please refer to http://www.renesas.com/disclaimer +****************************************************************************** + Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved. +******************************************************************************* +* File Name : r_ether.h +* Version : 1.02 +* Description : Ethernet module device driver +****************************************************************************** +* History : DD.MM.YYYY Version Description +* : 15.02.2010 1.00 First Release +* : 03.03.2010 1.01 Buffer size is aligned on the 32-byte boundary. +* : 04.06.2010 1.02 RX62N changes +******************************************************************************/ + +#ifndef R_ETHER_H +#define R_ETHER_H + +/****************************************************************************** +Includes , "Project Includes" +******************************************************************************/ +#include + +/****************************************************************************** +Typedef definitions +******************************************************************************/ +struct Descriptor +{ + unsigned long status; +#if __LITTLE_ENDIAN__ == 1 +/* Little endian */ + unsigned short size; + unsigned short bufsize; +#else +/* Big endian */ + unsigned short bufsize; + unsigned short size; + +#endif + char *buf_p; + struct Descriptor *next; +}; + +typedef struct Descriptor ethfifo; + +typedef enum _NETLNK +{ + PHY_NO_LINK = 0, + PHY_LINK_10H, + PHY_LINK_10F, + PHY_LINK_100H, + PHY_LINK_100F + +} NETLNK; + +/****************************************************************************** +Macro definitions +******************************************************************************/ +#define BUFSIZE 256 /* Must be 32-bit aligned */ +#define ENTRY 8 /* Number of RX and TX buffers */ + +#define ACT 0x80000000 +#define DL 0x40000000 +#define FP1 0x20000000 +#define FP0 0x10000000 +#define FE 0x08000000 + +#define RFOVER 0x00000200 +#define RAD 0x00000100 +#define RMAF 0x00000080 +#define RRF 0x00000010 +#define RTLF 0x00000008 +#define RTSF 0x00000004 +#define PRE 0x00000002 +#define CERF 0x00000001 + +#define TAD 0x00000100 +#define CND 0x00000008 +#define DLC 0x00000004 +#define CD 0x00000002 +#define TRO 0x00000001 + +/** + * Renesas Ethernet API return defines + **/ +#define R_ETHER_OK 0 +#define R_ETHER_ERROR -1 + +/* Ether Interface definitions */ +#define ETH_RMII_MODE 0 +#define ETH_MII_MODE 1 +/* Select Ether Interface Mode */ +#define ETH_MODE_SEL ETH_MII_MODE + +/****************************************************************************** +Variable Externs +******************************************************************************/ + +/****************************************************************************** +Functions Prototypes +******************************************************************************/ +/** + * Renesas Ethernet API prototypes + **/ +int32_t R_Ether_Open(unsigned long ch, unsigned char mac_addr[]); +int32_t R_Ether_Close(unsigned long ch); +int32_t R_Ether_Write(unsigned long ch, void *buf, unsigned long len); +int32_t R_Ether_Read(unsigned long ch, void *buf); + +/** + * FreeRTOS Ethernet API prototypes. + */ + +/* + * Configure all the ethernet components (MAC, DMA, PHY) ready for communication. + */ +void vInitEmac( void ); + +/* + * Auto negotiate the link, returning pass or fail depending on whether a link + * was established or not. + */ +long lEMACWaitForLink( void ); + +/* + * Check the Rx status, and return the number of bytes received if any. + */ +unsigned long ulEMACRead( void ); + +/* + * Send uip_len bytes from uip_buf to the Tx descriptors and initiate a Tx. + */ +void vEMACWrite( void ); + + + + +/****************************************************/ +/* Ethernet statistic collection data */ +struct enet_stats +{ + unsigned long rx_packets; /* total packets received */ + unsigned long tx_packets; /* total packets transmitted */ + unsigned long rx_errors; /* bad packets received */ + unsigned long tx_errors; /* packet transmit problems */ + unsigned long rx_dropped; /* no space in buffers */ + unsigned long tx_dropped; /* no space available */ + unsigned long multicast; /* multicast packets received */ + unsigned long collisions; + + /* detailed rx_errors: */ + unsigned long rx_length_errors; + unsigned long rx_over_errors; /* receiver ring buffer overflow */ + unsigned long rx_crc_errors; /* recved pkt with crc error */ + unsigned long rx_frame_errors; /* recv'd frame alignment error */ + unsigned long rx_fifo_errors; /* recv'r fifo overrun */ + unsigned long rx_missed_errors; /* receiver missed packet */ + + /* detailed tx_errors */ + unsigned long tx_aborted_errors; + unsigned long tx_carrier_errors; + unsigned long tx_fifo_errors; + unsigned long tx_heartbeat_errors; + unsigned long tx_window_errors; +}; + +struct ei_device +{ + const char *name; + unsigned char open; + unsigned char Tx_act; + unsigned char Rx_act; + unsigned char txing; /* Transmit Active */ + unsigned char irqlock; /* EDMAC's interrupt disabled when '1'. */ + unsigned char dmaing; /* EDMAC Active */ + ethfifo *rxcurrent; /* current receive discripter */ + ethfifo *txcurrent; /* current transmit discripter */ + unsigned char save_irq; /* Original dev->irq value. */ + struct enet_stats stat; + unsigned char mac_addr[6]; +}; + +#endif /* R_ETHER_H */ + diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/uip-conf.h b/Demo/RX600_RX62N-RDK_IAR/webserver/uip-conf.h new file mode 100644 index 000000000..e5597d232 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/uip-conf.h @@ -0,0 +1,167 @@ +/** + * \addtogroup uipopt + * @{ + */ + +/** + * \name Project-specific configuration options + * @{ + * + * uIP has a number of configuration options that can be overridden + * for each project. These are kept in a project-specific uip-conf.h + * file and all configuration names have the prefix UIP_CONF. + */ + +/* + * Copyright (c) 2006, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the uIP TCP/IP stack + * + * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $ + */ + +/** + * \file + * An example uIP configuration file + * \author + * Adam Dunkels + */ + +#ifndef __UIP_CONF_H__ +#define __UIP_CONF_H__ + +#define UIP_CONF_EXTERNAL_BUFFER +#define UIP_CONF_PROCESS_HTTPD_FORMS 1 + +/** + * 8 bit datatype + * + * This typedef defines the 8-bit type used throughout uIP. + * + * \hideinitializer + */ +typedef unsigned char u8_t; + +/** + * 16 bit datatype + * + * This typedef defines the 16-bit type used throughout uIP. + * + * \hideinitializer + */ +typedef unsigned short u16_t; + +typedef unsigned long u32_t; + +/** + * Statistics datatype + * + * This typedef defines the dataype used for keeping statistics in + * uIP. + * + * \hideinitializer + */ +typedef unsigned short uip_stats_t; + +/** + * Maximum number of TCP connections. + * + * \hideinitializer + */ +#define UIP_CONF_MAX_CONNECTIONS 40 + +/** + * Maximum number of listening TCP ports. + * + * \hideinitializer + */ +#define UIP_CONF_MAX_LISTENPORTS 40 + +/** + * uIP buffer size. + * + * \hideinitializer + */ +#define UIP_CONF_BUFFER_SIZE 1480 + +/** + * CPU byte order. + * + * \hideinitializer + */ +#if __LITTLE_ENDIAN__ == 1 + #define UIP_CONF_BYTE_ORDER UIP_LITTLE_ENDIAN +#else + #define UIP_CONF_BYTE_ORDER UIP_BIG_ENDIAN +#endif + +/** + * Logging on or off + * + * \hideinitializer + */ +#define UIP_CONF_LOGGING 0 + +/** + * UDP support on or off + * + * \hideinitializer + */ +#define UIP_CONF_UDP 0 + +/** + * UDP checksums on or off + * + * \hideinitializer + */ +#define UIP_CONF_UDP_CHECKSUMS 1 + +/** + * uIP statistics on or off + * + * \hideinitializer + */ +#define UIP_CONF_STATISTICS 1 + +/* Here we include the header file for the application(s) we use in + our project. */ +/*#include "smtp.h"*/ +/*#include "hello-world.h"*/ +/*#include "telnetd.h"*/ +#include "webserver.h" +/*#include "dhcpc.h"*/ +/*#include "resolv.h"*/ +/*#include "webclient.h"*/ + +#define CCIF +#define CC_REGISTER_ARG + +#endif /* __UIP_CONF_H__ */ + +/** @} */ +/** @} */ diff --git a/Demo/RX600_RX62N-RDK_IAR/webserver/webserver.h b/Demo/RX600_RX62N-RDK_IAR/webserver/webserver.h new file mode 100644 index 000000000..5267f0587 --- /dev/null +++ b/Demo/RX600_RX62N-RDK_IAR/webserver/webserver.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2002, Adam Dunkels. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * This file is part of the uIP TCP/IP stack + * + * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $ + * + */ +#ifndef __WEBSERVER_H__ +#define __WEBSERVER_H__ + +#include "apps/httpd/httpd.h" + +typedef struct httpd_state uip_tcp_appstate_t; +/* UIP_APPCALL: the name of the application function. This function + must return void and take no arguments (i.e., C type "void + appfunc(void)"). */ +#define UIP_APPCALL httpd_appcall + + +#endif /* __WEBSERVER_H__ */
LocalRemoteStateRetransmissionsTimerFlags