From: RichardBarry
Date: Fri, 27 Jul 2007 07:59:50 +0000 (+0000)
Subject: Updated AVR32 demos and added AVR32 UC3B demo.
X-Git-Tag: V4.4.0~5
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=116d974cd64580ee62c6ff0e2095f263916b56f9;p=freertos
Updated AVR32 demos and added AVR32 UC3B demo.
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@96 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---
diff --git a/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile b/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile
index 1b829fe63..55ee8bc9a 100644
--- a/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile
+++ b/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile
@@ -13,12 +13,17 @@
# elf file.elf Link: create ELF output file from object files.
# lss file.lss Create extended listing from target output file.
# sym file.sym Create symbol table from target output file.
+# hex file.hex Create Intel HEX image from ELF output file.
# bin file.bin Create binary image from ELF output file.
# sizes Display target size information.
+# isp Use ISP instead of JTAGICE mkII when programming.
# cpuinfo Get CPU information.
# halt Stop CPU execution.
+# chiperase Perform a JTAG Chip Erase command.
+# erase Perform a flash chip erase.
# program Program MCU memory from ELF output file.
-# reset Reset CPU.
+# secureflash Protect chip by setting security bit.
+# reset Reset MCU.
# debug Open a debug connection with the MCU.
# run Start CPU execution.
# readregs Read CPU registers.
@@ -78,11 +83,13 @@ DPNDFILES = $(CSRCS:.c=.d) $(ASSRCS:.S=.d)
CPPFILES = $(CSRCS:.c=.i)
CC = avr32-gcc
-CFLAGS = $(DEBUG) $(OPTIMIZATION) $(C_EXTRA_FLAGS)
+CFLAGS = $(DEBUG) $(OPTIMIZATION) $(C_EXTRA_FLAGS) \
+ $(PLATFORM_INC_PATH:%=-Wa,-I%) $(INC_PATH:%=-Wa,-I%) $(AS_EXTRA_FLAGS)
ASFILES = $(CSRCS:.c=.x) $(ASSRCS:.S=.x)
AS = avr32-as
-ASFLAGS = $(DEBUG) $(AS_EXTRA_FLAGS)
+ASFLAGS = $(DEBUG) \
+ $(PLATFORM_INC_PATH:%=-Wa,-I%) $(INC_PATH:%=-Wa,-I%) $(AS_EXTRA_FLAGS)
OBJFILES = $(CSRCS:.c=.o) $(ASSRCS:.S=.o)
LD = avr32-ld
@@ -98,17 +105,19 @@ NM = avr32-nm
SYM = $(TGTFILE:$(TGTTYPE)=.sym)
OBJCOPY = avr32-objcopy
+HEX = $(TGTFILE:$(TGTTYPE)=.hex)
BIN = $(TGTFILE:$(TGTTYPE)=.bin)
SIZE = avr32-size
-SUDO = $(shell if [ -x /usr/bin/sudo ]; then echo sudo; fi)
-
SLEEP = sleep
SLEEPUSB = 9
PROGRAM = avr32program
+ISP = batchisp
+ISPFLAGS = -device at32$(PART) -hardware usb -operation
+
DBGPROXY = avr32gdbproxy
DOCGEN = doxygen
@@ -127,11 +136,15 @@ MSG_ARCHIVING = Archiving to \`$@\'.
MSG_LINKING = Linking to \`$@\'.
MSG_EXTENDED_LISTING = Creating extended listing to \`$@\'.
MSG_SYMBOL_TABLE = Creating symbol table to \`$@\'.
+MSG_IHEX_IMAGE = Creating Intel HEX image to \`$@\'.
MSG_BINARY_IMAGE = Creating binary image to \`$@\'.
MSG_GETTING_CPU_INFO = Getting CPU information.
MSG_HALTING = Stopping CPU execution.
-MSG_PROGRAMMING = Programming MCU memory from \`$<\'.
-MSG_RESETTING = Resetting CPU.
+MSG_ERASING_CHIP = Performing a JTAG Chip Erase command.
+MSG_ERASING = Performing a flash chip erase.
+MSG_PROGRAMMING = Programming MCU memory from \`$(TGTFILE)\'.
+MSG_SECURING_FLASH = Protecting chip by setting security bit.
+MSG_RESETTING = Resetting MCU.
MSG_DEBUGGING = Opening debug connection with MCU.
MSG_RUNNING = Starting CPU execution.
MSG_READING_CPU_REGS = Reading CPU registers.
@@ -151,11 +164,11 @@ include $(MAKECFG)
# Default goal: build the project.
ifeq ($(TGTTYPE),.a)
.PHONY: all
-all: ccversion a lss sym
+all: ccversion a lss sym sizes
else
ifeq ($(TGTTYPE),.elf)
.PHONY: all
-all: ccversion elf lss sym bin sizes
+all: ccversion elf lss sym hex bin sizes
else
$(error $(ERR_TARGET_TYPE))
endif
@@ -166,6 +179,7 @@ endif
clean:
@echo $(MSG_CLEANING)
-$(VERBOSE_CMD)$(RM) $(BIN)
+ -$(VERBOSE_CMD)$(RM) $(HEX)
-$(VERBOSE_CMD)$(RM) $(SYM)
-$(VERBOSE_CMD)$(RM) $(LSS)
-$(VERBOSE_CMD)$(RM) $(TGTFILE)
@@ -219,9 +233,15 @@ lss: $(LSS)
sym: $(SYM)
ifeq ($(TGTTYPE),.elf)
+
+# Create Intel HEX image from ELF output file.
+.PHONY: hex
+hex: $(HEX)
+
# Create binary image from ELF output file.
.PHONY: bin
bin: $(BIN)
+
endif
# Display target size information.
@@ -229,17 +249,37 @@ endif
sizes: $(TGTFILE)
@echo
@echo
+ifeq ($(TGTTYPE),.a)
+ @$(SIZE) -Bxt $<
+else
+ifeq ($(TGTTYPE),.elf)
@$(SIZE) -Ax $<
+ @$(SIZE) -Bx $<
+endif
+endif
+ @echo
+ @echo
ifeq ($(TGTTYPE),.elf)
+# Use ISP instead of JTAGICE mkII when programming.
+.PHONY: isp
+ifeq ($(filter-out isp verbose,$(MAKECMDGOALS)),)
+isp: all
+else
+isp:
+ @:
+endif
+
+ifeq ($(findstring isp,$(MAKECMDGOALS)),)
+
# Get CPU information.
.PHONY: cpuinfo
cpuinfo:
@echo
@echo $(MSG_GETTING_CPU_INFO)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB cpuinfo
-ifneq ($(call LastWord,$(filter cpuinfo program reset debug run readregs,$(MAKECMDGOALS))),cpuinfo)
+ $(VERBOSE_CMD)$(PROGRAM) cpuinfo
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),cpuinfo)
@$(SLEEP) $(SLEEPUSB)
else
@echo
@@ -248,45 +288,85 @@ endif
# Stop CPU execution.
.PHONY: halt
halt:
-ifeq ($(filter cpuinfo program reset run readregs,$(MAKECMDGOALS)),)
+ifeq ($(filter cpuinfo chiperase erase program secureflash reset run readregs,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_HALTING)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB halt
+ $(VERBOSE_CMD)$(PROGRAM) halt
ifneq ($(call LastWord,$(filter halt debug,$(MAKECMDGOALS))),halt)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
- @echo > /dev/null
+ @:
+endif
+
+# Perform a JTAG Chip Erase command.
+.PHONY: chiperase
+chiperase:
+ @echo
+ @echo $(MSG_ERASING_CHIP)
+ $(VERBOSE_CMD)$(PROGRAM) chiperase
+ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash reset debug run readregs,$(MAKECMDGOALS))),chiperase)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Perform a flash chip erase.
+.PHONY: erase
+erase:
+ifeq ($(filter chiperase program,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_ERASING)
+ $(VERBOSE_CMD)$(PROGRAM) erase $(FLASH:%=-f%)
+ifneq ($(call LastWord,$(filter cpuinfo erase secureflash reset debug run readregs,$(MAKECMDGOALS))),erase)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+else
+ @:
endif
# Program MCU memory from ELF output file.
.PHONY: program
-program: $(TGTFILE)
+program: all
@echo
@echo $(MSG_PROGRAMMING)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB program $(FLASH:%=-f%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $<
-ifneq ($(call LastWord,$(filter cpuinfo program debug readregs,$(MAKECMDGOALS))),program)
+ $(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TGTFILE)
+ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash debug readregs,$(MAKECMDGOALS))),program)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
-# Reset CPU.
+# Protect chip by setting security bit.
+.PHONY: secureflash
+secureflash:
+ @echo
+ @echo $(MSG_SECURING_FLASH)
+ $(VERBOSE_CMD)$(PROGRAM) secureflash
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),secureflash)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Reset MCU.
.PHONY: reset
reset:
ifeq ($(filter program run,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_RESETTING)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB reset
-ifneq ($(call LastWord,$(filter cpuinfo reset debug readregs,$(MAKECMDGOALS))),reset)
+ $(VERBOSE_CMD)$(PROGRAM) reset
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase secureflash reset debug readregs,$(MAKECMDGOALS))),reset)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
- @echo > /dev/null
+ @:
endif
# Open a debug connection with the MCU.
@@ -294,8 +374,8 @@ endif
debug:
@echo
@echo $(MSG_DEBUGGING)
- $(VERBOSE_CMD)$(SUDO) $(DBGPROXY) -cUSB $(patsubst cfi@%,-f%,$(FLASH:internal@%=-f%))
-ifneq ($(call LastWord,$(filter cpuinfo halt program reset debug run readregs,$(MAKECMDGOALS))),debug)
+ $(VERBOSE_CMD)$(DBGPROXY) $(FLASH:%=-f%)
+ifneq ($(call LastWord,$(filter cpuinfo halt chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),debug)
@$(SLEEP) $(SLEEPUSB)
else
@echo
@@ -307,14 +387,14 @@ run:
ifeq ($(findstring program,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_RUNNING)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB run $(if $(findstring reset,$(MAKECMDGOALS)),-R)
-ifneq ($(call LastWord,$(filter cpuinfo debug run readregs,$(MAKECMDGOALS))),run)
+ $(VERBOSE_CMD)$(PROGRAM) run $(if $(findstring reset,$(MAKECMDGOALS)),-R)
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase secureflash debug run readregs,$(MAKECMDGOALS))),run)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
- @echo > /dev/null
+ @:
endif
# Read CPU registers.
@@ -322,13 +402,80 @@ endif
readregs:
@echo
@echo $(MSG_READING_CPU_REGS)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB readregs
-ifneq ($(call LastWord,$(filter cpuinfo program reset debug run readregs,$(MAKECMDGOALS))),readregs)
+ $(VERBOSE_CMD)$(PROGRAM) readregs
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),readregs)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
+else
+
+# Perform a flash chip erase.
+.PHONY: erase
+erase:
+ifeq ($(findstring program,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_ERASING)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck
+ifeq ($(call LastWord,$(filter erase secureflash debug run,$(MAKECMDGOALS))),erase)
+ @echo
+endif
+else
+ @:
+endif
+
+# Program MCU memory from ELF output file.
+.PHONY: program
+program: all
+ @echo
+ @echo $(MSG_PROGRAMMING)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TGTFILE) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
+ifeq ($(call LastWord,$(filter program secureflash debug,$(MAKECMDGOALS))),program)
+ @echo
+endif
+
+# Protect chip by setting security bit.
+.PHONY: secureflash
+secureflash:
+ @echo
+ @echo $(MSG_SECURING_FLASH)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) memory security addrange 0x0 0x0 fillbuffer 0x01 program $(if $(findstring run,$(MAKECMDGOALS)),start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0)
+ifeq ($(call LastWord,$(filter erase program secureflash debug,$(MAKECMDGOALS))),secureflash)
+ @echo
+endif
+
+# Reset MCU.
+.PHONY: reset
+reset:
+ @:
+
+# Open a debug connection with the MCU.
+.PHONY: debug
+debug:
+ @echo
+ @echo $(MSG_DEBUGGING)
+ $(VERBOSE_CMD)$(DBGPROXY) $(FLASH:%=-f%)
+ifeq ($(call LastWord,$(filter erase program secureflash debug run,$(MAKECMDGOALS))),debug)
+ @echo
+endif
+
+# Start CPU execution.
+.PHONY: run
+run:
+ifeq ($(filter program secureflash,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_RUNNING)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0
+ifeq ($(call LastWord,$(filter erase debug run,$(MAKECMDGOALS))),run)
+ @echo
+endif
+else
+ @:
+endif
+
+endif
+
endif
# Build the documentation.
@@ -352,11 +499,11 @@ rebuilddoc: cleandoc doc
# Display main executed commands.
.PHONY: verbose
-ifeq ($(MAKECMDGOALS),verbose)
+ifeq ($(filter-out isp verbose,$(MAKECMDGOALS)),)
verbose: all
else
verbose:
- @echo > /dev/null
+ @:
endif
ifneq ($(findstring verbose,$(MAKECMDGOALS)),)
# Prefix displaying the following command if and only if verbose is a goal.
@@ -456,9 +603,17 @@ $(SYM): $(TGTFILE)
$(VERBOSE_NL)
ifeq ($(TGTTYPE),.elf)
+
+# Create Intel HEX image from ELF output file.
+$(HEX): $(TGTFILE)
+ @echo $(MSG_IHEX_IMAGE)
+ $(VERBOSE_CMD)$(OBJCOPY) -O ihex $< $@
+ $(VERBOSE_NL)
+
# Create binary image from ELF output file.
$(BIN): $(TGTFILE)
@echo $(MSG_BINARY_IMAGE)
$(VERBOSE_CMD)$(OBJCOPY) -O binary $< $@
$(VERBOSE_NL)
+
endif
diff --git a/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk b/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk
index 9f3d2749a..c776d5341 100644
--- a/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk
+++ b/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk
@@ -42,12 +42,15 @@ UTIL_PATH = $(PRJ_PATH)/UTILS
# CPU architecture: {ap|uc}
ARCH = uc
-# Part: {none|ap7000|ap7010|ap7020|uc3a0256|uc3a0512|uc3a1128|uc3a1256|uc3a1512}
+# Part: {none|ap7xxx|uc3xxxxx}
PART = uc3a0512
-# Flash memories: [type@address,size]...
+# Flash memories: [{cfi|internal}@address,size]...
FLASH = internal@0x80000000,512Kb
+# Clock source to use when programming: [{xtal|extclk|int}]
+PROG_CLOCK = xtal
+
# Device/Platform/Board include path
PLATFORM_INC_PATH = \
$(BRDS_PATH)/
@@ -57,13 +60,15 @@ TARGET = rtosdemo.elf
# Definitions: [-D name[=definition]...] [-U name...]
# Things that might be added to DEFS:
-# BOARD Board used: {EVK1100}
+# BOARD Board used: {EVKxxxx}
+# EXT_BOARD Extension board used (if any): {EXTxxxx}
DEFS = -D BOARD=EVK1100
# Include path
INC_PATH = \
$(UTIL_PATH)/ \
$(UTIL_PATH)/PREPROCESSOR/ \
+ $(SERV_PATH)/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/ \
$(DRVR_PATH)/INTC/ \
$(DRVR_PATH)/PM/ \
$(DRVR_PATH)/GPIO/ \
@@ -81,7 +86,7 @@ CSRCS = \
$(DRVR_PATH)/GPIO/gpio.c \
$(DRVR_PATH)/TC/tc.c \
../../../../Source/portable/GCC/AVR32_UC3/port.c \
- ../../../../Source/portable/MemMang/heap_3.c \
+ ../../../../Source/portable/MemMang/heap_2.c \
../../../../Source/list.c \
../../../../Source/queue.c \
../../../../Source/tasks.c \
@@ -100,6 +105,7 @@ CSRCS = \
# Assembler source files
ASSRCS = \
+ $(SERV_PATH)/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S \
../../../../Source/portable/GCC/AVR32_UC3/exception.S
# Library path
@@ -109,7 +115,7 @@ LIB_PATH =
LIBS =
# Linker script file if any
-LINKER_SCRIPT =
+LINKER_SCRIPT = $(UTIL_PATH)/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds
# Options to request or suppress warnings: [-fsyntax-only] [-pedantic[-errors]] [-w] [-Wwarning...]
# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
@@ -127,13 +133,13 @@ OPTIMIZATION = -O0 -ffunction-sections -fdata-sections
CPP_EXTRA_FLAGS =
# Extra flags to use when compiling
-C_EXTRA_FLAGS = -DGCC_AVR32_PORT
+C_EXTRA_FLAGS =
# Extra flags to use when assembling
AS_EXTRA_FLAGS =
# Extra flags to use when linking
-LD_EXTRA_FLAGS = -Wl,--gc-sections
+LD_EXTRA_FLAGS = -Wl,--gc-sections -Wl,-e,_trampoline
# Documentation path
DOC_PATH = \
@@ -141,4 +147,4 @@ DOC_PATH = \
# Documentation configuration file
DOC_CFG = \
- ../../doxyfile.doxygen
+ ../doxyfile.doxygen
diff --git a/Demo/AVR32_UC3/AT32UC3A/GCC/gdb_cmdfile.txt b/Demo/AVR32_UC3/AT32UC3A/GCC/gdb_cmdfile.txt
new file mode 100644
index 000000000..dfe1fc174
--- /dev/null
+++ b/Demo/AVR32_UC3/AT32UC3A/GCC/gdb_cmdfile.txt
@@ -0,0 +1,29 @@
+target extended-remote :4711
+symbol uc3a0512-rtosdemo.elf
+
+b _handle_Unrecoverable_Exception
+b _handle_TLB_Multiple_Hit
+b _handle_Bus_Error_Data_Fetch
+b _handle_Bus_Error_Instruction_Fetch
+b _handle_NMI
+b _handle_Instruction_Address
+b _handle_ITLB_Protection
+b _handle_Breakpoint
+b _handle_Illegal_Opcode
+b _handle_Unimplemented_Instruction
+b _handle_Privilege_Violation
+b _handle_Floating_Point
+b _handle_Coprocessor_Absent
+b _handle_Data_Address_Read
+b _handle_Data_Address_Write
+b _handle_DTLB_Protection_Read
+b _handle_DTLB_Protection_Write
+b _handle_DTLB_Modified
+b _handle_ITLB_Miss
+b _handle_DTLB_Miss_Read
+b _handle_DTLB_Miss_Write
+
+define current_task
+printf "Task name: %s\n", ((tskTCB *)pxCurrentTCB)->pcTaskName
+printf "pxTopOfStack: %x\n", ((tskTCB *)pxCurrentTCB)->pxTopOfStack
+end
diff --git a/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewd b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewd
index bc38c6ac9..aeb046dff 100644
--- a/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewd
+++ b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewd
@@ -71,9 +71,9 @@
JTAGICEMKIIAVR32
- 2
+ 3
- 0
+ 1
1
1
@@ -143,6 +143,14 @@
CJtagIceMkIIDaisyChainAfterBits
0
+
+ FlashLoaders
+
+
+
+ UseFlashLoader
+ 0
+
@@ -160,19 +168,19 @@
- $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
1
- $EW_DIR$\common\plugins\Orti\Orti.ewplugin
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
0
- $EW_DIR$\common\plugins\Profiling\Profiling.ewplugin
+ $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin
1
- $EW_DIR$\common\plugins\Stack\Stack.ewplugin
+ $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin
1
@@ -246,9 +254,9 @@
JTAGICEMKIIAVR32
- 2
+ 3
- 0
+ 1
1
0
@@ -318,6 +326,14 @@
CJtagIceMkIIDaisyChainAfterBits
0
+
+ FlashLoaders
+
+
+
+ UseFlashLoader
+ 0
+
@@ -335,19 +351,19 @@
- $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
1
- $EW_DIR$\common\plugins\Orti\Orti.ewplugin
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
0
- $EW_DIR$\common\plugins\Profiling\Profiling.ewplugin
+ $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin
1
- $EW_DIR$\common\plugins\Stack\Stack.ewplugin
+ $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin
1
diff --git a/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp
index a4ff3bfe7..0a9a40bb7 100644
--- a/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp
+++ b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp
@@ -149,15 +149,14 @@
ICCAVR32
- 2
+ 3
- 4
+ 5
1
1
CCDefines
BOARD=EVK1100
- IAR_AVR32_PORT
CCPreprocFile
@@ -247,15 +246,6 @@
CCCharIs
1
-
- CCOptSizeSpeed
- 1
-
-
- CCOptimization
- 0
- 1
-
CCAllowList
0
@@ -289,15 +279,6 @@
CCLangSelect
0
-
- CCOptSizeSpeedSlave
- 1
-
-
- CCOptimizationSlave
- 0
- 1
-
CCLibConfigHeader
1
@@ -354,6 +335,19 @@
CCModuleType
0
+
+ CCOptLevel
+ 1
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 1
+
@@ -503,15 +497,7 @@
JAVATOC
0
-
- 0
- 1
- 1
-
- JavaToCDummy
- 1
-
-
+
CUSTOM
@@ -556,7 +542,7 @@
FormatVariant
- 7
+ 8
2
@@ -609,11 +595,11 @@
XclOverride
- 0
+ 1
XclFile
- $TOOLKIT_DIR$\config\lnkuc3a0512.xcl
+ $PROJ_DIR$\..\..\UTILS\LINKER_SCRIPTS\AT32UC3A\0512\IAR\lnkuc3a0512.xcl
XclFileSlave
@@ -697,7 +683,7 @@
xcProgramEntryLabel
- __program_start
+ __trampoline
DebugInformation
@@ -713,19 +699,19 @@
AllowExtraOutput
- 0
+ 1
GenerateExtraOutput
- 0
+ 1
XExtraOutOverride
- 0
+ 1
ExtraOutputFile
- rtosdemo.a82
+ rtosdemo.hex
ExtraOutputFormat
@@ -734,12 +720,12 @@
ExtraFormatVariant
- 7
+ 8
2
xcOverrideProgramEntryLabel
- 0
+ 1
xcProgramEntryLabelSelect
@@ -973,15 +959,14 @@
ICCAVR32
- 2
+ 3
- 4
+ 5
1
0
CCDefines
BOARD=EVK1100
- IAR_AVR32_PORT
CCPreprocFile
@@ -1071,15 +1056,6 @@
CCCharIs
1
-
- CCOptSizeSpeed
- 1
-
-
- CCOptimization
- 0
- 3
-
CCAllowList
0
@@ -1113,15 +1089,6 @@
CCLangSelect
0
-
- CCOptSizeSpeedSlave
- 1
-
-
- CCOptimizationSlave
- 0
- 3
-
CCLibConfigHeader
1
@@ -1178,6 +1145,19 @@
CCModuleType
0
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 2
+
+
+ CCOptLevelSlave
+ 3
+
@@ -1327,15 +1307,7 @@
JAVATOC
0
-
- 0
- 1
- 0
-
- JavaToCDummy
- 1
-
-
+
CUSTOM
@@ -1380,7 +1352,7 @@
FormatVariant
- 7
+ 8
2
@@ -1433,11 +1405,11 @@
XclOverride
- 0
+ 1
XclFile
- $TOOLKIT_DIR$\config\lnkuc3a0512.xcl
+ $PROJ_DIR$\..\..\UTILS\LINKER_SCRIPTS\AT32UC3A\0512\IAR\lnkuc3a0512.xcl
XclFileSlave
@@ -1521,7 +1493,7 @@
xcProgramEntryLabel
- __program_start
+ __trampoline
DebugInformation
@@ -1537,19 +1509,19 @@
AllowExtraOutput
- 0
+ 1
GenerateExtraOutput
- 0
+ 1
XExtraOutOverride
- 0
+ 1
ExtraOutputFile
- rtosdemo.a82
+ rtosdemo.hex
ExtraOutputFormat
@@ -1558,12 +1530,12 @@
ExtraFormatVariant
- 7
+ 8
2
xcOverrideProgramEntryLabel
- 0
+ 1
xcProgramEntryLabelSelect
@@ -1655,6 +1627,9 @@
$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\read.c
+
+ $PROJ_DIR$\..\..\SERVICES\USB\CLASS\DFU\EXAMPLES\ISP\BOOT\trampoline.s82
+
$PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\write.c
diff --git a/Demo/AVR32_UC3/AT32UC3A/doxyfile.doxygen b/Demo/AVR32_UC3/AT32UC3A/doxyfile.doxygen
new file mode 100644
index 000000000..08f4a05a1
--- /dev/null
+++ b/Demo/AVR32_UC3/AT32UC3A/doxyfile.doxygen
@@ -0,0 +1,232 @@
+# Doxyfile 1.4.7
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+PROJECT_NAME = "AVR32 UC3 - FreeRTOS Real Time Kernel"
+PROJECT_NUMBER =
+OUTPUT_DIRECTORY = ../DOC
+CREATE_SUBDIRS = NO
+OUTPUT_LANGUAGE = English
+USE_WINDOWS_ENCODING = YES
+BRIEF_MEMBER_DESC = YES
+REPEAT_BRIEF = YES
+ABBREVIATE_BRIEF =
+ALWAYS_DETAILED_SEC = NO
+INLINE_INHERITED_MEMB = NO
+FULL_PATH_NAMES = NO
+STRIP_FROM_PATH =
+STRIP_FROM_INC_PATH =
+SHORT_NAMES = NO
+JAVADOC_AUTOBRIEF = YES
+MULTILINE_CPP_IS_BRIEF = NO
+DETAILS_AT_TOP = YES
+INHERIT_DOCS = YES
+SEPARATE_MEMBER_PAGES = NO
+TAB_SIZE = 4
+ALIASES =
+OPTIMIZE_OUTPUT_FOR_C = YES
+OPTIMIZE_OUTPUT_JAVA = NO
+BUILTIN_STL_SUPPORT = NO
+DISTRIBUTE_GROUP_DOC = NO
+SUBGROUPING = YES
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+EXTRACT_ALL = YES
+EXTRACT_PRIVATE = NO
+EXTRACT_STATIC = YES
+EXTRACT_LOCAL_CLASSES = YES
+EXTRACT_LOCAL_METHODS = NO
+HIDE_UNDOC_MEMBERS = NO
+HIDE_UNDOC_CLASSES = NO
+HIDE_FRIEND_COMPOUNDS = NO
+HIDE_IN_BODY_DOCS = NO
+INTERNAL_DOCS = YES
+CASE_SENSE_NAMES = YES
+HIDE_SCOPE_NAMES = NO
+SHOW_INCLUDE_FILES = YES
+INLINE_INFO = YES
+SORT_MEMBER_DOCS = YES
+SORT_BRIEF_DOCS = YES
+SORT_BY_SCOPE_NAME = NO
+GENERATE_TODOLIST = YES
+GENERATE_TESTLIST = YES
+GENERATE_BUGLIST = YES
+GENERATE_DEPRECATEDLIST= YES
+ENABLED_SECTIONS =
+MAX_INITIALIZER_LINES = 30
+SHOW_USED_FILES = NO
+SHOW_DIRECTORIES = NO
+FILE_VERSION_FILTER =
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+QUIET = YES
+WARNINGS = YES
+WARN_IF_UNDOCUMENTED = YES
+WARN_IF_DOC_ERROR = YES
+WARN_NO_PARAMDOC = NO
+WARN_FORMAT = "$file:$line: $text"
+WARN_LOGFILE =
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+INPUT = ./../ ./../../../Source ./../../Common/include ./../../Common/Minimal
+FILE_PATTERNS = *.c \
+ *.h \
+ *.S
+RECURSIVE = YES
+EXCLUDE =
+EXCLUDE_SYMLINKS = NO
+EXCLUDE_PATTERNS =
+EXAMPLE_PATH =
+EXAMPLE_PATTERNS =
+EXAMPLE_RECURSIVE = NO
+IMAGE_PATH = ./../
+INPUT_FILTER =
+FILTER_PATTERNS =
+FILTER_SOURCE_FILES = NO
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+SOURCE_BROWSER = YES
+INLINE_SOURCES = YES
+STRIP_CODE_COMMENTS = YES
+REFERENCED_BY_RELATION = YES
+REFERENCES_RELATION = YES
+REFERENCES_LINK_SOURCE = YES
+USE_HTAGS = NO
+VERBATIM_HEADERS = YES
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+ALPHABETICAL_INDEX = NO
+COLS_IN_ALPHA_INDEX = 5
+IGNORE_PREFIX =
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+GENERATE_HTML = YES
+HTML_OUTPUT =
+HTML_FILE_EXTENSION = .html
+HTML_HEADER =
+HTML_FOOTER =
+HTML_STYLESHEET =
+HTML_ALIGN_MEMBERS = YES
+GENERATE_HTMLHELP = NO
+CHM_FILE =
+HHC_LOCATION =
+GENERATE_CHI = NO
+BINARY_TOC = NO
+TOC_EXPAND = NO
+DISABLE_INDEX = NO
+ENUM_VALUES_PER_LINE = 4
+GENERATE_TREEVIEW = YES
+TREEVIEW_WIDTH = 250
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+GENERATE_LATEX = NO
+LATEX_OUTPUT = latex
+LATEX_CMD_NAME = latex
+MAKEINDEX_CMD_NAME = makeindex
+COMPACT_LATEX = NO
+PAPER_TYPE = a4wide
+EXTRA_PACKAGES =
+LATEX_HEADER =
+PDF_HYPERLINKS = NO
+USE_PDFLATEX = NO
+LATEX_BATCHMODE = NO
+LATEX_HIDE_INDICES = NO
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+GENERATE_RTF = NO
+RTF_OUTPUT = RTF
+COMPACT_RTF = NO
+RTF_HYPERLINKS = YES
+RTF_STYLESHEET_FILE =
+RTF_EXTENSIONS_FILE =
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+GENERATE_MAN = NO
+MAN_OUTPUT = man
+MAN_EXTENSION = .3
+MAN_LINKS = NO
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+GENERATE_XML = NO
+XML_OUTPUT = xml
+XML_SCHEMA =
+XML_DTD =
+XML_PROGRAMLISTING = YES
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+GENERATE_AUTOGEN_DEF = NO
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+GENERATE_PERLMOD = NO
+PERLMOD_LATEX = NO
+PERLMOD_PRETTY = YES
+PERLMOD_MAKEVAR_PREFIX =
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+ENABLE_PREPROCESSING = YES
+MACRO_EXPANSION = YES
+EXPAND_ONLY_PREDEF = YES
+SEARCH_INCLUDES = YES
+INCLUDE_PATH = ../../../../../BOARDS/
+INCLUDE_FILE_PATTERNS =
+PREDEFINED = __GNUC__=4 \
+ __attribute__()= \
+ __AVR32__=1 \
+ __AVR32_UC3A0512__=1 \
+ __AVR32_ABI_COMPILER__ \
+ BOARD=EVK1100
+EXPAND_AS_DEFINED =
+SKIP_FUNCTION_MACROS = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references
+#---------------------------------------------------------------------------
+TAGFILES =
+GENERATE_TAGFILE =
+ALLEXTERNALS = NO
+EXTERNAL_GROUPS = YES
+PERL_PATH = /usr/bin/perl
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+CLASS_DIAGRAMS = NO
+HIDE_UNDOC_RELATIONS = YES
+HAVE_DOT = NO
+CLASS_GRAPH = NO
+COLLABORATION_GRAPH = NO
+GROUP_GRAPHS = NO
+UML_LOOK = YES
+TEMPLATE_RELATIONS = YES
+INCLUDE_GRAPH = NO
+INCLUDED_BY_GRAPH = NO
+CALL_GRAPH = NO
+CALLER_GRAPH = NO
+GRAPHICAL_HIERARCHY = NO
+DIRECTORY_GRAPH = NO
+DOT_IMAGE_FORMAT = png
+DOT_PATH =
+DOTFILE_DIRS =
+MAX_DOT_GRAPH_WIDTH = 1024
+MAX_DOT_GRAPH_HEIGHT = 1024
+MAX_DOT_GRAPH_DEPTH = 0
+DOT_TRANSPARENT = NO
+DOT_MULTI_TARGETS = NO
+GENERATE_LEGEND = YES
+DOT_CLEANUP = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine
+#---------------------------------------------------------------------------
+SEARCHENGINE = NO
diff --git a/Demo/AVR32_UC3/AT32UC3B/GCC/Makefile b/Demo/AVR32_UC3/AT32UC3B/GCC/Makefile
new file mode 100644
index 000000000..55ee8bc9a
--- /dev/null
+++ b/Demo/AVR32_UC3/AT32UC3B/GCC/Makefile
@@ -0,0 +1,619 @@
+# Hey Emacs, this is a -*- makefile -*-
+
+# Goals available on make command line:
+#
+# [all] Default goal: build the project.
+# clean Clean up the project.
+# rebuild Rebuild the project.
+# ccversion Display CC version information.
+# cppfiles file.i Generate preprocessed files from C source files.
+# asfiles file.x Generate preprocessed assembler files from C and assembler source files.
+# objfiles file.o Generate object files from C and assembler source files.
+# a file.a Archive: create A output file from object files.
+# elf file.elf Link: create ELF output file from object files.
+# lss file.lss Create extended listing from target output file.
+# sym file.sym Create symbol table from target output file.
+# hex file.hex Create Intel HEX image from ELF output file.
+# bin file.bin Create binary image from ELF output file.
+# sizes Display target size information.
+# isp Use ISP instead of JTAGICE mkII when programming.
+# cpuinfo Get CPU information.
+# halt Stop CPU execution.
+# chiperase Perform a JTAG Chip Erase command.
+# erase Perform a flash chip erase.
+# program Program MCU memory from ELF output file.
+# secureflash Protect chip by setting security bit.
+# reset Reset MCU.
+# debug Open a debug connection with the MCU.
+# run Start CPU execution.
+# readregs Read CPU registers.
+# doc Build the documentation.
+# cleandoc Clean up the documentation.
+# rebuilddoc Rebuild the documentation.
+# verbose Display main executed commands.
+
+# Copyright (c) 2007, Atmel Corporation All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation and/
+# or other materials provided with the distribution.
+#
+# 3. The name of ATMEL may not be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+# ENVIRONMENT SETTINGS
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+
+FirstWord = $(if $(1),$(word 1,$(1)))
+LastWord = $(if $(1),$(word $(words $(1)),$(1)))
+
+MAKE = make
+MAKECFG = config.mk
+TGTTYPE = $(suffix $(TARGET))
+TGTFILE = $(PART)-$(TARGET)
+
+RM = rm -Rf
+
+AR = avr32-ar
+ARFLAGS = rcs
+
+CPP = $(CC) -E
+CPPFLAGS = -march=$(ARCH) -mpart=$(PART) $(WARNINGS) $(DEFS) \
+ $(PLATFORM_INC_PATH:%=-I%) $(INC_PATH:%=-I%) $(CPP_EXTRA_FLAGS)
+DPNDFILES = $(CSRCS:.c=.d) $(ASSRCS:.S=.d)
+CPPFILES = $(CSRCS:.c=.i)
+
+CC = avr32-gcc
+CFLAGS = $(DEBUG) $(OPTIMIZATION) $(C_EXTRA_FLAGS) \
+ $(PLATFORM_INC_PATH:%=-Wa,-I%) $(INC_PATH:%=-Wa,-I%) $(AS_EXTRA_FLAGS)
+ASFILES = $(CSRCS:.c=.x) $(ASSRCS:.S=.x)
+
+AS = avr32-as
+ASFLAGS = $(DEBUG) \
+ $(PLATFORM_INC_PATH:%=-Wa,-I%) $(INC_PATH:%=-Wa,-I%) $(AS_EXTRA_FLAGS)
+OBJFILES = $(CSRCS:.c=.o) $(ASSRCS:.S=.o)
+
+LD = avr32-ld
+LDFLAGS = -march=$(ARCH) -mpart=$(PART) \
+ $(LIB_PATH:%=-L%) $(LINKER_SCRIPT:%=-T%) $(LD_EXTRA_FLAGS)
+LOADLIBES =
+LDLIBS = $(LIBS:%=-l%)
+
+OBJDUMP = avr32-objdump
+LSS = $(TGTFILE:$(TGTTYPE)=.lss)
+
+NM = avr32-nm
+SYM = $(TGTFILE:$(TGTTYPE)=.sym)
+
+OBJCOPY = avr32-objcopy
+HEX = $(TGTFILE:$(TGTTYPE)=.hex)
+BIN = $(TGTFILE:$(TGTTYPE)=.bin)
+
+SIZE = avr32-size
+
+SLEEP = sleep
+SLEEPUSB = 9
+
+PROGRAM = avr32program
+
+ISP = batchisp
+ISPFLAGS = -device at32$(PART) -hardware usb -operation
+
+DBGPROXY = avr32gdbproxy
+
+DOCGEN = doxygen
+
+
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+# MESSAGES
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+
+ERR_TARGET_TYPE = Target type not supported: `$(TGTTYPE)'
+MSG_CLEANING = Cleaning project.
+MSG_PREPROCESSING = Preprocessing \`$<\' to \`$@\'.
+MSG_COMPILING = Compiling \`$<\' to \`$@\'.
+MSG_ASSEMBLING = Assembling \`$<\' to \`$@\'.
+MSG_ARCHIVING = Archiving to \`$@\'.
+MSG_LINKING = Linking to \`$@\'.
+MSG_EXTENDED_LISTING = Creating extended listing to \`$@\'.
+MSG_SYMBOL_TABLE = Creating symbol table to \`$@\'.
+MSG_IHEX_IMAGE = Creating Intel HEX image to \`$@\'.
+MSG_BINARY_IMAGE = Creating binary image to \`$@\'.
+MSG_GETTING_CPU_INFO = Getting CPU information.
+MSG_HALTING = Stopping CPU execution.
+MSG_ERASING_CHIP = Performing a JTAG Chip Erase command.
+MSG_ERASING = Performing a flash chip erase.
+MSG_PROGRAMMING = Programming MCU memory from \`$(TGTFILE)\'.
+MSG_SECURING_FLASH = Protecting chip by setting security bit.
+MSG_RESETTING = Resetting MCU.
+MSG_DEBUGGING = Opening debug connection with MCU.
+MSG_RUNNING = Starting CPU execution.
+MSG_READING_CPU_REGS = Reading CPU registers.
+MSG_CLEANING_DOC = Cleaning documentation.
+MSG_GENERATING_DOC = Generating documentation to \`$(DOC_PATH)\'.
+
+
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+# MAKE RULES
+# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
+
+# Include the make configuration file.
+include $(MAKECFG)
+
+# ** ** TOP-LEVEL RULES ** **
+
+# Default goal: build the project.
+ifeq ($(TGTTYPE),.a)
+.PHONY: all
+all: ccversion a lss sym sizes
+else
+ifeq ($(TGTTYPE),.elf)
+.PHONY: all
+all: ccversion elf lss sym hex bin sizes
+else
+$(error $(ERR_TARGET_TYPE))
+endif
+endif
+
+# Clean up the project.
+.PHONY: clean
+clean:
+ @echo $(MSG_CLEANING)
+ -$(VERBOSE_CMD)$(RM) $(BIN)
+ -$(VERBOSE_CMD)$(RM) $(HEX)
+ -$(VERBOSE_CMD)$(RM) $(SYM)
+ -$(VERBOSE_CMD)$(RM) $(LSS)
+ -$(VERBOSE_CMD)$(RM) $(TGTFILE)
+ -$(VERBOSE_CMD)$(RM) $(OBJFILES)
+ -$(VERBOSE_CMD)$(RM) $(ASFILES)
+ -$(VERBOSE_CMD)$(RM) $(CPPFILES)
+ -$(VERBOSE_CMD)$(RM) $(DPNDFILES)
+ $(VERBOSE_NL)
+
+# Rebuild the project.
+.PHONY: rebuild
+rebuild: clean all
+
+# Display CC version information.
+.PHONY: ccversion
+ccversion:
+ @echo
+ @echo
+ @$(CC) --version
+
+# Generate preprocessed files from C source files.
+.PHONY: cppfiles
+cppfiles: $(CPPFILES)
+
+# Generate preprocessed assembler files from C and assembler source files.
+.PHONY: asfiles
+asfiles: $(ASFILES)
+
+# Generate object files from C and assembler source files.
+.PHONY: objfiles
+objfiles: $(OBJFILES)
+
+ifeq ($(TGTTYPE),.a)
+# Archive: create A output file from object files.
+.PHONY: a
+a: $(TGTFILE)
+else
+ifeq ($(TGTTYPE),.elf)
+# Link: create ELF output file from object files.
+.PHONY: elf
+elf: $(TGTFILE)
+endif
+endif
+
+# Create extended listing from target output file.
+.PHONY: lss
+lss: $(LSS)
+
+# Create symbol table from target output file.
+.PHONY: sym
+sym: $(SYM)
+
+ifeq ($(TGTTYPE),.elf)
+
+# Create Intel HEX image from ELF output file.
+.PHONY: hex
+hex: $(HEX)
+
+# Create binary image from ELF output file.
+.PHONY: bin
+bin: $(BIN)
+
+endif
+
+# Display target size information.
+.PHONY: sizes
+sizes: $(TGTFILE)
+ @echo
+ @echo
+ifeq ($(TGTTYPE),.a)
+ @$(SIZE) -Bxt $<
+else
+ifeq ($(TGTTYPE),.elf)
+ @$(SIZE) -Ax $<
+ @$(SIZE) -Bx $<
+endif
+endif
+ @echo
+ @echo
+
+ifeq ($(TGTTYPE),.elf)
+
+# Use ISP instead of JTAGICE mkII when programming.
+.PHONY: isp
+ifeq ($(filter-out isp verbose,$(MAKECMDGOALS)),)
+isp: all
+else
+isp:
+ @:
+endif
+
+ifeq ($(findstring isp,$(MAKECMDGOALS)),)
+
+# Get CPU information.
+.PHONY: cpuinfo
+cpuinfo:
+ @echo
+ @echo $(MSG_GETTING_CPU_INFO)
+ $(VERBOSE_CMD)$(PROGRAM) cpuinfo
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),cpuinfo)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Stop CPU execution.
+.PHONY: halt
+halt:
+ifeq ($(filter cpuinfo chiperase erase program secureflash reset run readregs,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_HALTING)
+ $(VERBOSE_CMD)$(PROGRAM) halt
+ifneq ($(call LastWord,$(filter halt debug,$(MAKECMDGOALS))),halt)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+else
+ @:
+endif
+
+# Perform a JTAG Chip Erase command.
+.PHONY: chiperase
+chiperase:
+ @echo
+ @echo $(MSG_ERASING_CHIP)
+ $(VERBOSE_CMD)$(PROGRAM) chiperase
+ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash reset debug run readregs,$(MAKECMDGOALS))),chiperase)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Perform a flash chip erase.
+.PHONY: erase
+erase:
+ifeq ($(filter chiperase program,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_ERASING)
+ $(VERBOSE_CMD)$(PROGRAM) erase $(FLASH:%=-f%)
+ifneq ($(call LastWord,$(filter cpuinfo erase secureflash reset debug run readregs,$(MAKECMDGOALS))),erase)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+else
+ @:
+endif
+
+# Program MCU memory from ELF output file.
+.PHONY: program
+program: all
+ @echo
+ @echo $(MSG_PROGRAMMING)
+ $(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TGTFILE)
+ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash debug readregs,$(MAKECMDGOALS))),program)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Protect chip by setting security bit.
+.PHONY: secureflash
+secureflash:
+ @echo
+ @echo $(MSG_SECURING_FLASH)
+ $(VERBOSE_CMD)$(PROGRAM) secureflash
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),secureflash)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Reset MCU.
+.PHONY: reset
+reset:
+ifeq ($(filter program run,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_RESETTING)
+ $(VERBOSE_CMD)$(PROGRAM) reset
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase secureflash reset debug readregs,$(MAKECMDGOALS))),reset)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+else
+ @:
+endif
+
+# Open a debug connection with the MCU.
+.PHONY: debug
+debug:
+ @echo
+ @echo $(MSG_DEBUGGING)
+ $(VERBOSE_CMD)$(DBGPROXY) $(FLASH:%=-f%)
+ifneq ($(call LastWord,$(filter cpuinfo halt chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),debug)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Start CPU execution.
+.PHONY: run
+run:
+ifeq ($(findstring program,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_RUNNING)
+ $(VERBOSE_CMD)$(PROGRAM) run $(if $(findstring reset,$(MAKECMDGOALS)),-R)
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase secureflash debug run readregs,$(MAKECMDGOALS))),run)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+else
+ @:
+endif
+
+# Read CPU registers.
+.PHONY: readregs
+readregs:
+ @echo
+ @echo $(MSG_READING_CPU_REGS)
+ $(VERBOSE_CMD)$(PROGRAM) readregs
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),readregs)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+else
+
+# Perform a flash chip erase.
+.PHONY: erase
+erase:
+ifeq ($(findstring program,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_ERASING)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck
+ifeq ($(call LastWord,$(filter erase secureflash debug run,$(MAKECMDGOALS))),erase)
+ @echo
+endif
+else
+ @:
+endif
+
+# Program MCU memory from ELF output file.
+.PHONY: program
+program: all
+ @echo
+ @echo $(MSG_PROGRAMMING)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TGTFILE) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
+ifeq ($(call LastWord,$(filter program secureflash debug,$(MAKECMDGOALS))),program)
+ @echo
+endif
+
+# Protect chip by setting security bit.
+.PHONY: secureflash
+secureflash:
+ @echo
+ @echo $(MSG_SECURING_FLASH)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) memory security addrange 0x0 0x0 fillbuffer 0x01 program $(if $(findstring run,$(MAKECMDGOALS)),start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0)
+ifeq ($(call LastWord,$(filter erase program secureflash debug,$(MAKECMDGOALS))),secureflash)
+ @echo
+endif
+
+# Reset MCU.
+.PHONY: reset
+reset:
+ @:
+
+# Open a debug connection with the MCU.
+.PHONY: debug
+debug:
+ @echo
+ @echo $(MSG_DEBUGGING)
+ $(VERBOSE_CMD)$(DBGPROXY) $(FLASH:%=-f%)
+ifeq ($(call LastWord,$(filter erase program secureflash debug run,$(MAKECMDGOALS))),debug)
+ @echo
+endif
+
+# Start CPU execution.
+.PHONY: run
+run:
+ifeq ($(filter program secureflash,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_RUNNING)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0
+ifeq ($(call LastWord,$(filter erase debug run,$(MAKECMDGOALS))),run)
+ @echo
+endif
+else
+ @:
+endif
+
+endif
+
+endif
+
+# Build the documentation.
+.PHONY: doc
+doc:
+ @echo
+ @echo $(MSG_GENERATING_DOC)
+ $(VERBOSE_CMD)cd $(dir $(DOC_CFG)) && $(DOCGEN) $(notdir $(DOC_CFG))
+ @echo
+
+# Clean up the documentation.
+.PHONY: cleandoc
+cleandoc:
+ @echo $(MSG_CLEANING_DOC)
+ -$(VERBOSE_CMD)$(RM) $(DOC_PATH)
+ $(VERBOSE_NL)
+
+# Rebuild the documentation.
+.PHONY: rebuilddoc
+rebuilddoc: cleandoc doc
+
+# Display main executed commands.
+.PHONY: verbose
+ifeq ($(filter-out isp verbose,$(MAKECMDGOALS)),)
+verbose: all
+else
+verbose:
+ @:
+endif
+ifneq ($(findstring verbose,$(MAKECMDGOALS)),)
+# Prefix displaying the following command if and only if verbose is a goal.
+VERBOSE_CMD =
+# New line displayed if and only if verbose is a goal.
+VERBOSE_NL = @echo
+else
+VERBOSE_CMD = @
+VERBOSE_NL =
+endif
+
+# ** ** COMPILATION RULES ** **
+
+# Include silently the dependency files.
+-include $(DPNDFILES)
+
+# The dependency files are not built alone but along with first generation files.
+$(DPNDFILES):
+
+# First generation files depend on make files.
+$(CPPFILES) $(ASFILES) $(OBJFILES): Makefile $(MAKECFG)
+
+ifeq ($(TGTTYPE),.elf)
+# Files resulting from linking depend on linker script.
+$(TGTFILE): $(LINKER_SCRIPT)
+endif
+
+# Preprocess: create preprocessed files from C source files.
+%.i: %.c %.d
+ @echo $(MSG_PREPROCESSING)
+ $(VERBOSE_CMD)$(CPP) $(CPPFLAGS) -MD -MP -MT '$*.i $*.x $*.o' -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+# Preprocess & compile: create assembler files from C source files.
+%.x: %.c %.d
+ @echo $(MSG_COMPILING)
+ $(VERBOSE_CMD)$(CC) -S $(CPPFLAGS) -MD -MP -MT '$*.i $*.o' $(CFLAGS) -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+# Preprocess: create preprocessed files from assembler source files.
+%.x: %.S %.d
+ @echo $(MSG_PREPROCESSING)
+ $(VERBOSE_CMD)$(CPP) $(CPPFLAGS) -MD -MP -MT '$*.x $*.o' -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+# Preprocess, compile & assemble: create object files from C source files.
+%.o: %.c %.d
+ @echo $(MSG_COMPILING)
+ $(VERBOSE_CMD)$(CC) -c $(CPPFLAGS) -MD -MP -MT '$*.i $*.x' $(CFLAGS) -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+# Preprocess & assemble: create object files from assembler source files.
+%.o: %.S %.d
+ @echo $(MSG_ASSEMBLING)
+ $(VERBOSE_CMD)$(CC) -c $(CPPFLAGS) -MD -MP -MT '$*.x' $(ASFLAGS) -o $@ $<
+ @touch $*.d
+ @touch $@
+ $(VERBOSE_NL)
+
+.PRECIOUS: $(OBJFILES)
+ifeq ($(TGTTYPE),.a)
+# Archive: create A output file from object files.
+.SECONDARY: $(TGTFILE)
+$(TGTFILE): $(OBJFILES)
+ @echo $(MSG_ARCHIVING)
+ $(VERBOSE_CMD)$(AR) $(ARFLAGS) $@ $(filter %.o,$+)
+ $(VERBOSE_NL)
+else
+ifeq ($(TGTTYPE),.elf)
+# Link: create ELF output file from object files.
+.SECONDARY: $(TGTFILE)
+$(TGTFILE): $(OBJFILES)
+ @echo $(MSG_LINKING)
+ $(VERBOSE_CMD)$(CC) $(LDFLAGS) $(filter %.o,$+) $(LOADLIBES) $(LDLIBS) -o $@
+ $(VERBOSE_NL)
+endif
+endif
+
+# Create extended listing from target output file.
+$(LSS): $(TGTFILE)
+ @echo $(MSG_EXTENDED_LISTING)
+ $(VERBOSE_CMD)$(OBJDUMP) -h -S $< > $@
+ $(VERBOSE_NL)
+
+# Create symbol table from target output file.
+$(SYM): $(TGTFILE)
+ @echo $(MSG_SYMBOL_TABLE)
+ $(VERBOSE_CMD)$(NM) -n $< > $@
+ $(VERBOSE_NL)
+
+ifeq ($(TGTTYPE),.elf)
+
+# Create Intel HEX image from ELF output file.
+$(HEX): $(TGTFILE)
+ @echo $(MSG_IHEX_IMAGE)
+ $(VERBOSE_CMD)$(OBJCOPY) -O ihex $< $@
+ $(VERBOSE_NL)
+
+# Create binary image from ELF output file.
+$(BIN): $(TGTFILE)
+ @echo $(MSG_BINARY_IMAGE)
+ $(VERBOSE_CMD)$(OBJCOPY) -O binary $< $@
+ $(VERBOSE_NL)
+
+endif
diff --git a/Demo/AVR32_UC3/AT32UC3B/GCC/config.mk b/Demo/AVR32_UC3/AT32UC3B/GCC/config.mk
new file mode 100644
index 000000000..ede96076b
--- /dev/null
+++ b/Demo/AVR32_UC3/AT32UC3B/GCC/config.mk
@@ -0,0 +1,150 @@
+# Hey Emacs, this is a -*- makefile -*-
+
+# The purpose of this file is to define the build configuration variables used
+# by the generic Makefile. See Makefile header for further information.
+
+# Copyright (c) 2007, Atmel Corporation All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation and/
+# or other materials provided with the distribution.
+#
+# 3. The name of ATMEL may not be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+# Base paths
+PRJ_PATH = ../..
+APPS_PATH = $(PRJ_PATH)/APPLICATIONS
+BRDS_PATH = $(PRJ_PATH)/BOARDS
+COMP_PATH = $(PRJ_PATH)/COMPONENTS
+DRVR_PATH = $(PRJ_PATH)/DRIVERS
+SERV_PATH = $(PRJ_PATH)/SERVICES
+UTIL_PATH = $(PRJ_PATH)/UTILS
+
+# CPU architecture: {ap|uc}
+ARCH = uc
+
+# Part: {none|ap7xxx|uc3xxxxx}
+PART = uc3b0256
+
+# Flash memories: [{cfi|internal}@address,size]...
+FLASH = internal@0x80000000,256Kb
+
+# Clock source to use when programming: [{xtal|extclk|int}]
+PROG_CLOCK = xtal
+
+# Device/Platform/Board include path
+PLATFORM_INC_PATH = \
+ $(BRDS_PATH)/
+
+# Target name: {*.a|*.elf}
+TARGET = rtosdemo.elf
+
+# Definitions: [-D name[=definition]...] [-U name...]
+# Things that might be added to DEFS:
+# BOARD Board used: {EVKxxxx}
+# EXT_BOARD Extension board used (if any): {EXTxxxx}
+DEFS = -D BOARD=EVK1101
+
+# Include path
+INC_PATH = \
+ $(UTIL_PATH)/ \
+ $(UTIL_PATH)/PREPROCESSOR/ \
+ $(SERV_PATH)/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/ \
+ $(DRVR_PATH)/INTC/ \
+ $(DRVR_PATH)/PM/ \
+ $(DRVR_PATH)/GPIO/ \
+ $(DRVR_PATH)/TC/ \
+ ../../../../Source/portable/GCC/AVR32_UC3/ \
+ ../../../../Source/include/ \
+ ../../../Common/include/ \
+ ../../
+
+# C source files
+CSRCS = \
+ $(BRDS_PATH)/EVK1101/led.c \
+ $(DRVR_PATH)/INTC/intc.c \
+ $(DRVR_PATH)/PM/pm.c \
+ $(DRVR_PATH)/GPIO/gpio.c \
+ $(DRVR_PATH)/TC/tc.c \
+ ../../../../Source/portable/GCC/AVR32_UC3/port.c \
+ ../../../../Source/portable/MemMang/heap_2.c \
+ ../../../../Source/list.c \
+ ../../../../Source/queue.c \
+ ../../../../Source/tasks.c \
+ ../../../Common/Minimal/BlockQ.c \
+ ../../../Common/Minimal/comtest.c \
+ ../../../Common/Minimal/death.c \
+ ../../../Common/Minimal/dynamic.c \
+ ../../../Common/Minimal/flash.c \
+ ../../../Common/Minimal/flop.c \
+ ../../../Common/Minimal/integer.c \
+ ../../../Common/Minimal/PollQ.c \
+ ../../../Common/Minimal/semtest.c \
+ ../../ParTest/ParTest.c \
+ ../../serial/serial.c \
+ ../../main.c
+
+# Assembler source files
+ASSRCS = \
+ $(SERV_PATH)/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S \
+ ../../../../Source/portable/GCC/AVR32_UC3/exception.S
+
+# Library path
+LIB_PATH =
+
+# Libraries to link with the project
+LIBS =
+
+# Linker script file if any
+LINKER_SCRIPT = $(UTIL_PATH)/LINKER_SCRIPTS/AT32UC3B/0256/GCC/link_uc3b0256.lds
+
+# Options to request or suppress warnings: [-fsyntax-only] [-pedantic[-errors]] [-w] [-Wwarning...]
+# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
+WARNINGS = -Wall
+
+# Options for debugging: [-g]...
+# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
+DEBUG = -g
+
+# Options that control optimization: [-O[0|1|2|3|s]]...
+# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
+OPTIMIZATION = -O0 -ffunction-sections -fdata-sections
+
+# Extra flags to use when preprocessing
+CPP_EXTRA_FLAGS =
+
+# Extra flags to use when compiling
+C_EXTRA_FLAGS =
+
+# Extra flags to use when assembling
+AS_EXTRA_FLAGS =
+
+# Extra flags to use when linking
+LD_EXTRA_FLAGS = -Wl,--gc-sections -Wl,-e,_trampoline
+
+# Documentation path
+DOC_PATH = \
+ ../../DOC/
+
+# Documentation configuration file
+DOC_CFG = \
+ ../doxyfile.doxygen
diff --git a/Demo/AVR32_UC3/AT32UC3B/GCC/gdb_cmdfile.txt b/Demo/AVR32_UC3/AT32UC3B/GCC/gdb_cmdfile.txt
new file mode 100644
index 000000000..851f6f2e1
--- /dev/null
+++ b/Demo/AVR32_UC3/AT32UC3B/GCC/gdb_cmdfile.txt
@@ -0,0 +1,29 @@
+target extended-remote :4711
+symbol uc3b0256-rtosdemo.elf
+
+b _handle_Unrecoverable_Exception
+b _handle_TLB_Multiple_Hit
+b _handle_Bus_Error_Data_Fetch
+b _handle_Bus_Error_Instruction_Fetch
+b _handle_NMI
+b _handle_Instruction_Address
+b _handle_ITLB_Protection
+b _handle_Breakpoint
+b _handle_Illegal_Opcode
+b _handle_Unimplemented_Instruction
+b _handle_Privilege_Violation
+b _handle_Floating_Point
+b _handle_Coprocessor_Absent
+b _handle_Data_Address_Read
+b _handle_Data_Address_Write
+b _handle_DTLB_Protection_Read
+b _handle_DTLB_Protection_Write
+b _handle_DTLB_Modified
+b _handle_ITLB_Miss
+b _handle_DTLB_Miss_Read
+b _handle_DTLB_Miss_Write
+
+define current_task
+printf "Task name: %s\n", ((tskTCB *)pxCurrentTCB)->pcTaskName
+printf "pxTopOfStack: %x\n", ((tskTCB *)pxCurrentTCB)->pxTopOfStack
+end
diff --git a/Demo/AVR32_UC3/AT32UC3B/doxyfile.doxygen b/Demo/AVR32_UC3/AT32UC3B/doxyfile.doxygen
new file mode 100644
index 000000000..411dbadc4
--- /dev/null
+++ b/Demo/AVR32_UC3/AT32UC3B/doxyfile.doxygen
@@ -0,0 +1,232 @@
+# Doxyfile 1.4.7
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+PROJECT_NAME = "AVR32 UC3 - FreeRTOS Real Time Kernel"
+PROJECT_NUMBER =
+OUTPUT_DIRECTORY = ../DOC
+CREATE_SUBDIRS = NO
+OUTPUT_LANGUAGE = English
+USE_WINDOWS_ENCODING = YES
+BRIEF_MEMBER_DESC = YES
+REPEAT_BRIEF = YES
+ABBREVIATE_BRIEF =
+ALWAYS_DETAILED_SEC = NO
+INLINE_INHERITED_MEMB = NO
+FULL_PATH_NAMES = NO
+STRIP_FROM_PATH =
+STRIP_FROM_INC_PATH =
+SHORT_NAMES = NO
+JAVADOC_AUTOBRIEF = YES
+MULTILINE_CPP_IS_BRIEF = NO
+DETAILS_AT_TOP = YES
+INHERIT_DOCS = YES
+SEPARATE_MEMBER_PAGES = NO
+TAB_SIZE = 4
+ALIASES =
+OPTIMIZE_OUTPUT_FOR_C = YES
+OPTIMIZE_OUTPUT_JAVA = NO
+BUILTIN_STL_SUPPORT = NO
+DISTRIBUTE_GROUP_DOC = NO
+SUBGROUPING = YES
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+EXTRACT_ALL = YES
+EXTRACT_PRIVATE = NO
+EXTRACT_STATIC = YES
+EXTRACT_LOCAL_CLASSES = YES
+EXTRACT_LOCAL_METHODS = NO
+HIDE_UNDOC_MEMBERS = NO
+HIDE_UNDOC_CLASSES = NO
+HIDE_FRIEND_COMPOUNDS = NO
+HIDE_IN_BODY_DOCS = NO
+INTERNAL_DOCS = YES
+CASE_SENSE_NAMES = YES
+HIDE_SCOPE_NAMES = NO
+SHOW_INCLUDE_FILES = YES
+INLINE_INFO = YES
+SORT_MEMBER_DOCS = YES
+SORT_BRIEF_DOCS = YES
+SORT_BY_SCOPE_NAME = NO
+GENERATE_TODOLIST = YES
+GENERATE_TESTLIST = YES
+GENERATE_BUGLIST = YES
+GENERATE_DEPRECATEDLIST= YES
+ENABLED_SECTIONS =
+MAX_INITIALIZER_LINES = 30
+SHOW_USED_FILES = NO
+SHOW_DIRECTORIES = NO
+FILE_VERSION_FILTER =
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+QUIET = YES
+WARNINGS = YES
+WARN_IF_UNDOCUMENTED = YES
+WARN_IF_DOC_ERROR = YES
+WARN_NO_PARAMDOC = NO
+WARN_FORMAT = "$file:$line: $text"
+WARN_LOGFILE =
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+INPUT = ./../ ./../../../Source ./../../Common/include ./../../Common/Minimal
+FILE_PATTERNS = *.c \
+ *.h \
+ *.S
+RECURSIVE = YES
+EXCLUDE =
+EXCLUDE_SYMLINKS = NO
+EXCLUDE_PATTERNS =
+EXAMPLE_PATH =
+EXAMPLE_PATTERNS =
+EXAMPLE_RECURSIVE = NO
+IMAGE_PATH = ./../
+INPUT_FILTER =
+FILTER_PATTERNS =
+FILTER_SOURCE_FILES = NO
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+SOURCE_BROWSER = YES
+INLINE_SOURCES = YES
+STRIP_CODE_COMMENTS = YES
+REFERENCED_BY_RELATION = YES
+REFERENCES_RELATION = YES
+REFERENCES_LINK_SOURCE = YES
+USE_HTAGS = NO
+VERBATIM_HEADERS = YES
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+ALPHABETICAL_INDEX = NO
+COLS_IN_ALPHA_INDEX = 5
+IGNORE_PREFIX =
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+GENERATE_HTML = YES
+HTML_OUTPUT =
+HTML_FILE_EXTENSION = .html
+HTML_HEADER =
+HTML_FOOTER =
+HTML_STYLESHEET =
+HTML_ALIGN_MEMBERS = YES
+GENERATE_HTMLHELP = NO
+CHM_FILE =
+HHC_LOCATION =
+GENERATE_CHI = NO
+BINARY_TOC = NO
+TOC_EXPAND = NO
+DISABLE_INDEX = NO
+ENUM_VALUES_PER_LINE = 4
+GENERATE_TREEVIEW = YES
+TREEVIEW_WIDTH = 250
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+GENERATE_LATEX = NO
+LATEX_OUTPUT = latex
+LATEX_CMD_NAME = latex
+MAKEINDEX_CMD_NAME = makeindex
+COMPACT_LATEX = NO
+PAPER_TYPE = a4wide
+EXTRA_PACKAGES =
+LATEX_HEADER =
+PDF_HYPERLINKS = NO
+USE_PDFLATEX = NO
+LATEX_BATCHMODE = NO
+LATEX_HIDE_INDICES = NO
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+GENERATE_RTF = NO
+RTF_OUTPUT = RTF
+COMPACT_RTF = NO
+RTF_HYPERLINKS = YES
+RTF_STYLESHEET_FILE =
+RTF_EXTENSIONS_FILE =
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+GENERATE_MAN = NO
+MAN_OUTPUT = man
+MAN_EXTENSION = .3
+MAN_LINKS = NO
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+GENERATE_XML = NO
+XML_OUTPUT = xml
+XML_SCHEMA =
+XML_DTD =
+XML_PROGRAMLISTING = YES
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+GENERATE_AUTOGEN_DEF = NO
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+GENERATE_PERLMOD = NO
+PERLMOD_LATEX = NO
+PERLMOD_PRETTY = YES
+PERLMOD_MAKEVAR_PREFIX =
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+ENABLE_PREPROCESSING = YES
+MACRO_EXPANSION = YES
+EXPAND_ONLY_PREDEF = YES
+SEARCH_INCLUDES = YES
+INCLUDE_PATH = ../../../../../BOARDS/
+INCLUDE_FILE_PATTERNS =
+PREDEFINED = __GNUC__=4 \
+ __attribute__()= \
+ __AVR32__=1 \
+ __AVR32_UC3B0256__=1 \
+ __AVR32_ABI_COMPILER__ \
+ BOARD=EVK1101
+EXPAND_AS_DEFINED =
+SKIP_FUNCTION_MACROS = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references
+#---------------------------------------------------------------------------
+TAGFILES =
+GENERATE_TAGFILE =
+ALLEXTERNALS = NO
+EXTERNAL_GROUPS = YES
+PERL_PATH = /usr/bin/perl
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+CLASS_DIAGRAMS = NO
+HIDE_UNDOC_RELATIONS = YES
+HAVE_DOT = NO
+CLASS_GRAPH = NO
+COLLABORATION_GRAPH = NO
+GROUP_GRAPHS = NO
+UML_LOOK = YES
+TEMPLATE_RELATIONS = YES
+INCLUDE_GRAPH = NO
+INCLUDED_BY_GRAPH = NO
+CALL_GRAPH = NO
+CALLER_GRAPH = NO
+GRAPHICAL_HIERARCHY = NO
+DIRECTORY_GRAPH = NO
+DOT_IMAGE_FORMAT = png
+DOT_PATH =
+DOTFILE_DIRS =
+MAX_DOT_GRAPH_WIDTH = 1024
+MAX_DOT_GRAPH_HEIGHT = 1024
+MAX_DOT_GRAPH_DEPTH = 0
+DOT_TRANSPARENT = NO
+DOT_MULTI_TARGETS = NO
+GENERATE_LEGEND = YES
+DOT_CLEANUP = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine
+#---------------------------------------------------------------------------
+SEARCHENGINE = NO
diff --git a/Demo/AVR32_UC3/BOARDS/EVK1100/evk1100.h b/Demo/AVR32_UC3/BOARDS/EVK1100/evk1100.h
index bec0ecd3f..2905fff22 100644
--- a/Demo/AVR32_UC3/BOARDS/EVK1100/evk1100.h
+++ b/Demo/AVR32_UC3/BOARDS/EVK1100/evk1100.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -13,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -64,7 +62,7 @@
// part.
//#define FRCOSC 115200 //!< RCOsc frequency: Hz.
-#define FOSC32 32000 //!< Osc32 frequency: Hz.
+#define FOSC32 32768 //!< Osc32 frequency: Hz.
#define OSC32_STARTUP 3 //!< Osc32 startup time: RCOsc periods.
#define FOSC0 12000000 //!< Osc0 frequency: Hz.
@@ -117,6 +115,13 @@
# define USB_VBOF_ACTIVE_LEVEL LOW
#endif
+//! USB overcurrent detection pin.
+#ifdef EVK1100_REVA
+# define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PB18
+#else
+# define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PX33
+#endif
+
//! @}
@@ -278,7 +283,7 @@
*/
//! @{
#define DIP204_BACKLIGHT_PIN AVR32_PIN_PB18
-#define DIP204_PWM_CHANNEL AVR32_PWM_CHID6
+#define DIP204_PWM_CHANNEL 6
#define DIP204_PWM_PIN AVR32_PWM_PWM_6_PIN
#define DIP204_PWM_FUNCTION AVR32_PWM_PWM_6_FUNCTION
//! @}
@@ -299,9 +304,11 @@
//! @}
-/*! \name SPI Connections of the SD/MMC Connector
+/*! \name GPIO and SPI Connections of the SD/MMC Connector
*/
//! @{
+#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02
+#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA07
#define SD_MMC_SPI (&AVR32_SPI1)
#define SD_MMC_SPI_CS 1
#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN
diff --git a/Demo/AVR32_UC3/BOARDS/EVK1100/led.c b/Demo/AVR32_UC3/BOARDS/EVK1100/led.c
index 550b0c028..9f0952bc9 100644
--- a/Demo/AVR32_UC3/BOARDS/EVK1100/led.c
+++ b/Demo/AVR32_UC3/BOARDS/EVK1100/led.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -13,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -45,14 +43,7 @@
*/
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "preprocessor.h"
#include "compiler.h"
#include "evk1100.h"
@@ -89,7 +80,7 @@ static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =
//! Saved state of all LEDs.
-static U32 LED_State = (1 << LED_COUNT) - 1;
+static volatile U32 LED_State = (1 << LED_COUNT) - 1;
U32 LED_Read_Display(void)
diff --git a/Demo/AVR32_UC3/BOARDS/EVK1100/led.h b/Demo/AVR32_UC3/BOARDS/EVK1100/led.h
index 3b3afd808..aa26a0af1 100644
--- a/Demo/AVR32_UC3/BOARDS/EVK1100/led.h
+++ b/Demo/AVR32_UC3/BOARDS/EVK1100/led.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -13,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
diff --git a/Demo/AVR32_UC3/BOARDS/EVK1101/evk1101.h b/Demo/AVR32_UC3/BOARDS/EVK1101/evk1101.h
new file mode 100644
index 000000000..87291f54f
--- /dev/null
+++ b/Demo/AVR32_UC3/BOARDS/EVK1101/evk1101.h
@@ -0,0 +1,239 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AT32UC3B EVK1101 board header file.
+ *
+ * This file contains definitions and services related to the features of the
+ * EVK1101 board.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 AT32UC3B devices can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef _EVK1101_H_
+#define _EVK1101_H_
+
+#include "compiler.h"
+
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
+# include "led.h"
+#endif // __AVR32_ABI_COMPILER__
+
+
+/*! \name Oscillator Definitions
+ */
+//! @{
+
+// RCOsc has no custom calibration by default. Set the following definition to
+// the appropriate value if a custom RCOsc calibration has been applied to your
+// part.
+//#define FRCOSC 115200 //!< RCOsc frequency: Hz.
+
+#define FOSC32 32768 //!< Osc32 frequency: Hz.
+#define OSC32_STARTUP 3 //!< Osc32 startup time: RCOsc periods.
+
+#define FOSC0 12000000 //!< Osc0 frequency: Hz.
+#define OSC0_STARTUP 3 //!< Osc0 startup time: RCOsc periods.
+
+// Osc1 crystal is not mounted by default. Set the following definitions to the
+// appropriate values if a custom Osc1 crystal is mounted on your board.
+//#define FOSC1 12000000 //!< Osc1 frequency: Hz.
+//#define OSC1_STARTUP 3 //!< Osc1 startup time: RCOsc periods.
+
+//! @}
+
+
+/*! \name USB Definitions
+ */
+//! @{
+
+//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x.
+//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and
+//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from .
+#define USB_ID AVR32_USBB_USB_ID_0_0
+
+//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x.
+//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and
+//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from .
+#define USB_VBOF AVR32_USBB_USB_VBOF_0_0
+
+//! Active level of the USB_VBOF output pin.
+#define USB_VBOF_ACTIVE_LEVEL LOW
+
+//! USB overcurrent detection pin.
+#define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PA20
+
+//! @}
+
+
+//! Number of LEDs.
+#define LED_COUNT 4
+
+/*! \name GPIO Connections of LEDs
+ */
+//! @{
+#define LED0_GPIO AVR32_PIN_PA07
+#define LED1_GPIO AVR32_PIN_PA08
+#define LED2_GPIO AVR32_PIN_PA21
+#define LED3_GPIO AVR32_PIN_PA22
+//! @}
+
+/*! \name PWM Channels of LEDs
+ */
+//! @{
+#define LED0_PWM 0
+#define LED1_PWM 1
+#define LED2_PWM 2
+#define LED3_PWM 6
+//! @}
+
+/*! \name PWM Functions of LEDs
+ */
+//! @{
+#define LED0_PWM_FUNCTION AVR32_PWM_PWM_0_0_FUNCTION
+#define LED1_PWM_FUNCTION AVR32_PWM_PWM_1_0_FUNCTION
+#define LED2_PWM_FUNCTION AVR32_PWM_PWM_2_0_FUNCTION
+#define LED3_PWM_FUNCTION AVR32_PWM_PWM_6_0_FUNCTION
+//! @}
+
+/*! \name Color Identifiers of LEDs to Use with LED Functions
+ */
+//! @{
+#define LED_MONO0_GREEN LED0
+#define LED_MONO1_GREEN LED1
+#define LED_MONO2_GREEN LED2
+#define LED_MONO3_GREEN LED3
+//! @}
+
+
+/*! \name GPIO Connections of Push Buttons
+ */
+//! @{
+#define GPIO_PUSH_BUTTON_0 AVR32_PIN_PB02
+#define GPIO_PUSH_BUTTON_1 AVR32_PIN_PB03
+//! @}
+
+
+/*! \name GPIO Connections of the Joystick
+ */
+//! @{
+#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA13
+#define GPIO_JOYSTICK_LEFT AVR32_PIN_PB06
+#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PB09
+#define GPIO_JOYSTICK_UP AVR32_PIN_PB07
+#define GPIO_JOYSTICK_DOWN AVR32_PIN_PB08
+//! @}
+
+
+/*! \name ADC Connection of the Temperature Sensor
+ */
+//! @{
+#define ADC_TEMPERATURE_CHANNEL 7
+#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_7_PIN
+#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_7_FUNCTION
+//! @}
+
+
+/*! \name ADC Connection of the Light Sensor
+ */
+//! @{
+#define ADC_LIGHT_CHANNEL 6
+#define ADC_LIGHT_PIN AVR32_ADC_AD_6_PIN
+#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_6_FUNCTION
+//! @}
+
+
+/*! \name ADC Connections of the Accelerometer
+ */
+//! @{
+#define ADC_ACC_X_CHANNEL 1
+#define ADC_ACC_X_PIN AVR32_ADC_AD_1_PIN
+#define ADC_ACC_X_FUNCTION AVR32_ADC_AD_1_FUNCTION
+#define ADC_ACC_Y_CHANNEL 2
+#define ADC_ACC_Y_PIN AVR32_ADC_AD_2_PIN
+#define ADC_ACC_Y_FUNCTION AVR32_ADC_AD_2_FUNCTION
+#define ADC_ACC_Z_CHANNEL 3
+#define ADC_ACC_Z_PIN AVR32_ADC_AD_3_PIN
+#define ADC_ACC_Z_FUNCTION AVR32_ADC_AD_3_FUNCTION
+//! @}
+
+
+/*! \name PWM Connections of Audio
+ */
+//! @{
+#define AUDIO_LOW_PWM_CHANNEL 5
+#define AUDIO_LOW_PWM_PIN AVR32_PWM_PWM_5_0_PIN
+#define AUDIO_LOW_PWM_FUNCTION AVR32_PWM_PWM_5_0_FUNCTION
+#define AUDIO_HIGH_PWM_CHANNEL 6
+#define AUDIO_HIGH_PWM_PIN AVR32_PWM_PWM_6_1_PIN
+#define AUDIO_HIGH_PWM_FUNCTION AVR32_PWM_PWM_6_1_FUNCTION
+//! @}
+
+
+/*! \name SPI Connections of the AT45DBX Data Flash Memory
+ */
+//! @{
+#define AT45DBX_SPI (&AVR32_SPI)
+#define AT45DBX_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN
+#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION
+#define AT45DBX_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN
+#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION
+#define AT45DBX_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN
+#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION
+#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI_NPCS_0_0_PIN
+#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI_NPCS_0_0_FUNCTION
+//! @}
+
+
+/*! \name GPIO and SPI Connections of the SD/MMC Connector
+ */
+//! @{
+#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PB00
+#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PB01
+#define SD_MMC_SPI (&AVR32_SPI)
+#define SD_MMC_SPI_CS 1
+#define SD_MMC_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN
+#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION
+#define SD_MMC_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN
+#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION
+#define SD_MMC_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN
+#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION
+#define SD_MMC_SPI_NPCS_PIN AVR32_SPI_NPCS_1_0_PIN
+#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI_NPCS_1_0_FUNCTION
+//! @}
+
+
+#endif // _EVK1101_H_
diff --git a/Demo/AVR32_UC3/BOARDS/EVK1101/led.c b/Demo/AVR32_UC3/BOARDS/EVK1101/led.c
new file mode 100644
index 000000000..70705769b
--- /dev/null
+++ b/Demo/AVR32_UC3/BOARDS/EVK1101/led.c
@@ -0,0 +1,305 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AT32UC3B EVK1101 board LEDs support package.
+ *
+ * This file contains definitions and services related to the LED features of
+ * the EVK1101 board.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 AT32UC3B devices can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include
+#include "preprocessor.h"
+#include "compiler.h"
+#include "evk1101.h"
+#include "led.h"
+
+
+//! Structure describing LED hardware connections.
+typedef const struct
+{
+ struct
+ {
+ U32 PORT; //!< LED GPIO port.
+ U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port.
+ } GPIO; //!< LED GPIO descriptor.
+ struct
+ {
+ S32 CHANNEL; //!< LED PWM channel (< 0 if N/A).
+ S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A).
+ } PWM; //!< LED PWM descriptor.
+} tLED_DESCRIPTOR;
+
+
+//! Hardware descriptors of all LEDs.
+static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =
+{
+#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \
+ { \
+ {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\
+ {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \
+ },
+ MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~)
+#undef INSERT_LED_DESCRIPTOR
+};
+
+
+//! Saved state of all LEDs.
+static volatile U32 LED_State = (1 << LED_COUNT) - 1;
+
+
+U32 LED_Read_Display(void)
+{
+ return LED_State;
+}
+
+
+void LED_Display(U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor;
+ volatile avr32_gpio_port_t *led_gpio_port;
+
+ leds &= (1 << LED_COUNT) - 1;
+ LED_State = leds;
+ for (led_descriptor = &LED_DESCRIPTOR[0];
+ led_descriptor < LED_DESCRIPTOR + LED_COUNT;
+ led_descriptor++)
+ {
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ if (leds & 1)
+ {
+ led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
+ }
+ else
+ {
+ led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
+ }
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= 1;
+ }
+}
+
+
+U32 LED_Read_Display_Mask(U32 mask)
+{
+ return Rd_bits(LED_State, mask);
+}
+
+
+void LED_Display_Mask(U32 mask, U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ mask &= (1 << LED_COUNT) - 1;
+ Wr_bits(LED_State, mask, leds);
+ while (mask)
+ {
+ led_shift = 1 + ctz(mask);
+ led_descriptor += led_shift;
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ leds >>= led_shift - 1;
+ if (leds & 1)
+ {
+ led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
+ }
+ else
+ {
+ led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
+ }
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= 1;
+ mask >>= led_shift;
+ }
+}
+
+
+Bool LED_Test(U32 leds)
+{
+ return Tst_bits(LED_State, leds);
+}
+
+
+void LED_Off(U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ leds &= (1 << LED_COUNT) - 1;
+ Clr_bits(LED_State, leds);
+ while (leds)
+ {
+ led_shift = 1 + ctz(leds);
+ led_descriptor += led_shift;
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= led_shift;
+ }
+}
+
+
+void LED_On(U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ leds &= (1 << LED_COUNT) - 1;
+ Set_bits(LED_State, leds);
+ while (leds)
+ {
+ led_shift = 1 + ctz(leds);
+ led_descriptor += led_shift;
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= led_shift;
+ }
+}
+
+
+void LED_Toggle(U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ leds &= (1 << LED_COUNT) - 1;
+ Tgl_bits(LED_State, leds);
+ while (leds)
+ {
+ led_shift = 1 + ctz(leds);
+ led_descriptor += led_shift;
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= led_shift;
+ }
+}
+
+
+U32 LED_Read_Display_Field(U32 field)
+{
+ return Rd_bitfield(LED_State, field);
+}
+
+
+void LED_Display_Field(U32 field, U32 leds)
+{
+ LED_Display_Mask(field, leds << ctz(field));
+}
+
+
+U8 LED_Get_Intensity(U32 led)
+{
+ tLED_DESCRIPTOR *led_descriptor;
+
+ // Check that the argument value is valid.
+ led = ctz(led);
+ led_descriptor = &LED_DESCRIPTOR[led];
+ if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0;
+
+ // Return the duty cycle value if the LED PWM channel is enabled, else 0.
+ return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ?
+ AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0;
+}
+
+
+void LED_Set_Intensity(U32 leds, U8 intensity)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_pwm_channel_t *led_pwm_channel;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ // For each specified LED...
+ for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift)
+ {
+ // Select the next specified LED and check that it has a PWM channel.
+ led_shift = 1 + ctz(leds);
+ led_descriptor += led_shift;
+ if (led_descriptor->PWM.CHANNEL < 0) continue;
+
+ // Initialize or update the LED PWM channel.
+ led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL];
+ if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)))
+ {
+ led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) &
+ ~(AVR32_PWM_CALG_MASK |
+ AVR32_PWM_CPOL_MASK |
+ AVR32_PWM_CPD_MASK);
+ led_pwm_channel->cprd = 0x000000FF;
+ led_pwm_channel->cdty = intensity;
+ AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL;
+ }
+ else
+ {
+ AVR32_PWM.isr;
+ while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL)));
+ led_pwm_channel->cupd = intensity;
+ }
+
+ // Switch the LED pin to its PWM function.
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ if (led_descriptor->PWM.FUNCTION & 0x1)
+ {
+ led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK;
+ }
+ else
+ {
+ led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK;
+ }
+ if (led_descriptor->PWM.FUNCTION & 0x2)
+ {
+ led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK;
+ }
+ else
+ {
+ led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK;
+ }
+ led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK;
+ }
+}
diff --git a/Demo/AVR32_UC3/BOARDS/EVK1101/led.h b/Demo/AVR32_UC3/BOARDS/EVK1101/led.h
new file mode 100644
index 000000000..bf8948712
--- /dev/null
+++ b/Demo/AVR32_UC3/BOARDS/EVK1101/led.h
@@ -0,0 +1,182 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AT32UC3B EVK1101 board LEDs support package.
+ *
+ * This file contains definitions and services related to the LED features of
+ * the EVK1101 board.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 AT32UC3B devices can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef _LED_H_
+#define _LED_H_
+
+#include "compiler.h"
+
+
+/*! \name Identifiers of LEDs to Use with LED Functions
+ */
+//! @{
+#define LED0 0x01
+#define LED1 0x02
+#define LED2 0x04
+#define LED3 0x08
+//! @}
+
+
+/*! \brief Gets the last state of all LEDs set through the LED API.
+ *
+ * \return State of all LEDs (1 bit per LED).
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern U32 LED_Read_Display(void);
+
+/*! \brief Sets the state of all LEDs.
+ *
+ * \param leds New state of all LEDs (1 bit per LED).
+ *
+ * \note The pins of all LEDs are set to GPIO output mode.
+ */
+extern void LED_Display(U32 leds);
+
+/*! \brief Gets the last state of the specified LEDs set through the LED API.
+ *
+ * \param mask LEDs of which to get the state (1 bit per LED).
+ *
+ * \return State of the specified LEDs (1 bit per LED).
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern U32 LED_Read_Display_Mask(U32 mask);
+
+/*! \brief Sets the state of the specified LEDs.
+ *
+ * \param mask LEDs of which to set the state (1 bit per LED).
+ *
+ * \param leds New state of the specified LEDs (1 bit per LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_Display_Mask(U32 mask, U32 leds);
+
+/*! \brief Tests the last state of the specified LEDs set through the LED API.
+ *
+ * \param leds LEDs of which to test the state (1 bit per LED).
+ *
+ * \return \c TRUE if at least one of the specified LEDs has a state on, else
+ * \c FALSE.
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern Bool LED_Test(U32 leds);
+
+/*! \brief Turns off the specified LEDs.
+ *
+ * \param leds LEDs to turn off (1 bit per LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_Off(U32 leds);
+
+/*! \brief Turns on the specified LEDs.
+ *
+ * \param leds LEDs to turn on (1 bit per LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_On(U32 leds);
+
+/*! \brief Toggles the specified LEDs.
+ *
+ * \param leds LEDs to toggle (1 bit per LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_Toggle(U32 leds);
+
+/*! \brief Gets as a bit-field the last state of the specified LEDs set through
+ * the LED API.
+ *
+ * \param field LEDs of which to get the state (1 bit per LED).
+ *
+ * \return State of the specified LEDs (1 bit per LED, beginning with the first
+ * specified LED).
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern U32 LED_Read_Display_Field(U32 field);
+
+/*! \brief Sets as a bit-field the state of the specified LEDs.
+ *
+ * \param field LEDs of which to set the state (1 bit per LED).
+ * \param leds New state of the specified LEDs (1 bit per LED, beginning with
+ * the first specified LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_Display_Field(U32 field, U32 leds);
+
+/*! \brief Gets the intensity of the specified LED.
+ *
+ * \param led LED of which to get the intensity (1 bit per LED; only the least
+ * significant set bit is used).
+ *
+ * \return Intensity of the specified LED (0x00 to 0xFF).
+ *
+ * \warning The PWM channel of the specified LED is supposed to be used only by
+ * this module.
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern U8 LED_Get_Intensity(U32 led);
+
+/*! \brief Sets the intensity of the specified LEDs.
+ *
+ * \param leds LEDs of which to set the intensity (1 bit per LED).
+ * \param intensity New intensity of the specified LEDs (0x00 to 0xFF).
+ *
+ * \warning The PWM channels of the specified LEDs are supposed to be used only
+ * by this module.
+ *
+ * \note The pins of the specified LEDs are set to PWM output mode.
+ */
+extern void LED_Set_Intensity(U32 leds, U8 intensity);
+
+
+#endif // _LED_H_
diff --git a/Demo/AVR32_UC3/BOARDS/board.h b/Demo/AVR32_UC3/BOARDS/board.h
index 36484edcc..346165ef6 100644
--- a/Demo/AVR32_UC3/BOARDS/board.h
+++ b/Demo/AVR32_UC3/BOARDS/board.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -13,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -48,22 +46,33 @@
#ifndef _BOARD_H_
#define _BOARD_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__ || __AAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
+#include
+/*! \name Base Boards
+ */
+//! @{
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
+#define EVK1101 2 //!< AT32UC3B EVK1101 board.
+//! @}
+
+/*! \name Extension Boards
+ */
+//! @{
+#define EXT1102 1 //!< AT32UC3B EXT1102 board.
+//! @}
#if BOARD == EVK1100
# include "EVK1100/evk1100.h"
+#elif BOARD == EVK1101
+# include "EVK1101/evk1101.h"
#else
# error No known AVR32 board defined
#endif
+#if EXT_BOARD == EXT1102
+# include "EXT1102/ext1102.h"
+#endif
+
#ifndef FRCOSC
# define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency.
diff --git a/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.c b/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.c
index 24e0a446c..9b61a65aa 100644
--- a/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.c
+++ b/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.c
@@ -6,11 +6,11 @@
* This file defines a useful set of functions for the GPIO.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices: All AVR32 devices with a PWM module can be used.
+ * - Supported devices: All AVR32 devices with a GPIO module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.h b/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.h
index c262ac8f6..3e2c6ff07 100644
--- a/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.h
+++ b/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.h
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -45,13 +45,7 @@
#ifndef _GPIO_H_
#define _GPIO_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
+#include
/*! \name Return Values of the GPIO API
@@ -90,8 +84,16 @@ extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
/*! \brief Enables a specific module mode for a pin.
*
- * \param pin The pin number.
- * \param function The pin function.
+ * \param pin The pin number.\n
+ * Refer to the product header file `uc3x.h' (where x is the part
+ * number; e.g. x = a0512) for module pins. E.g., to enable a PWM
+ * channel output, the pin number can be AVR32_PWM_PWM_3_PIN for PWM
+ * channel 3.
+ * \param function The pin function.\n
+ * Refer to the product header file `uc3x.h' (where x is the
+ * part number; e.g. x = a0512) for module pin functions. E.g.,
+ * to enable a PWM channel output, the pin function can be
+ * AVR32_PWM_PWM_3_FUNCTION for PWM channel 3.
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
@@ -106,7 +108,12 @@ extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
/*! \brief Enables the GPIO mode of a pin.
*
- * \param pin The pin number.
+ * \param pin The pin number.\n
+ * Refer to the product header file `uc3x.h' (where x is the part
+ * number; e.g. x = a0512) for pin definitions. E.g., to enable the
+ * GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
+ * AVR32_PWM_PWM_3_PIN for PWM channel 3 can also be used to release
+ * module pins for GPIO.
*/
extern void gpio_enable_gpio_pin(unsigned int pin);
diff --git a/Demo/AVR32_UC3/DRIVERS/INTC/intc.c b/Demo/AVR32_UC3/DRIVERS/INTC/intc.c
index 71f9c706c..e6a64298a 100644
--- a/Demo/AVR32_UC3/DRIVERS/INTC/intc.c
+++ b/Demo/AVR32_UC3/DRIVERS/INTC/intc.c
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -42,14 +42,7 @@
*/
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "compiler.h"
#include "preprocessor.h"
#include "intc.h"
@@ -61,7 +54,7 @@ extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.
//! Each line handler table contains a set of pointers to interrupt handlers.
#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
-static volatile __int_handler _int_line_handler_table_##GRP[AVR32_INTC_NUM_IRQS_PER_GRP##GRP];
+static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);
#undef DECL_INT_LINE_HANDLER_TABLE
@@ -186,6 +179,7 @@ void INTC_init_interrupts(void)
void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev)
{
+ // Determine the group of the IRQ.
unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;
// Store in _int_line_handler_table_x the pointer to the interrupt handler, so
diff --git a/Demo/AVR32_UC3/DRIVERS/INTC/intc.h b/Demo/AVR32_UC3/DRIVERS/INTC/intc.h
index 0772d9068..93ecef436 100644
--- a/Demo/AVR32_UC3/DRIVERS/INTC/intc.h
+++ b/Demo/AVR32_UC3/DRIVERS/INTC/intc.h
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
diff --git a/Demo/AVR32_UC3/DRIVERS/PM/pm.c b/Demo/AVR32_UC3/DRIVERS/PM/pm.c
index 671c3e22c..e2f08d923 100644
--- a/Demo/AVR32_UC3/DRIVERS/PM/pm.c
+++ b/Demo/AVR32_UC3/DRIVERS/PM/pm.c
@@ -9,7 +9,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -44,297 +44,275 @@
#include "pm.h"
-void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
+/*! \name PM Writable Bit-Field Registers
+ */
+//! @{
+
+typedef union
{
- union {
- unsigned long oscctrl0;
- avr32_pm_oscctrl0_t OSCCTRL0;
- } oscctrl0 ;
- // Read
- oscctrl0.oscctrl0 = pm->oscctrl0;
- // Modify
- oscctrl0.OSCCTRL0.mode = AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK;
- // Write
- pm->oscctrl0 = oscctrl0.oscctrl0;
-}
+ unsigned long mcctrl;
+ avr32_pm_mcctrl_t MCCTRL;
+} u_avr32_pm_mcctrl_t;
+typedef union
+{
+ unsigned long cksel;
+ avr32_pm_cksel_t CKSEL;
+} u_avr32_pm_cksel_t;
-void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
+typedef union
+{
+ unsigned long pll;
+ avr32_pm_pll_t PLL;
+} u_avr32_pm_pll_t;
+
+typedef union
+{
+ unsigned long oscctrl0;
+ avr32_pm_oscctrl0_t OSCCTRL0;
+} u_avr32_pm_oscctrl0_t;
+
+typedef union
+{
+ unsigned long oscctrl1;
+ avr32_pm_oscctrl1_t OSCCTRL1;
+} u_avr32_pm_oscctrl1_t;
+
+typedef union
+{
+ unsigned long oscctrl32;
+ avr32_pm_oscctrl32_t OSCCTRL32;
+} u_avr32_pm_oscctrl32_t;
+
+typedef union
+{
+ unsigned long ier;
+ avr32_pm_ier_t IER;
+} u_avr32_pm_ier_t;
+
+typedef union
+{
+ unsigned long idr;
+ avr32_pm_idr_t IDR;
+} u_avr32_pm_idr_t;
+
+typedef union
+{
+ unsigned long icr;
+ avr32_pm_icr_t ICR;
+} u_avr32_pm_icr_t;
+
+typedef union
+{
+ unsigned long gcctrl;
+ avr32_pm_gcctrl_t GCCTRL;
+} u_avr32_pm_gcctrl_t;
+
+typedef union
+{
+ unsigned long rccr;
+ avr32_pm_rccr_t RCCR;
+} u_avr32_pm_rccr_t;
+
+typedef union
+{
+ unsigned long bgcr;
+ avr32_pm_bgcr_t BGCR;
+} u_avr32_pm_bgcr_t;
+
+typedef union
+{
+ unsigned long vregcr;
+ avr32_pm_vregcr_t VREGCR;
+} u_avr32_pm_vregcr_t;
+
+typedef union
+{
+ unsigned long bod;
+ avr32_pm_bod_t BOD;
+} u_avr32_pm_bod_t;
+
+//! @}
+
+
+/*! \brief Sets the mode of the oscillator 0.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x).
+ */
+static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
- union {
- unsigned long oscctrl0;
- avr32_pm_oscctrl0_t OSCCTRL0;
- } oscctrl0 ;
// Read
- oscctrl0.oscctrl0 = pm->oscctrl0;
+ u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
// Modify
- oscctrl0.OSCCTRL0.mode = (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
- AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3;
+ u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode;
// Write
- pm->oscctrl0 = oscctrl0.oscctrl0;
+ pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
}
-void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
+void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
- union {
- unsigned long oscctrl0;
- avr32_pm_oscctrl0_t OSCCTRL0;
- } oscctrl0 ;
+ pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK);
+}
- // Read register
- mcctrl.mcctrl = pm->mcctrl;
- oscctrl0.oscctrl0 = pm->oscctrl0;
- // Modify
- mcctrl.MCCTRL.osc0en = 1;
- oscctrl0.OSCCTRL0.startup = startup;
- // Write back
- pm->oscctrl0 = oscctrl0.oscctrl0;
- pm->mcctrl = mcctrl.mcctrl;
- while(!pm->ISR.osc0rdy); //For osc output valid
+void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
+{
+ pm_set_osc0_mode(pm, (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
+ AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3);
}
-void pm_disable_clk0(volatile avr32_pm_t *pm)
+void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
+ pm_enable_clk0_no_wait(pm, startup);
+ pm_wait_for_clk0_ready(pm);
+}
- // Read register
- mcctrl.mcctrl = pm->mcctrl;
- // Modify
- mcctrl.MCCTRL.osc0en = 0;
-
- // Write back
- pm->mcctrl = mcctrl.mcctrl;
+void pm_disable_clk0(volatile avr32_pm_t *pm)
+{
+ pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK;
}
void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
- union {
- unsigned long oscctrl0;
- avr32_pm_oscctrl0_t OSCCTRL0;
- } oscctrl0 ;
-
// Read register
- mcctrl.mcctrl = pm->mcctrl;
- oscctrl0.oscctrl0 = pm->oscctrl0;
+ u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
// Modify
- mcctrl.MCCTRL.osc0en = 1;
- oscctrl0.OSCCTRL0.startup=startup;
+ u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup;
// Write back
- pm->mcctrl = mcctrl.mcctrl;
- pm->oscctrl0 = oscctrl0.oscctrl0;
+ pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
+
+ pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK;
}
void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm)
{
- while(!pm->ISR.osc0rdy);
+ while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK));
}
-void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
+/*! \brief Sets the mode of the oscillator 1.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x).
+ */
+static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
- union {
- unsigned long oscctrl1;
- avr32_pm_oscctrl1_t OSCCTRL1;
- } oscctrl1 ;
// Read
- oscctrl1.oscctrl1= pm->oscctrl1;
+ u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
// Modify
- oscctrl1.OSCCTRL1.mode = AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK;
+ u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode;
// Write
- pm->oscctrl1 = oscctrl1.oscctrl1;
+ pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
}
-void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
+void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
{
- union {
- unsigned long oscctrl1;
- avr32_pm_oscctrl1_t OSCCTRL1;
- } oscctrl1 ;
- // Read
- oscctrl1.oscctrl1= pm->oscctrl1;
- // Modify
- oscctrl1.OSCCTRL1.mode = (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
- AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3;
- // Write
- pm->oscctrl1 = oscctrl1.oscctrl1;
+ pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK);
}
-void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
+void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
- union {
- unsigned long oscctrl1;
- avr32_pm_oscctrl1_t OSCCTRL1;
- } oscctrl1 ;
-
- // Read register
- mcctrl.mcctrl = pm->mcctrl;
- oscctrl1.oscctrl1 = pm->oscctrl1;
+ pm_set_osc1_mode(pm, (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
+ AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3);
+}
- mcctrl.MCCTRL.osc1en = 1;
- oscctrl1.OSCCTRL1.startup=startup;
- // Write back
- pm->oscctrl1 = oscctrl1.oscctrl1;
- pm->mcctrl = mcctrl.mcctrl;
- while(!pm->ISR.osc1rdy);
+void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
+{
+ pm_enable_clk1_no_wait(pm, startup);
+ pm_wait_for_clk1_ready(pm);
}
void pm_disable_clk1(volatile avr32_pm_t *pm)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
+ pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK;
+}
+void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
+{
// Read register
- mcctrl.mcctrl = pm->mcctrl;
-
+ u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
// Modify
- mcctrl.MCCTRL.osc1en = 0;
-
+ u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup;
// Write back
- pm->mcctrl = mcctrl.mcctrl;
+ pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
+
+ pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK;
}
-void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
+void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
- union {
- unsigned long oscctrl1;
- avr32_pm_oscctrl1_t OSCCTRL1;
- } oscctrl1 ;
-
- // Read register
- mcctrl.mcctrl = pm->mcctrl;
- oscctrl1.oscctrl1 = pm->oscctrl1;
-
- mcctrl.MCCTRL.osc1en = 1;
- oscctrl1.OSCCTRL1.startup=startup;
- // Write back
- pm->oscctrl1 = oscctrl1.oscctrl1;
- pm->mcctrl = mcctrl.mcctrl;
+ while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK));
}
-void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
+/*! \brief Sets the mode of the 32-kHz oscillator.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x).
+ */
+static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
- while(!pm->ISR.osc1rdy);
+ // Read
+ u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
+ // Modify
+ u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode;
+ // Write
+ pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
}
void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm)
{
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } u_ctrl;
- u_ctrl.oscctrl32 = pm->oscctrl32;
- u_ctrl.OSCCTRL32.mode = AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK;
- pm->oscctrl32 = u_ctrl.oscctrl32;
+ pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK);
}
void pm_enable_osc32_crystal(volatile avr32_pm_t *pm)
{
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } u_ctrl;
- u_ctrl.oscctrl32 = pm->oscctrl32;
- u_ctrl.OSCCTRL32.mode = AVR32_PM_OSCCTRL32_MODE_CRYSTAL;
- pm->oscctrl32 = u_ctrl.oscctrl32;
+ pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL);
}
void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup)
{
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } oscctrl32 ;
-
- // Read register
- oscctrl32.oscctrl32 = pm->oscctrl32;
- // Modify
- oscctrl32.OSCCTRL32.osc32en = 1;
- oscctrl32.OSCCTRL32.startup=startup;
- // Write back
- pm->oscctrl32 = oscctrl32.oscctrl32;
-
- while(!pm->ISR.osc32rdy);
+ pm_enable_clk32_no_wait(pm, startup);
+ pm_wait_for_clk32_ready(pm);
}
void pm_disable_clk32(volatile avr32_pm_t *pm)
{
- // To get rid of a GCC bug
- // This makes C code longer, but not ASM
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } oscctrl32 ;
-
- // Read register
- oscctrl32.oscctrl32 = pm->oscctrl32;
- // Modify
- oscctrl32.OSCCTRL32.osc32en = 0;
- // Write back
- pm->oscctrl32 = oscctrl32.oscctrl32;
+ pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK;
}
void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } oscctrl32 ;
-
// Read register
- oscctrl32.oscctrl32 = pm->oscctrl32;
+ u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
// Modify
- oscctrl32.OSCCTRL32.osc32en = 1;
- oscctrl32.OSCCTRL32.startup=startup;
+ u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1;
+ u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup;
// Write back
- pm->oscctrl32 = oscctrl32.oscctrl32;
+ pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
}
void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm)
{
- // To get rid of a GCC bug
- // This makes C code longer, but not ASM
-
- while(!pm->ISR.osc32rdy);
+ while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK));
}
@@ -346,29 +324,21 @@ void pm_cksel(volatile avr32_pm_t *pm,
unsigned int hsbdiv,
unsigned int hsbsel)
{
- // Force the compiler to generate only one 32 bits access
- union {
- avr32_pm_cksel_t selval ;
- unsigned long uword32;
- } cksel;
-
- cksel.uword32 = 0;
+ u_avr32_pm_cksel_t u_avr32_pm_cksel = {0};
- cksel.selval.cpudiv = hsbdiv;
- cksel.selval.cpusel = hsbsel;
- cksel.selval.hsbdiv = hsbdiv;
- cksel.selval.hsbsel = hsbsel;
- cksel.selval.pbbdiv = pbbdiv;
- cksel.selval.pbbsel = pbbsel;
- cksel.selval.pbadiv = pbadiv;
- cksel.selval.pbasel = pbasel;
+ u_avr32_pm_cksel.CKSEL.cpusel = hsbsel;
+ u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv;
+ u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel;
+ u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv;
+ u_avr32_pm_cksel.CKSEL.pbasel = pbasel;
+ u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv;
+ u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel;
+ u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv;
- pm->cksel = cksel.uword32;
+ pm->cksel = u_avr32_pm_cksel.cksel;
// Wait for ckrdy bit and then clear it
- while(!(pm->ISR.ckrdy));
-
- return;
+ while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK));
}
@@ -377,42 +347,30 @@ void pm_gc_setup(volatile avr32_pm_t *pm,
unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1)
unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1
unsigned int diven,
- unsigned int div) {
- union {
- unsigned long gcctrl;
- avr32_pm_gcctrl_t GCCTRL;
- } u_gc;
+ unsigned int div)
+{
+ u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0};
- u_gc.GCCTRL.oscsel = pll_osc;
- u_gc.GCCTRL.pllsel = osc_or_pll;
- u_gc.GCCTRL.diven = diven;
- u_gc.GCCTRL.div = div;
- u_gc.GCCTRL.cen = 0; // Disable GC first
- pm->gcctrl[gc] = u_gc.gcctrl;
+ u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc;
+ u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll;
+ u_avr32_pm_gcctrl.GCCTRL.diven = diven;
+ u_avr32_pm_gcctrl.GCCTRL.div = div;
+
+ pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl;
}
void pm_gc_enable(volatile avr32_pm_t *pm,
- unsigned int gc) {
- union {
- unsigned long gcctrl;
- avr32_pm_gcctrl_t GCCTRL;
- } u_gc;
- u_gc.gcctrl = pm->gcctrl[gc];
- u_gc.GCCTRL.cen = 1;
- pm->gcctrl[gc] = u_gc.gcctrl;
+ unsigned int gc)
+{
+ pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK;
}
void pm_gc_disable(volatile avr32_pm_t *pm,
- unsigned int gc) {
- union {
- unsigned long gcctrl;
- avr32_pm_gcctrl_t GCCTRL;
- } u_gc;
- u_gc.gcctrl = pm->gcctrl[gc];
- u_gc.GCCTRL.cen = 0;
- pm->gcctrl[gc] = u_gc.gcctrl;
+ unsigned int gc)
+{
+ pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK;
}
@@ -421,25 +379,16 @@ void pm_pll_setup(volatile avr32_pm_t *pm,
unsigned int mul,
unsigned int div,
unsigned int osc,
- unsigned int lockcount) {
-
- union {
- unsigned long pll ;
- avr32_pm_pll_t PLL ;
- } u_pll;
-
- u_pll.pll=0;
-
- u_pll.PLL.pllmul = mul;
- u_pll.PLL.plldiv = div;
- u_pll.PLL.pllosc = osc;
- u_pll.PLL.pllcount = lockcount;
-
- u_pll.PLL.pllopt = 0;
+ unsigned int lockcount)
+{
+ u_avr32_pm_pll_t u_avr32_pm_pll = {0};
- u_pll.PLL.plltest = 0;
+ u_avr32_pm_pll.PLL.pllosc = osc;
+ u_avr32_pm_pll.PLL.plldiv = div;
+ u_avr32_pm_pll.PLL.pllmul = mul;
+ u_avr32_pm_pll.PLL.pllcount = lockcount;
- (pm->pll)[pll] = u_pll.pll;
+ pm->pll[pll] = u_avr32_pm_pll.pll;
}
@@ -447,53 +396,38 @@ void pm_pll_set_option(volatile avr32_pm_t *pm,
unsigned int pll,
unsigned int pll_freq,
unsigned int pll_div2,
- unsigned int pll_wbwdisable) {
- union {
- unsigned long pll ;
- avr32_pm_pll_t PLL ;
- } u_pll;
-
- u_pll.pll = (pm->pll)[pll];
- u_pll.PLL.pllopt = pll_freq | (pll_div2<<1) | (pll_wbwdisable<<2);
- (pm->pll)[pll] = u_pll.pll;
+ unsigned int pll_wbwdisable)
+{
+ u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]};
+ u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2);
+ pm->pll[pll] = u_avr32_pm_pll.pll;
}
unsigned int pm_pll_get_option(volatile avr32_pm_t *pm,
- unsigned int pll) {
- return (pm->PLL)[pll].pllopt;
+ unsigned int pll)
+{
+ return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET;
}
void pm_pll_enable(volatile avr32_pm_t *pm,
- unsigned int pll) {
- union {
- unsigned long pll ;
- avr32_pm_pll_t PLL ;
- } u_pll;
-
- u_pll.pll = (pm->pll)[pll];
- u_pll.PLL.pllen = 1;
- (pm->pll)[pll] = u_pll.pll;
+ unsigned int pll)
+{
+ pm->pll[pll] |= AVR32_PM_PLLEN_MASK;
}
void pm_pll_disable(volatile avr32_pm_t *pm,
- unsigned int pll) {
- union {
- unsigned long pll ;
- avr32_pm_pll_t PLL ;
- } u_pll;
-
- u_pll.pll = (pm->pll)[pll];
- u_pll.PLL.pllen = 0;
- (pm->pll)[pll] = u_pll.pll;
+ unsigned int pll)
+{
+ pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK;
}
void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
{
- while(!pm->ISR.lock0);
+ while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK));
// Bypass the lock signal of the PLL
pm->pll[0] |= AVR32_PM_PLL0_PLLBPL_MASK;
@@ -502,7 +436,7 @@ void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
{
- while(!pm->ISR.lock1);
+ while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK));
// Bypass the lock signal of the PLL
pm->pll[1] |= AVR32_PM_PLL1_PLLBPL_MASK;
@@ -511,16 +445,12 @@ void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
// Read
- mcctrl.mcctrl = pm->mcctrl;
+ u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl};
// Modify
- mcctrl.MCCTRL.mcsel = clock;
- // Write Back
- pm->MCCTRL.mcsel = mcctrl.mcctrl;
+ u_avr32_pm_mcctrl.MCCTRL.mcsel = clock;
+ // Write back
+ pm->mcctrl = u_avr32_pm_mcctrl.mcctrl;
}
@@ -532,77 +462,49 @@ void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int
}
-void pm_bod_enable_irq(volatile struct avr32_pm_t *pm) {
-
- union {
- unsigned long ier ;
- avr32_pm_ier_t IER ;
- } u_ier;
- u_ier.ier = 0;
- u_ier.IER.boddet = 1;
-
- pm->ier = u_ier.ier;
+void pm_bod_enable_irq(volatile avr32_pm_t *pm)
+{
+ pm->ier = AVR32_PM_IER_BODDET_MASK;
}
-void pm_bod_disable_irq(volatile struct avr32_pm_t *pm) {
-
- union {
- unsigned long idr ;
- avr32_pm_idr_t IDR ;
- } u_idr;
- u_idr.idr = 0;
- u_idr.IDR.boddet = 1;
-
- pm->idr = u_idr.idr;
+void pm_bod_disable_irq(volatile avr32_pm_t *pm)
+{
+ pm->idr = AVR32_PM_IDR_BODDET_MASK;
}
-void pm_bod_clear_irq(volatile struct avr32_pm_t *pm) {
-
- union {
- unsigned long icr ;
- avr32_pm_idr_t ICR ;
- } u_icr;
- u_icr.icr = 0;
- u_icr.ICR.boddet = 1;
-
- pm->icr = u_icr.icr;
+void pm_bod_clear_irq(volatile avr32_pm_t *pm)
+{
+ pm->icr = AVR32_PM_ICR_BODDET_MASK;
}
-unsigned long pm_bod_get_irq_status(volatile struct avr32_pm_t *pm) {
-
- return pm->ISR.boddet;
+unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm)
+{
+ return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0);
}
-unsigned long pm_bod_get_irq_enable_bit(volatile struct avr32_pm_t *pm) {
-
- return pm->IMR.boddet;
+unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm)
+{
+ return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0);
}
-unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) {
- union {
- unsigned long bod ;
- avr32_pm_bod_t BOD ;
- } u_bod;
-
- u_bod.bod = pm->bod;
-
- return (unsigned long) u_bod.BOD.level;
-
+unsigned long pm_bod_get_level(volatile avr32_pm_t *pm)
+{
+ return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET;
}
-void pm_write_gplp(volatile avr32_pm_t *pm,unsigned long gplp, unsigned long value) {
- (pm->gplp)[gplp] = value;
-
+void pm_write_gplp(volatile avr32_pm_t *pm,unsigned long gplp, unsigned long value)
+{
+ pm->gplp[gplp] = value;
}
-unsigned long pm_read_gplp(volatile avr32_pm_t *pm,unsigned long gplp) {
-
- return (pm->gplp)[gplp];
+unsigned long pm_read_gplp(volatile avr32_pm_t *pm,unsigned long gplp)
+{
+ return pm->gplp[gplp];
}
diff --git a/Demo/AVR32_UC3/DRIVERS/PM/pm.h b/Demo/AVR32_UC3/DRIVERS/PM/pm.h
index 5a3e6898a..616129b56 100644
--- a/Demo/AVR32_UC3/DRIVERS/PM/pm.h
+++ b/Demo/AVR32_UC3/DRIVERS/PM/pm.h
@@ -9,7 +9,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -44,15 +44,7 @@
#ifndef _PM_H_
#define _PM_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "compiler.h"
#include "preprocessor.h"
@@ -70,6 +62,22 @@
#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
+/*! \brief Gets the MCU reset cause.
+ *
+ * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM).
+ *
+ * \return The MCU reset cause which can be masked with the
+ * \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
+ */
+#if __GNUC__
+__attribute__((__always_inline__))
+#endif
+extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
+{
+ return pm->rcause;
+}
+
+
/*!
* \brief This function will enable the external clock mode of the oscillator 0.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
diff --git a/Demo/AVR32_UC3/DRIVERS/TC/tc.c b/Demo/AVR32_UC3/DRIVERS/TC/tc.c
index 20dfe4ee5..e63cc8f9f 100644
--- a/Demo/AVR32_UC3/DRIVERS/TC/tc.c
+++ b/Demo/AVR32_UC3/DRIVERS/TC/tc.c
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -42,14 +42,7 @@
*/
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "compiler.h"
#include "tc.h"
diff --git a/Demo/AVR32_UC3/DRIVERS/TC/tc.h b/Demo/AVR32_UC3/DRIVERS/TC/tc.h
index f76586d70..381008bee 100644
--- a/Demo/AVR32_UC3/DRIVERS/TC/tc.h
+++ b/Demo/AVR32_UC3/DRIVERS/TC/tc.h
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -45,17 +45,11 @@
#ifndef _TC_H_
#define _TC_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
+#include
//! TC driver functions return value in case of invalid argument(s).
-#define TC_INVALID_ARGUMENT -1
+#define TC_INVALID_ARGUMENT (-1)
//! Number of timer/counter channels.
#define TC_NUMBER_OF_CHANNELS (sizeof(((avr32_tc_t *)0)->channel) / sizeof(avr32_tc_channel_t))
diff --git a/Demo/AVR32_UC3/DRIVERS/USART/usart.c b/Demo/AVR32_UC3/DRIVERS/USART/usart.c
index bdfc98706..3110bf5af 100644
--- a/Demo/AVR32_UC3/DRIVERS/USART/usart.c
+++ b/Demo/AVR32_UC3/DRIVERS/USART/usart.c
@@ -11,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -70,9 +70,12 @@ static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
/*! \brief Calculates a clock divider (\e CD) that gets the USART as close to a
* wanted baudrate as possible.
*
+ * \todo manage the FP fractal part to avoid big errors
+ *
* Baudrate calculation:
* \f$ baudrate = \frac{Selected Clock}{16 \times CD} \f$ with 16x oversampling or
- * \f$ baudrate = \frac{Selected Clock}{8 \times CD} \f$ with 8x oversampling.
+ * \f$ baudrate = \frac{Selected Clock}{8 \times CD} \f$ with 8x oversampling or
+ * \f$ baudrate = \frac{Selected Clock}{CD} \f$ with SYNC bit set to allow high speed.
*
* \param usart Base address of the USART instance.
* \param baudrate Wanted baudrate.
@@ -90,20 +93,30 @@ static int usart_set_baudrate(volatile avr32_usart_t *usart, unsigned int baudra
// Baudrate calculation.
if (baudrate < pba_hz / 16)
{
- // Use 16x oversampling.
- usart->mr &=~ AVR32_USART_MR_OVER_MASK;
- cd = pba_hz / (16 * baudrate);
+ // Use 16x oversampling, clear SYNC bit.
+ usart->mr &=~ (AVR32_USART_MR_OVER_MASK | AVR32_USART_MR_SYNC_MASK);
+ cd = (pba_hz + 8 * baudrate) / (16 * baudrate);
if ((cd >65535)) return USART_INVALID_INPUT;
}
- else
+ else if (baudrate < pba_hz / 8)
{
// Use 8x oversampling.
usart->mr |= AVR32_USART_MR_OVER_MASK;
- cd = pba_hz / (8 * baudrate);
+ // clear SYNC bit
+ usart->mr &=~ AVR32_USART_MR_SYNC_MASK;
+
+ cd = (pba_hz + 4 * baudrate) / (8 * baudrate);
if ((cd < 1)||(cd >65535)) return USART_INVALID_INPUT;
}
+ else
+ {
+ // set SYNC to 1
+ usart->mr |= AVR32_USART_MR_SYNC_MASK;
+ // use PBA/BaudRate
+ cd = (pba_hz / baudrate);
+ }
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
return USART_SUCCESS;
@@ -303,8 +316,6 @@ int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *o
return USART_SUCCESS;
}
-
-
//! @}
diff --git a/Demo/AVR32_UC3/DRIVERS/USART/usart.h b/Demo/AVR32_UC3/DRIVERS/USART/usart.h
index 146db9015..1d731f871 100644
--- a/Demo/AVR32_UC3/DRIVERS/USART/usart.h
+++ b/Demo/AVR32_UC3/DRIVERS/USART/usart.h
@@ -11,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -46,14 +46,7 @@
#ifndef _USART_H_
#define _USART_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "compiler.h"
@@ -97,6 +90,7 @@
#define USART_MODE_SW_HSH AVR32_USART_MR_MODE_SOFTWARE //!< RS232 mode with software handshaking.
//! @}
+
/*! \name Channel Modes
*/
//! @{
@@ -171,6 +165,26 @@ typedef struct
int bit_order;
} iso7816_options_t;
+//! Input parameters when initializing ISO7816 modes.
+typedef struct
+{
+ //! Set the frequency of the SPI clock.
+ unsigned long baudrate;
+
+ //! Number of bits to transmit as a character (5 to 9).
+ unsigned char charlength;
+
+ //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
+ //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
+ unsigned char channelmode;
+
+ //! Which SPI mode to use when transmitting.
+ unsigned char spimode;
+} usart_spi_options_t;
+
+
+
+
//------------------------------------------------------------------------------
/*! \name Initialization Functions
@@ -254,8 +268,50 @@ extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t
*/
extern int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz);
+/*! \brief Sets up the USART to use the SPI mode as master.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ */
+extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
+
+
+/*! \brief Sets up the USART to use the SPI mode as slave.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ */
+extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
+
//! @}
+//------------------------------------------------------------------------------
+/*! \brief Selects slave chip.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return Status.
+ * \retval USART_SUCCESS Success.
+ */
+extern int usart_spi_selectChip(volatile avr32_usart_t *usart);
+
+/*! \brief Unselects slave chip.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return Status.
+ * \retval USART_SUCCESS Success.
+ * \retval USART_FAILURE Time out.
+ */
+extern int usart_spi_unselectChip(volatile avr32_usart_t *usart);
//------------------------------------------------------------------------------
/*! \name Read and Reset Error Status Bits
diff --git a/Demo/AVR32_UC3/FreeRTOSConfig.h b/Demo/AVR32_UC3/FreeRTOSConfig.h
index d12c06b1a..155a65d89 100644
--- a/Demo/AVR32_UC3/FreeRTOSConfig.h
+++ b/Demo/AVR32_UC3/FreeRTOSConfig.h
@@ -1,4 +1,4 @@
-/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief FreeRTOS demonstration for AVR32 UC3.
@@ -8,9 +8,9 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
- *****************************************************************************/
+ ******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
@@ -64,7 +64,7 @@
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 8 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 )
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 1024*30 ) )
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 1024*25 ) )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
@@ -77,23 +77,29 @@
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
-#define INCLUDE_vTaskPrioritySet 1
-#define INCLUDE_uxTaskPriorityGet 1
-#define INCLUDE_vTaskDelete 1
-#define INCLUDE_vTaskCleanUpResources 0
-#define INCLUDE_vTaskSuspend 1
-#define INCLUDE_vTaskDelayUntil 1
-#define INCLUDE_vTaskDelay 1
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 0
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetCurrentTaskHandle 0
/* configTICK_USE_TC is a boolean indicating whether to use a Timer Counter
for the tick generation. Timer Counter will generate an accurate Tick;
otherwise the CPU will generate a tick but with time drift.
- configTICK_TC_CHANNEL is the TC channel.*/
+ configTICK_TC_CHANNEL is the TC channel. */
#define configTICK_USE_TC 1
#define configTICK_TC_CHANNEL 2
+/* configHEAP_INIT is a boolean indicating whether to initialize the heap with
+ 0xA5 in order to be able to determine the maximal heap consumption. */
+#define configHEAP_INIT 0
+
/* Debug trace configuration.
configDBG is a boolean indicating whether to activate the debug trace. */
+#if BOARD == EVK1100
#define configDBG 1
#define configDBG_USART (&AVR32_USART1)
#define configDBG_USART_RX_PIN AVR32_USART1_RXD_0_PIN
@@ -101,5 +107,29 @@ to exclude the API function. */
#define configDBG_USART_TX_PIN AVR32_USART1_TXD_0_PIN
#define configDBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_FUNCTION
#define configDBG_USART_BAUDRATE 57600
+#define serialPORT_USART (&AVR32_USART0)
+#define serialPORT_USART_RX_PIN AVR32_USART0_RXD_0_PIN
+#define serialPORT_USART_RX_FUNCTION AVR32_USART0_RXD_0_FUNCTION
+#define serialPORT_USART_TX_PIN AVR32_USART0_TXD_0_PIN
+#define serialPORT_USART_TX_FUNCTION AVR32_USART0_TXD_0_FUNCTION
+#define serialPORT_USART_IRQ AVR32_USART0_IRQ
+#define serialPORT_USART_BAUDRATE 57600
+#elif BOARD == EVK1101
+#define configDBG 1
+#define configDBG_USART (&AVR32_USART1)
+#define configDBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN
+#define configDBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION
+#define configDBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN
+#define configDBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION
+#define configDBG_USART_BAUDRATE 57600
+#define serialPORT_USART (&AVR32_USART1)
+#define serialPORT_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN
+#define serialPORT_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION
+#define serialPORT_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN
+#define serialPORT_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION
+#define serialPORT_USART_IRQ AVR32_USART1_IRQ
+#define serialPORT_USART_BAUDRATE 57600
+#endif
+
#endif /* FREERTOS_CONFIG_H */
diff --git a/Demo/AVR32_UC3/ParTest/ParTest.c b/Demo/AVR32_UC3/ParTest/ParTest.c
index a8e8e8ad1..da0c2fd47 100644
--- a/Demo/AVR32_UC3/ParTest/ParTest.c
+++ b/Demo/AVR32_UC3/ParTest/ParTest.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -43,14 +41,7 @@
-#if __GNUC__
- #include
-#elif __ICCAVR32__
- #include
-#else
- #error Unknown compiler
-#endif
-
+#include
#include "FreeRTOS.h"
#include "task.h"
#include "partest.h"
diff --git a/Demo/AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S b/Demo/AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S
new file mode 100644
index 000000000..8c4651659
--- /dev/null
+++ b/Demo/AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S
@@ -0,0 +1,72 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AVR32 UC3 ISP trampoline.
+ *
+ * In order to be able to program a project with both BatchISP and JTAGICE mkII
+ * without having to take the general-purpose fuses into consideration, add this
+ * file to the project and change the program entry point to _trampoline.
+ *
+ * The pre-programmed ISP will be erased if JTAGICE mkII is used.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: All AVR32UC devices can be used.
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include "../conf_isp.h"
+
+
+//! @{
+//! \verbatim
+
+
+ // This must be linked @ 0x80000000 if it is to be run upon reset.
+ .section .reset, "ax", @progbits
+
+
+ .global _trampoline
+ .type _trampoline, @function
+_trampoline:
+ // Jump to program start.
+ rjmp program_start
+
+ .org PROGRAM_START_OFFSET
+program_start:
+ // Jump to the C runtime startup routine.
+ lda.w pc, _stext
+
+
+//! \endverbatim
+//! @}
diff --git a/Demo/AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.s82 b/Demo/AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.s82
new file mode 100644
index 000000000..b9e03b143
--- /dev/null
+++ b/Demo/AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.s82
@@ -0,0 +1,91 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AVR32 UC3 ISP trampoline.
+ *
+ * In order to be able to program a project with both BatchISP and JTAGICE mkII
+ * without having to take the general-purpose fuses into consideration, add this
+ * file to the project and change the program entry point to __trampoline.
+ *
+ * The pre-programmed ISP will be erased if JTAGICE mkII is used.
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: All AVR32UC devices can be used.
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include "../conf_isp.h"
+
+
+//! @{
+//! \verbatim
+
+
+ RSEG SSTACK:DATA:NOROOT(2)
+
+
+ // This must be linked @ 0x80000000 if it is to be run upon reset.
+ RSEG RESET:CODE:NOROOT(1)
+
+
+ PUBLIC __trampoline
+__trampoline:
+ // Jump to program start.
+ rjmp program_start
+
+ ORG PROGRAM_START_OFFSET
+program_start:
+ // Initialize the stack pointer.
+ lddpc sp, ??SPS
+ // Jump to the C runtime startup routine.
+ lddpc pc, ??cmain
+
+
+// Constant data area.
+
+ ALIGN 2
+
+??SPS:
+ DC32 SFE(SSTACK) & ~3
+
+ EXTERN ?main
+??cmain:
+ DC32 ?main
+
+
+ END
+
+
+//! \endverbatim
+//! @}
diff --git a/Demo/AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/conf_isp.h b/Demo/AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/conf_isp.h
new file mode 100644
index 000000000..05fd4dcf7
--- /dev/null
+++ b/Demo/AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/conf_isp.h
@@ -0,0 +1,119 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file ******************************************************************
+ *
+ * \brief ISP configuration file.
+ *
+ * This file contains the possible external configuration of the ISP.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 devices with a USB module can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ***************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef _CONF_ISP_H_
+#define _CONF_ISP_H_
+
+#include
+#include "compiler.h"
+
+
+//_____ D E F I N I T I O N S ______________________________________________
+
+#define PRODUCT_MANUFACTURER_ID 0x58
+#define PRODUCT_FAMILY_ID 0x20
+
+#define ISP_VERSION 0x00
+#define ISP_ID0 0x00
+#define ISP_ID1 0x00
+
+#define ISP_GPFB_FORCE 31
+#define ISP_GPFB_FORCE_MASK 0x80000000
+#define ISP_GPFB_FORCE_OFFSET 31
+#define ISP_GPFB_FORCE_SIZE 1
+
+#define ISP_GPFB_IO_COND_EN 30
+#define ISP_GPFB_IO_COND_EN_MASK 0x40000000
+#define ISP_GPFB_IO_COND_EN_OFFSET 30
+#define ISP_GPFB_IO_COND_EN_SIZE 1
+
+#define ISP_GPFB_BOD_EN 29
+#define ISP_GPFB_BOD_EN_MASK 0x20000000
+#define ISP_GPFB_BOD_EN_OFFSET 29
+#define ISP_GPFB_BOD_EN_SIZE 1
+
+#define ISP_CFG (*(volatile U32 *)ISP_CFG_ADDRESS)
+#define ISP_CFG_ADDRESS (AVR32_FLASHC_USER_PAGE_ADDRESS + ISP_CFG_OFFSET)
+#define ISP_CFG_OFFSET 0x000001FC
+#define ISP_CFG_SIZE 4
+
+#define ISP_CFG_BOOT_KEY 17
+#define ISP_CFG_BOOT_KEY_MASK 0xFFFE0000
+#define ISP_CFG_BOOT_KEY_OFFSET 17
+#define ISP_CFG_BOOT_KEY_SIZE 15
+#define ISP_CFG_BOOT_KEY_VALUE 0x494F
+
+#define ISP_CFG_IO_COND_LEVEL 16
+#define ISP_CFG_IO_COND_LEVEL_MASK 0x00010000
+#define ISP_CFG_IO_COND_LEVEL_OFFSET 16
+#define ISP_CFG_IO_COND_LEVEL_SIZE 1
+
+#define ISP_CFG_IO_COND_PIN 8
+#define ISP_CFG_IO_COND_PIN_MASK 0x0000FF00
+#define ISP_CFG_IO_COND_PIN_OFFSET 8
+#define ISP_CFG_IO_COND_PIN_SIZE 8
+
+#define ISP_CFG_CRC8 0
+#define ISP_CFG_CRC8_MASK 0x000000FF
+#define ISP_CFG_CRC8_OFFSET 0
+#define ISP_CFG_CRC8_SIZE 8
+#define ISP_CFG_CRC8_POLYNOMIAL 0x107
+
+#define ISP_KEY (*(volatile U32 *)ISP_KEY_ADDRESS)
+#define ISP_KEY_ADDRESS (AVR32_SRAM_ADDRESS + ISP_KEY_OFFSET)
+#define ISP_KEY_OFFSET 0x00000000
+#define ISP_KEY_SIZE 4
+#define ISP_KEY_VALUE ('I' << 24 | 'S' << 16 | 'P' << 8 | 'K')
+
+#ifndef ISP_OSC
+ #define ISP_OSC 0
+#endif
+
+#define DFU_FRAME_LENGTH 2048
+
+#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET)
+#define PROGRAM_START_OFFSET 0x00002000
+
+
+#endif // _CONF_ISP_H_
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/GCC/link_uc3a0128.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/GCC/link_uc3a0128.lds
new file mode 100644
index 000000000..29c4eb51d
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/GCC/link_uc3a0128.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0128 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A0128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
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+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
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+ . = ORIGIN(INTRAM);
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+ /* Exception handling */
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+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
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+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
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+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
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+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
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+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
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+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
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+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
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+ KEEP (*(.dtors))
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+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
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+ *(.bss .bss.* .gnu.linkonce.b.*)
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+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
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+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
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+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
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+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
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+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
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+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/IAR/lnkuc3a0128.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/IAR/lnkuc3a0128.xcl
new file mode 100644
index 000000000..3f42ec322
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/IAR/lnkuc3a0128.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0128 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A0128:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8001FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A0128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8001FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8001FFFF
+-Z@(CODE)EV100=80004100-8001FFFF
+-P(CODE)EVSEG=80004000-8001FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8001FFFF
+-P(CONST)DATA32_C=80000000-8001FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/GCC/link_uc3a0256.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/GCC/link_uc3a0256.lds
new file mode 100644
index 000000000..6369fd426
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/GCC/link_uc3a0256.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0256 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A0256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
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+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
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+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
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+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/IAR/lnkuc3a0256.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/IAR/lnkuc3a0256.xcl
new file mode 100644
index 000000000..d037025d6
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/IAR/lnkuc3a0256.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0256 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A0256:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x0000FFFF SRAM RAM
+ * 0x80000000 0x8003FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A0256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8003FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8003FFFF
+-Z@(CODE)EV100=80004100-8003FFFF
+-P(CODE)EVSEG=80004000-8003FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8003FFFF
+-P(CONST)DATA32_C=80000000-8003FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
+-Z(DATA)TRACEBUFFER=00000004-0000FFFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds
new file mode 100644
index 000000000..d89138cb5
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0512 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A0512
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00080000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
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+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
+ .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
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+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
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+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
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+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/IAR/lnkuc3a0512.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/IAR/lnkuc3a0512.xcl
new file mode 100644
index 000000000..d6173e786
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/IAR/lnkuc3a0512.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0512 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A0512:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x0000FFFF SRAM RAM
+ * 0x80000000 0x8007FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A0512
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8007FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8007FFFF
+-Z@(CODE)EV100=80004100-8007FFFF
+-P(CODE)EVSEG=80004000-8007FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8007FFFF
+-P(CONST)DATA32_C=80000000-8007FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8007FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8007FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8007FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8007FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
+-Z(DATA)TRACEBUFFER=00000004-0000FFFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/GCC/link_uc3a1128.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/GCC/link_uc3a1128.lds
new file mode 100644
index 000000000..ffc92e4da
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/GCC/link_uc3a1128.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1128 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A1128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
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+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
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+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
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+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
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+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/IAR/lnkuc3a1128.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/IAR/lnkuc3a1128.xcl
new file mode 100644
index 000000000..9f9237cd7
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/IAR/lnkuc3a1128.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1128 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A1128:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8001FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A1128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8001FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8001FFFF
+-Z@(CODE)EV100=80004100-8001FFFF
+-P(CODE)EVSEG=80004000-8001FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8001FFFF
+-P(CONST)DATA32_C=80000000-8001FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds
new file mode 100644
index 000000000..1e464f832
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1256 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A1256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
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+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/IAR/lnkuc3a1256.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/IAR/lnkuc3a1256.xcl
new file mode 100644
index 000000000..823654a68
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/IAR/lnkuc3a1256.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1256 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A1256:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x0000FFFF SRAM RAM
+ * 0x80000000 0x8003FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A1256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8003FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8003FFFF
+-Z@(CODE)EV100=80004100-8003FFFF
+-P(CODE)EVSEG=80004000-8003FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8003FFFF
+-P(CONST)DATA32_C=80000000-8003FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
+-Z(DATA)TRACEBUFFER=00000004-0000FFFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/GCC/link_uc3a1512.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/GCC/link_uc3a1512.lds
new file mode 100644
index 000000000..a171bd0b6
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/GCC/link_uc3a1512.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1512 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A1512
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00080000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
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+ /* Exception handling */
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+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
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+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
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+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
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+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
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+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
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+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
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+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
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+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
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+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
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+ {
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+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/IAR/lnkuc3a1512.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/IAR/lnkuc3a1512.xcl
new file mode 100644
index 000000000..33ec1d367
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/IAR/lnkuc3a1512.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1512 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A1512:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x0000FFFF SRAM RAM
+ * 0x80000000 0x8007FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A1512
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8007FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8007FFFF
+-Z@(CODE)EV100=80004100-8007FFFF
+-P(CODE)EVSEG=80004000-8007FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8007FFFF
+-P(CONST)DATA32_C=80000000-8007FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8007FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8007FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8007FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8007FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
+-Z(DATA)TRACEBUFFER=00000004-0000FFFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/GCC/link_uc3b0128.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/GCC/link_uc3b0128.lds
new file mode 100644
index 000000000..cf3a8db14
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/GCC/link_uc3b0128.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B0128 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B0128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
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+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
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+
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+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
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+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
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+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
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+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/IAR/lnkuc3b0128.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/IAR/lnkuc3b0128.xcl
new file mode 100644
index 000000000..f45cf7392
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/IAR/lnkuc3b0128.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B0128 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B0128:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8001FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B0128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8001FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8001FFFF
+-Z@(CODE)EV100=80004100-8001FFFF
+-P(CODE)EVSEG=80004000-8001FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8001FFFF
+-P(CONST)DATA32_C=80000000-8001FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/GCC/link_uc3b0256.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/GCC/link_uc3b0256.lds
new file mode 100644
index 000000000..e23901562
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/GCC/link_uc3b0256.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B0256 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B0256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
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+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
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+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
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+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
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+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
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+ is in. */
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+ /* We don't want to include the .ctor section from
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+ The .ctor section from the crtend file contains the
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+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
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+ {
+ *(.data .data.* .gnu.linkonce.d.*)
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+ } >INTRAM AT>FLASH :FLASH
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+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/IAR/lnkuc3b0256.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/IAR/lnkuc3b0256.xcl
new file mode 100644
index 000000000..46fcbea95
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/IAR/lnkuc3b0256.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B0256 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B0256:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8003FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B0256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8003FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8003FFFF
+-Z@(CODE)EV100=80004100-8003FFFF
+-P(CODE)EVSEG=80004000-8003FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8003FFFF
+-P(CONST)DATA32_C=80000000-8003FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/GCC/link_uc3b064.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/GCC/link_uc3b064.lds
new file mode 100644
index 000000000..579a3908c
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/GCC/link_uc3b064.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B064 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B064
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00010000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00003FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
+ .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/IAR/lnkuc3b064.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/IAR/lnkuc3b064.xcl
new file mode 100644
index 000000000..ab7b2ee17
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/IAR/lnkuc3b064.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B064 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B064:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00003FFF SRAM RAM
+ * 0x80000000 0x8000FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B064
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8000FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8000FFFF
+-Z@(CODE)EV100=80004100-8000FFFF
+-P(CODE)EVSEG=80004000-8000FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8000FFFF
+-P(CONST)DATA32_C=80000000-8000FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8000FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8000FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8000FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8000FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00003FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00003FFF
+-Z(DATA)TRACEBUFFER=00000004-00003FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00003FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00003FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00003FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/GCC/link_uc3b1128.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/GCC/link_uc3b1128.lds
new file mode 100644
index 000000000..dba3d8df4
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/GCC/link_uc3b1128.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B1128 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B1128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
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+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
+ .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/IAR/lnkuc3b1128.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/IAR/lnkuc3b1128.xcl
new file mode 100644
index 000000000..4d50bc137
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/IAR/lnkuc3b1128.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B1128 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B1128:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8001FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B1128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8001FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8001FFFF
+-Z@(CODE)EV100=80004100-8001FFFF
+-P(CODE)EVSEG=80004000-8001FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8001FFFF
+-P(CONST)DATA32_C=80000000-8001FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/GCC/link_uc3b1256.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/GCC/link_uc3b1256.lds
new file mode 100644
index 000000000..619a159a1
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/GCC/link_uc3b1256.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B1256 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B1256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
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+ /* Ensure the __preinit_array_start label is properly aligned. We
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+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
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+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/IAR/lnkuc3b1256.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/IAR/lnkuc3b1256.xcl
new file mode 100644
index 000000000..f765e4e9c
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/IAR/lnkuc3b1256.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B1256 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B1256:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8003FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B1256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8003FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8003FFFF
+-Z@(CODE)EV100=80004100-8003FFFF
+-P(CODE)EVSEG=80004000-8003FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8003FFFF
+-P(CONST)DATA32_C=80000000-8003FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/GCC/link_uc3b164.lds b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/GCC/link_uc3b164.lds
new file mode 100644
index 000000000..cae225d89
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/GCC/link_uc3b164.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B164 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B164
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00010000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00003FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
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+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
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+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
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+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
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+ .text :
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+ *(.text .stub .text.* .gnu.linkonce.t.*)
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+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
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+ .fini :
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+ KEEP (*(.fini))
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+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
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+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/IAR/lnkuc3b164.xcl b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/IAR/lnkuc3b164.xcl
new file mode 100644
index 000000000..01af490cf
--- /dev/null
+++ b/Demo/AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/IAR/lnkuc3b164.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B164 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B164:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00003FFF SRAM RAM
+ * 0x80000000 0x8000FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B164
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8000FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8000FFFF
+-Z@(CODE)EV100=80004100-8000FFFF
+-P(CODE)EVSEG=80004000-8000FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8000FFFF
+-P(CONST)DATA32_C=80000000-8000FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8000FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8000FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8000FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8000FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00003FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00003FFF
+-Z(DATA)TRACEBUFFER=00000004-00003FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00003FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00003FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00003FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h
index 3457d20f8..83b5f4916 100644
--- a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h
+++ b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -9,7 +7,7 @@
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h
index 47e4cd2e8..8a5813ef6 100644
--- a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h
+++ b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -9,7 +7,7 @@
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
diff --git a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/stringz.h b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/stringz.h
index fbeb5156c..8230b69e1 100644
--- a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/stringz.h
+++ b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/stringz.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -9,7 +7,7 @@
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -47,23 +45,23 @@
/*! \brief Stringize.
*
- * Stringize a preprocessing token, this token being allowed to be #defined.
+ * Stringize a preprocessing token, this token being allowed to be \#defined.
*
- * May be used only within macros with the token passed as an argument if the token is #defined.
+ * May be used only within macros with the token passed as an argument if the token is \#defined.
*
- * For example, writing STRINGZ(PIN) within a macro #defined by PIN_NAME(PIN)
- * and invoked as PIN_NAME(PIN0) with PIN0 #defined as A0 is equivalent to
+ * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN)
+ * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to
* writing "A0".
*/
#define STRINGZ(x) #x
/*! \brief Absolute stringize.
*
- * Stringize a preprocessing token, this token being allowed to be #defined.
+ * Stringize a preprocessing token, this token being allowed to be \#defined.
*
- * No restriction of use if the token is #defined.
+ * No restriction of use if the token is \#defined.
*
- * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 #defined as A0 is
+ * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is
* equivalent to writing "A0".
*/
#define ASTRINGZ(x) STRINGZ(x)
diff --git a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h
index bcedcd01d..ed1fe9cf6 100644
--- a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h
+++ b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -9,7 +7,7 @@
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -47,12 +45,12 @@
/*! \name Token Paste
*
- * Paste N preprocessing tokens together, these tokens being allowed to be #defined.
+ * Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
- * May be used only within macros with the tokens passed as arguments if the tokens are #defined.
+ * May be used only within macros with the tokens passed as arguments if the tokens are \#defined.
*
- * For example, writing TPASTE2(U, WIDTH) within a macro #defined by
- * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH #defined as 32 is
+ * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by
+ * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is
* equivalent to writing U32.
*/
//! @{
@@ -69,11 +67,11 @@
/*! \name Absolute Token Paste
*
- * Paste N preprocessing tokens together, these tokens being allowed to be #defined.
+ * Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
- * No restriction of use if the tokens are #defined.
+ * No restriction of use if the tokens are \#defined.
*
- * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH #defined
+ * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined
* as 32 is equivalent to writing U32.
*/
//! @{
diff --git a/Demo/AVR32_UC3/UTILS/compiler.h b/Demo/AVR32_UC3/UTILS/compiler.h
index 77483303b..5d75c0937 100644
--- a/Demo/AVR32_UC3/UTILS/compiler.h
+++ b/Demo/AVR32_UC3/UTILS/compiler.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -12,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -47,18 +45,10 @@
#ifndef _COMPILER_H_
#define _COMPILER_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__ || __AAVR32__
-# include
-# include
-# if __ICCAVR32__
-# include
-# endif
-#else
-# error Unknown compiler
+#include
+#if __ICCAVR32__
+# include
#endif
-
#include "preprocessor.h"
@@ -69,6 +59,22 @@
#include
#include
+
+#if __ICCAVR32__
+
+/*! \name Compiler Keywords
+ *
+ * Port of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32.
+ */
+//! @{
+#define __asm__ asm
+#define __inline__ inline
+#define __volatile__
+//! @}
+
+#endif
+
+
/*! \name Usual Types
*/
//! @{
@@ -85,6 +91,7 @@ typedef float F32; //!< 32-bit floating-point number.
typedef double F64; //!< 64-bit floating-point number.
//! @}
+
/*! \name Status Types
*/
//! @{
@@ -92,19 +99,6 @@ typedef Bool Status_bool_t; //!< Boolean status.
typedef U8 Status_t; //!< 8-bit-coded status.
//! @}
-#if __ICCAVR32__
-
-/*! \name Compiler Keywords
- *
- * Translation of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32.
- */
-//! @{
-#define __asm__ asm
-#define __inline__ inline
-#define __volatile__
-//! @}
-
-#endif
/*! \name Aliasing Aggregate Types
*/
@@ -210,6 +204,7 @@ typedef struct
#endif // __AVR32_ABI_COMPILER__
+
//_____ M A C R O S ________________________________________________________
/*! \name Usual Constants
@@ -233,9 +228,10 @@ typedef struct
#define SET 1
//! @}
+
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
-/*! \name Bit-Field Handling Macros
+/*! \name Bit-Field Handling
*/
//! @{
@@ -316,6 +312,7 @@ typedef struct
//! @}
+
/*! \brief This macro is used to test fatal errors.
*
* The macro tests if the expression is FALSE. If it is, a fatal error is
@@ -332,7 +329,8 @@ typedef struct
#define Assert(expr)
#endif
-/*! \name Zero-Bit Counting Macros
+
+/*! \name Zero-Bit Counting
*
* Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when
* applied to constant expressions (values known at compile time), so they are
@@ -372,7 +370,8 @@ typedef struct
//! @}
-/*! \name Alignment Macros
+
+/*! \name Alignment
*/
//! @{
@@ -424,7 +423,8 @@ typedef struct
//! @}
-/*! \name Mathematics Macros
+
+/*! \name Mathematics
*
* The same considerations as for clz and ctz apply here but AVR32-GCC does not
* provide built-in functions to access the assembly instructions abs, min and
@@ -536,6 +536,7 @@ typedef struct
//! @}
+
/*! \brief Calls the routine at address \a addr.
*
* It generates a long call opcode.
@@ -558,18 +559,39 @@ typedef struct
(\
{\
__asm__ __volatile__ (\
- "lda.w r8, _start\n\t"\
- "lddpc r9, 1f\n\t"\
- "stm --sp, r8-r9\n\t"\
+ "lddpc r9, 3f\n\t"\
"mfsr r8, %[SR]\n\t"\
"bfextu r8, r8, %[SR_MX_OFFSET], %[SR_MX_SIZE]\n\t"\
"cp.w r8, 0b001\n\t"\
"breq 0f\n\t"\
+ "sub r8, pc, $ - 1f\n\t"\
+ "pushm r8-r9\n\t"\
"rete\n"\
"0:\n\t"\
- "rets\n\t"\
- ".balign 4\n"\
+ "mtsr %[SR], r9\n"\
"1:\n\t"\
+ "mov r0, 0\n\t"\
+ "mov r1, 0\n\t"\
+ "mov r2, 0\n\t"\
+ "mov r3, 0\n\t"\
+ "mov r4, 0\n\t"\
+ "mov r5, 0\n\t"\
+ "mov r6, 0\n\t"\
+ "mov r7, 0\n\t"\
+ "mov r8, 0\n\t"\
+ "mov r9, 0\n\t"\
+ "mov r10, 0\n\t"\
+ "mov r11, 0\n\t"\
+ "mov r12, 0\n\t"\
+ "mov sp, 0\n\t"\
+ "stdsp sp[0], sp\n\t"\
+ "ldmts sp, sp\n\t"\
+ "mov lr, 0\n\t"\
+ "lddpc pc, 2f\n\t"\
+ ".balign 4\n"\
+ "2:\n\t"\
+ ".word _start\n"\
+ "3:\n\t"\
".word %[RESET_SR]"\
:\
: [SR] "i" (AVR32_SR),\
@@ -584,27 +606,84 @@ typedef struct
{\
extern void *volatile __program_start;\
__asm__ __volatile__ (\
- "mov r8, LWRD(__program_start)\n\t"\
- "orh r8, HWRD(__program_start)\n\t"\
+ "mov r7, LWRD(__program_start)\n\t"\
+ "orh r7, HWRD(__program_start)\n\t"\
"mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\
"orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\
- "stm --sp, r8-r9\n\t"\
"mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\
"bfextu r8, r8, "ASTRINGZ(AVR32_SR_M0_OFFSET)", "ASTRINGZ(AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE)"\n\t"\
"cp.w r8, 001b\n\t"\
- "breq $ + 4\n\t"\
+ "breq $ + 10\n\t"\
+ "sub r8, pc, -12\n\t"\
+ "pushm r8-r9\n\t"\
"rete\n\t"\
- "rets"\
+ "mtsr "ASTRINGZ(AVR32_SR)", r9\n\t"\
+ "mov r0, 0\n\t"\
+ "mov r1, 0\n\t"\
+ "mov r2, 0\n\t"\
+ "mov r3, 0\n\t"\
+ "mov r4, 0\n\t"\
+ "mov r5, 0\n\t"\
+ "mov r6, 0\n\t"\
+ "st.w r0[4], r7\n\t"\
+ "mov r7, 0\n\t"\
+ "mov r8, 0\n\t"\
+ "mov r9, 0\n\t"\
+ "mov r10, 0\n\t"\
+ "mov r11, 0\n\t"\
+ "mov r12, 0\n\t"\
+ "mov sp, 0\n\t"\
+ "stdsp sp[0], sp\n\t"\
+ "ldmts sp, sp\n\t"\
+ "mov lr, 0\n\t"\
+ "ld.w pc, lr[4]"\
);\
__program_start;\
-}
+ }
#endif
-/*! \name CPU Status Register Macros
+
+/*! \name System Register Access
*/
//! @{
-/*! \brief Disables all exceptions.
+/*! \brief Gets the value of the \a sysreg system register.
+ *
+ * \param sysreg Address of the system register of which to get the value.
+ *
+ * \return Value of the \a sysreg system register.
+ */
+#if __GNUC__
+ #define Get_system_register(sysreg) __builtin_mfsr(sysreg)
+#elif __ICCAVR32__
+ #define Get_system_register(sysreg) __get_system_register(sysreg)
+#endif
+
+/*! \brief Sets the value of the \a sysreg system register to \a value.
+ *
+ * \param sysreg Address of the system register of which to set the value.
+ * \param value Value to set the \a sysreg system register to.
+ */
+#if __GNUC__
+ #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value)
+#elif __ICCAVR32__
+ #define Set_system_register(sysreg, value) __set_system_register(sysreg, value)
+#endif
+
+//! @}
+
+
+/*! \name CPU Status Register Access
+ */
+//! @{
+
+/*! \brief Tells whether exceptions are globally enabled.
+ *
+ * \return \c 1 if exceptions are globally enabled, else \c 0.
+ */
+#define Is_global_exception_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK))
+
+/*! \brief Disables exceptions globally.
*/
#if __GNUC__
#define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));})
@@ -612,7 +691,7 @@ typedef struct
#define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET))
#endif
-/*! \brief Enables all exceptions.
+/*! \brief Enables exceptions globally.
*/
#if __GNUC__
#define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));})
@@ -620,7 +699,13 @@ typedef struct
#define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET))
#endif
-/*! \brief Disables all interrupts.
+/*! \brief Tells whether interrupts are globally enabled.
+ *
+ * \return \c 1 if interrupts are globally enabled, else \c 0.
+ */
+#define Is_global_interrupt_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_GM_MASK))
+
+/*! \brief Disables interrupts globally.
*/
#if __GNUC__
#define Disable_global_interrupt() ({__asm__ __volatile__ ("ssrf\t%0\n\tnop\n\tnop" : : "i" (AVR32_SR_GM_OFFSET));})
@@ -628,7 +713,7 @@ typedef struct
#define Disable_global_interrupt() {__asm__ __volatile__ ("ssrf\t"ASTRINGZ(AVR32_SR_GM_OFFSET)"\n\tnop\n\tnop");}
#endif
-/*! \brief Enables all interrupts.
+/*! \brief Enables interrupts globally.
*/
#if __GNUC__
#define Enable_global_interrupt() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_GM_OFFSET));})
@@ -636,6 +721,14 @@ typedef struct
#define Enable_global_interrupt() (__enable_interrupt())
#endif
+/*! \brief Tells whether interrupt level \a int_lev is enabled.
+ *
+ * \param int_lev Interrupt level (0 to 3).
+ *
+ * \return \c 1 if interrupt level \a int_lev is enabled, else \c 0.
+ */
+#define Is_interrupt_level_enabled(int_lev) (!Tst_bits(Get_system_register(AVR32_SR), TPASTE3(AVR32_SR_I, int_lev, M_MASK)))
+
/*! \brief Disables interrupt level \a int_lev.
*
* \param int_lev Interrupt level to disable (0 to 3).
@@ -658,37 +751,9 @@ typedef struct
//! @}
-/*! \name System Register Access Macros
- */
-//! @{
-
-/*! \brief Gets the value of the \a sysreg system register.
- *
- * \param sysreg Address of the system register of which to get the value.
- *
- * \return Value of the \a sysreg system register.
- */
-#if __GNUC__
- #define Get_system_register(sysreg) __builtin_mfsr(sysreg)
-#elif __ICCAVR32__
- #define Get_system_register(sysreg) __get_system_register(sysreg)
-#endif
-
-/*! \brief Sets the value of the \a sysreg system register to \a value.
- *
- * \param sysreg Address of the system register of which to set the value.
- * \param value Value to set the \a sysreg system register to.
- */
-#if __GNUC__
- #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value)
-#elif __ICCAVR32__
- #define Set_system_register(sysreg, value) __set_system_register(sysreg, value)
-#endif
-
-//! @}
-
#endif // __AVR32_ABI_COMPILER__
+
//! Boolean evaluating MCU little endianism.
#if (__GNUC__ && __AVR32__) || (__ICCAVR32__ || __AAVR32__)
#define LITTLE_ENDIAN_MCU FALSE
@@ -702,34 +767,39 @@ typedef struct
//! Boolean evaluating MCU big endianism.
#define BIG_ENDIAN_MCU (!LITTLE_ENDIAN_MCU)
+
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
-/*! \name U16/U32/U64 MCU Endianism Handling Macros
+/*! \name MCU Endianism Handling
*/
//! @{
+
#if LITTLE_ENDIAN_MCU
+
#define LSB(u16) (((U8 *)&(u16))[0]) //!< Least significant byte of \a u16.
#define MSB(u16) (((U8 *)&(u16))[1]) //!< Most significant byte of \a u16.
+
#define LSH(u32) (((U16 *)&(u32))[0]) //!< Least significant half-word of \a u32.
#define MSH(u32) (((U16 *)&(u32))[1]) //!< Most significant half-word of \a u32.
#define LSB0W(u32) (((U8 *)&(u32))[0]) //!< Least significant byte of 1st rank of \a u32.
#define LSB1W(u32) (((U8 *)&(u32))[1]) //!< Least significant byte of 2nd rank of \a u32.
#define LSB2W(u32) (((U8 *)&(u32))[2]) //!< Least significant byte of 3rd rank of \a u32.
#define LSB3W(u32) (((U8 *)&(u32))[3]) //!< Least significant byte of 4th rank of \a u32.
- #define MSB3W(u32) LSB0W(u32) //!< Most significant byte of 1st rank of \a u32.
- #define MSB2W(u32) LSB1W(u32) //!< Most significant byte of 2nd rank of \a u32.
- #define MSB1W(u32) LSB2W(u32) //!< Most significant byte of 3rd rank of \a u32.
- #define MSB0W(u32) LSB3W(u32) //!< Most significant byte of 4th rank of \a u32.
+ #define MSB3W(u32) LSB0W(u32) //!< Most significant byte of 4th rank of \a u32.
+ #define MSB2W(u32) LSB1W(u32) //!< Most significant byte of 3rd rank of \a u32.
+ #define MSB1W(u32) LSB2W(u32) //!< Most significant byte of 2nd rank of \a u32.
+ #define MSB0W(u32) LSB3W(u32) //!< Most significant byte of 1st rank of \a u32.
+
#define LSW(u64) (((U32 *)&(u64))[0]) //!< Least significant word of \a u64.
#define MSW(u64) (((U32 *)&(u64))[1]) //!< Most significant word of \a u64.
#define LSH0(u64) (((U16 *)&(u64))[0]) //!< Least significant half-word of 1st rank of \a u64.
#define LSH1(u64) (((U16 *)&(u64))[1]) //!< Least significant half-word of 2nd rank of \a u64.
#define LSH2(u64) (((U16 *)&(u64))[2]) //!< Least significant half-word of 3rd rank of \a u64.
#define LSH3(u64) (((U16 *)&(u64))[3]) //!< Least significant half-word of 4th rank of \a u64.
- #define MSH3(u64) LSH0(u64) //!< Most significant half-word of 1st rank of \a u64.
- #define MSH2(u64) LSH1(u64) //!< Most significant half-word of 2nd rank of \a u64.
- #define MSH1(u64) LSH2(u64) //!< Most significant half-word of 3rd rank of \a u64.
- #define MSH0(u64) LSH3(u64) //!< Most significant half-word of 4th rank of \a u64.
+ #define MSH3(u64) LSH0(u64) //!< Most significant half-word of 4th rank of \a u64.
+ #define MSH2(u64) LSH1(u64) //!< Most significant half-word of 3rd rank of \a u64.
+ #define MSH1(u64) LSH2(u64) //!< Most significant half-word of 2nd rank of \a u64.
+ #define MSH0(u64) LSH3(u64) //!< Most significant half-word of 1st rank of \a u64.
#define LSB0D(u64) (((U8 *)&(u64))[0]) //!< Least significant byte of 1st rank of \a u64.
#define LSB1D(u64) (((U8 *)&(u64))[1]) //!< Least significant byte of 2nd rank of \a u64.
#define LSB2D(u64) (((U8 *)&(u64))[2]) //!< Least significant byte of 3rd rank of \a u64.
@@ -738,37 +808,41 @@ typedef struct
#define LSB5D(u64) (((U8 *)&(u64))[5]) //!< Least significant byte of 6th rank of \a u64.
#define LSB6D(u64) (((U8 *)&(u64))[6]) //!< Least significant byte of 7th rank of \a u64.
#define LSB7D(u64) (((U8 *)&(u64))[7]) //!< Least significant byte of 8th rank of \a u64.
- #define MSB7D(u64) LSB0D(u64) //!< Most significant byte of 1st rank of \a u64.
- #define MSB6D(u64) LSB1D(u64) //!< Most significant byte of 2nd rank of \a u64.
- #define MSB5D(u64) LSB2D(u64) //!< Most significant byte of 3rd rank of \a u64.
- #define MSB4D(u64) LSB3D(u64) //!< Most significant byte of 4th rank of \a u64.
- #define MSB3D(u64) LSB4D(u64) //!< Most significant byte of 5th rank of \a u64.
- #define MSB2D(u64) LSB5D(u64) //!< Most significant byte of 6th rank of \a u64.
- #define MSB1D(u64) LSB6D(u64) //!< Most significant byte of 7th rank of \a u64.
- #define MSB0D(u64) LSB7D(u64) //!< Most significant byte of 8th rank of \a u64.
+ #define MSB7D(u64) LSB0D(u64) //!< Most significant byte of 8th rank of \a u64.
+ #define MSB6D(u64) LSB1D(u64) //!< Most significant byte of 7th rank of \a u64.
+ #define MSB5D(u64) LSB2D(u64) //!< Most significant byte of 6th rank of \a u64.
+ #define MSB4D(u64) LSB3D(u64) //!< Most significant byte of 5th rank of \a u64.
+ #define MSB3D(u64) LSB4D(u64) //!< Most significant byte of 4th rank of \a u64.
+ #define MSB2D(u64) LSB5D(u64) //!< Most significant byte of 3rd rank of \a u64.
+ #define MSB1D(u64) LSB6D(u64) //!< Most significant byte of 2nd rank of \a u64.
+ #define MSB0D(u64) LSB7D(u64) //!< Most significant byte of 1st rank of \a u64.
+
#else // BIG_ENDIAN_MCU
+
#define MSB(u16) (((U8 *)&(u16))[0]) //!< Most significant byte of \a u16.
#define LSB(u16) (((U8 *)&(u16))[1]) //!< Least significant byte of \a u16.
+
#define MSH(u32) (((U16 *)&(u32))[0]) //!< Most significant half-word of \a u32.
#define LSH(u32) (((U16 *)&(u32))[1]) //!< Least significant half-word of \a u32.
#define MSB0W(u32) (((U8 *)&(u32))[0]) //!< Most significant byte of 1st rank of \a u32.
#define MSB1W(u32) (((U8 *)&(u32))[1]) //!< Most significant byte of 2nd rank of \a u32.
#define MSB2W(u32) (((U8 *)&(u32))[2]) //!< Most significant byte of 3rd rank of \a u32.
#define MSB3W(u32) (((U8 *)&(u32))[3]) //!< Most significant byte of 4th rank of \a u32.
- #define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 1st rank of \a u32.
- #define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 2nd rank of \a u32.
- #define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 3rd rank of \a u32.
- #define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 4th rank of \a u32.
+ #define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 4th rank of \a u32.
+ #define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 3rd rank of \a u32.
+ #define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 2nd rank of \a u32.
+ #define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 1st rank of \a u32.
+
#define MSW(u64) (((U32 *)&(u64))[0]) //!< Most significant word of \a u64.
#define LSW(u64) (((U32 *)&(u64))[1]) //!< Least significant word of \a u64.
#define MSH0(u64) (((U16 *)&(u64))[0]) //!< Most significant half-word of 1st rank of \a u64.
#define MSH1(u64) (((U16 *)&(u64))[1]) //!< Most significant half-word of 2nd rank of \a u64.
#define MSH2(u64) (((U16 *)&(u64))[2]) //!< Most significant half-word of 3rd rank of \a u64.
#define MSH3(u64) (((U16 *)&(u64))[3]) //!< Most significant half-word of 4th rank of \a u64.
- #define LSH3(u64) MSH0(u64) //!< Least significant half-word of 1st rank of \a u64.
- #define LSH2(u64) MSH1(u64) //!< Least significant half-word of 2nd rank of \a u64.
- #define LSH1(u64) MSH2(u64) //!< Least significant half-word of 3rd rank of \a u64.
- #define LSH0(u64) MSH3(u64) //!< Least significant half-word of 4th rank of \a u64.
+ #define LSH3(u64) MSH0(u64) //!< Least significant half-word of 4th rank of \a u64.
+ #define LSH2(u64) MSH1(u64) //!< Least significant half-word of 3rd rank of \a u64.
+ #define LSH1(u64) MSH2(u64) //!< Least significant half-word of 2nd rank of \a u64.
+ #define LSH0(u64) MSH3(u64) //!< Least significant half-word of 1st rank of \a u64.
#define MSB0D(u64) (((U8 *)&(u64))[0]) //!< Most significant byte of 1st rank of \a u64.
#define MSB1D(u64) (((U8 *)&(u64))[1]) //!< Most significant byte of 2nd rank of \a u64.
#define MSB2D(u64) (((U8 *)&(u64))[2]) //!< Most significant byte of 3rd rank of \a u64.
@@ -777,18 +851,21 @@ typedef struct
#define MSB5D(u64) (((U8 *)&(u64))[5]) //!< Most significant byte of 6th rank of \a u64.
#define MSB6D(u64) (((U8 *)&(u64))[6]) //!< Most significant byte of 7th rank of \a u64.
#define MSB7D(u64) (((U8 *)&(u64))[7]) //!< Most significant byte of 8th rank of \a u64.
- #define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 1st rank of \a u64.
- #define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 2nd rank of \a u64.
- #define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 3rd rank of \a u64.
- #define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 4th rank of \a u64.
- #define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 5th rank of \a u64.
- #define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 6th rank of \a u64.
- #define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 7th rank of \a u64.
- #define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 8th rank of \a u64.
+ #define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 8th rank of \a u64.
+ #define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 7th rank of \a u64.
+ #define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 6th rank of \a u64.
+ #define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 5th rank of \a u64.
+ #define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 4th rank of \a u64.
+ #define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 3rd rank of \a u64.
+ #define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 2nd rank of \a u64.
+ #define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 1st rank of \a u64.
+
#endif
+
//! @}
-/*! \name Endianism Conversion Macros
+
+/*! \name Endianism Conversion
*
* The same considerations as for clz and ctz apply here but AVR32-GCC's
* __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when
@@ -874,6 +951,35 @@ typedef struct
//! @}
+
+/*! \name Target Abstraction
+ */
+//! @{
+
+#define _GLOBEXT_ extern //!< extern storage-class specifier.
+#define _CONST_TYPE_ const //!< const type qualifier.
+#define _MEM_TYPE_SLOW_ //!< Slow memory type.
+#define _MEM_TYPE_MEDFAST_ //!< Fairly fast memory type.
+#define _MEM_TYPE_FAST_ //!< Fast memory type.
+
+typedef U8 Byte; //!< 8-bit unsigned integer.
+
+#define memcmp_ram2ram memcmp //!< Target-specific memcmp of RAM to RAM.
+#define memcmp_code2ram memcmp //!< Target-specific memcmp of RAM to NVRAM.
+#define memcpy_ram2ram memcpy //!< Target-specific memcpy from RAM to RAM.
+#define memcpy_code2ram memcpy //!< Target-specific memcpy from NVRAM to RAM.
+
+#define LSB0(u32) LSB0W(u32) //!< Least significant byte of 1st rank of \a u32.
+#define LSB1(u32) LSB1W(u32) //!< Least significant byte of 2nd rank of \a u32.
+#define LSB2(u32) LSB2W(u32) //!< Least significant byte of 3rd rank of \a u32.
+#define LSB3(u32) LSB3W(u32) //!< Least significant byte of 4th rank of \a u32.
+#define MSB3(u32) MSB3W(u32) //!< Most significant byte of 4th rank of \a u32.
+#define MSB2(u32) MSB2W(u32) //!< Most significant byte of 3rd rank of \a u32.
+#define MSB1(u32) MSB1W(u32) //!< Most significant byte of 2nd rank of \a u32.
+#define MSB0(u32) MSB0W(u32) //!< Most significant byte of 1st rank of \a u32.
+
+//! @}
+
#endif // __AVR32_ABI_COMPILER__
diff --git a/Demo/AVR32_UC3/documentation.h b/Demo/AVR32_UC3/documentation.h
index 0c976ca8e..aefc799be 100644
--- a/Demo/AVR32_UC3/documentation.h
+++ b/Demo/AVR32_UC3/documentation.h
@@ -8,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -68,5 +68,5 @@
* For further information, visit
* Atmel AVR32 . and
* FreeRTOS home page .\n
- * Support e-mail address: avr32@atmel.com.
+ * Support and FAQ: http://support.atmel.no/
*/
diff --git a/Demo/AVR32_UC3/main.c b/Demo/AVR32_UC3/main.c
index 7556a9b5c..7bc3d022c 100644
--- a/Demo/AVR32_UC3/main.c
+++ b/Demo/AVR32_UC3/main.c
@@ -138,7 +138,7 @@
//! @{
#define mainMEM_CHECK_SIZE_1 ( ( size_t ) 51 )
#define mainMEM_CHECK_SIZE_2 ( ( size_t ) 52 )
-#define mainMEM_CHECK_SIZE_3 ( ( size_t ) 151 )
+#define mainMEM_CHECK_SIZE_3 ( ( size_t ) 15 )
//! @}
diff --git a/Demo/AVR32_UC3/serial/serial.c b/Demo/AVR32_UC3/serial/serial.c
index 7a7ea02ba..c9424b55d 100644
--- a/Demo/AVR32_UC3/serial/serial.c
+++ b/Demo/AVR32_UC3/serial/serial.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -43,7 +41,7 @@
/*
- BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
+ BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART.
*/
/* Scheduler includes. */
@@ -53,15 +51,7 @@
/* Demo application includes. */
#include "serial.h"
-
-#if __GNUC__
- #include
-#elif __ICCAVR32__
- #include
-#else
- #error Unknown compiler
-#endif
-
+#include
#include "board.h"
#include "gpio.h"
@@ -95,17 +85,17 @@ static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength,
#pragma optimize = no_inline
#endif
-static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
+static portBASE_TYPE prvUSART_ISR_NonNakedBehaviour( void )
{
/* Now we can declare the local variables. */
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
unsigned portLONG ulStatus;
- volatile avr32_usart_t *usart0 = &AVR32_USART0;
+ volatile avr32_usart_t *usart = serialPORT_USART;
portBASE_TYPE retstatus;
/* What caused the interrupt? */
- ulStatus = usart0->csr & usart0->imr;
+ ulStatus = usart->csr & usart->imr;
if (ulStatus & AVR32_USART_CSR_TXRDY_MASK)
{
@@ -121,19 +111,19 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
- usart0->thr = cChar;
+ usart->thr = cChar;
}
else
{
/* Queue empty, nothing to send so turn off the Tx interrupt. */
- usart0->idr = AVR32_USART_IDR_TXRDY_MASK;
+ usart->idr = AVR32_USART_IDR_TXRDY_MASK;
}
}
if (ulStatus & AVR32_USART_CSR_RXRDY_MASK)
{
/* The interrupt was caused by the receiver getting data. */
- cChar = usart0->rhr; //TODO
+ cChar = usart->rhr; //TODO
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
@@ -154,7 +144,7 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
/*-----------------------------------------------------------*/
/*
- * USART0 interrupt service routine.
+ * USART interrupt service routine.
*/
#if __GNUC__
__attribute__((__naked__))
@@ -162,15 +152,15 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
#pragma shadow_registers = full // Naked.
#endif
-static void vUSART0_ISR( void )
+static void vUSART_ISR( void )
{
/* This ISR can cause a context switch, so the first statement must be a
call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
variable declarations. */
portENTER_SWITCHING_ISR();
-
- prvUSART0_ISR_NonNakedBehaviour();
-
+
+ prvUSART_ISR_NonNakedBehaviour();
+
/* Exit the ISR. If a task was woken by either a character being received
or transmitted then a context switch will occur. */
portEXIT_SWITCHING_ISR();
@@ -183,14 +173,20 @@ static void vUSART0_ISR( void )
*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
+static const gpio_map_t USART_GPIO_MAP =
+{
+ { serialPORT_USART_RX_PIN, serialPORT_USART_RX_FUNCTION },
+ { serialPORT_USART_TX_PIN, serialPORT_USART_TX_FUNCTION }
+};
+
xComPortHandle xReturn = serHANDLE;
-volatile avr32_usart_t *usart0 = &AVR32_USART0;
-int cd; /* USART0 Clock Divider. */
+volatile avr32_usart_t *usart = serialPORT_USART;
+int cd; /* USART Clock Divider. */
/* Create the rx and tx queues. */
vprvSerialCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );
- /* Configure USART0. */
+ /* Configure USART. */
if( ( xRxedChars != serINVALID_QUEUE ) &&
( xCharsForTx != serINVALID_QUEUE ) &&
( ulWantedBaud != ( unsigned portLONG ) 0 ) )
@@ -198,20 +194,20 @@ int cd; /* USART0 Clock Divider. */
portENTER_CRITICAL();
{
/**
- ** Reset USART0.
+ ** Reset USART.
**/
- /* Disable all USART0 interrupt sources to begin... */
- usart0->idr = 0xFFFFFFFF;
+ /* Disable all USART interrupt sources to begin... */
+ usart->idr = 0xFFFFFFFF;
/* Reset mode and other registers that could cause unpredictable
behaviour after reset */
- usart0->mr = 0; /* Reset Mode register. */
- usart0->rtor = 0; /* Reset Receiver Time-out register. */
- usart0->ttgr = 0; /* Reset Transmitter Timeguard register. */
+ usart->mr = 0; /* Reset Mode register. */
+ usart->rtor = 0; /* Reset Receiver Time-out register. */
+ usart->ttgr = 0; /* Reset Transmitter Timeguard register. */
/* Shutdown RX and TX, reset status bits, reset iterations in CSR, reset NACK
and turn off DTR and RTS */
- usart0->cr = AVR32_USART_CR_RSTRX_MASK |
+ usart->cr = AVR32_USART_CR_RSTRX_MASK |
AVR32_USART_CR_RSTTX_MASK |
AVR32_USART_CR_RXDIS_MASK |
AVR32_USART_CR_TXDIS_MASK |
@@ -222,13 +218,12 @@ int cd; /* USART0 Clock Divider. */
AVR32_USART_CR_RTSDIS_MASK;
/**
- ** Configure USART0.
+ ** Configure USART.
**/
- /* Enable USART0 RXD & TXD pins. */
- gpio_enable_module_pin(AVR32_USART0_RXD_0_PIN, AVR32_USART0_RXD_0_FUNCTION);
- gpio_enable_module_pin(AVR32_USART0_TXD_0_PIN, AVR32_USART0_TXD_0_FUNCTION);
+ /* Enable USART RXD & TXD pins. */
+ gpio_enable_module( USART_GPIO_MAP, sizeof( USART_GPIO_MAP ) / sizeof( USART_GPIO_MAP[0] ) );
- /* Set the USART0 baudrate to be as close as possible to the wanted baudrate. */
+ /* Set the USART baudrate to be as close as possible to the wanted baudrate. */
/*
* ** BAUDRATE CALCULATION **
*
@@ -242,52 +237,52 @@ int cd; /* USART0 Clock Divider. */
if( ulWantedBaud < ( configCPU_CLOCK_HZ / 16 ) )
{
/* Use 8x oversampling */
- usart0->mr |= (1<mr |= (1<brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
- }
- else
+ usart->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
+ }
+ else
{
/* Use 16x oversampling */
- usart0->mr &= ~(1<mr &= ~(1< 65535 )
+ if( cd > 65535 )
{
/* Baudrate is too low */
return serINVALID_COMPORT_HANDLER;
}
}
- usart0->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
+ usart->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
- /* Set the USART0 Mode register: Mode=Normal(0), Clk selection=MCK(0),
+ /* Set the USART Mode register: Mode=Normal(0), Clk selection=MCK(0),
CHRL=8, SYNC=0(asynchronous), PAR=None, NBSTOP=1, CHMODE=0, MSBF=0,
MODE9=0, CKLO=0, OVER(previously done when setting the baudrate),
other fields not used in this mode. */
- usart0->mr |= ((8-5) << AVR32_USART_MR_CHRL_OFFSET ) |
+ usart->mr |= ((8-5) << AVR32_USART_MR_CHRL_OFFSET ) |
( 4 << AVR32_USART_MR_PAR_OFFSET ) |
( 1 << AVR32_USART_MR_NBSTOP_OFFSET);
/* Write the Transmit Timeguard Register */
- usart0->ttgr = 0;
+ usart->ttgr = 0;
+
-
- /* Register the USART0 interrupt handler to the interrupt controller and
- enable the USART0 interrupt. */
- INTC_register_interrupt((__int_handler)&vUSART0_ISR, AVR32_USART0_IRQ, INT1);
+ /* Register the USART interrupt handler to the interrupt controller and
+ enable the USART interrupt. */
+ INTC_register_interrupt((__int_handler)&vUSART_ISR, serialPORT_USART_IRQ, INT1);
- /* Enable USART0 interrupt sources (but not Tx for now)... */
- usart0->ier = AVR32_USART_IER_RXRDY_MASK;
+ /* Enable USART interrupt sources (but not Tx for now)... */
+ usart->ier = AVR32_USART_IER_RXRDY_MASK;
/* Enable receiver and transmitter... */
- usart0->cr |= AVR32_USART_CR_TXEN_MASK | AVR32_USART_CR_RXEN_MASK;
+ usart->cr |= AVR32_USART_CR_TXEN_MASK | AVR32_USART_CR_RXEN_MASK;
}
portEXIT_CRITICAL();
}
@@ -340,7 +335,7 @@ signed portCHAR *pxNext;
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
-volatile avr32_usart_t *usart0 = &AVR32_USART0;
+volatile avr32_usart_t *usart = serialPORT_USART;
/* Place the character in the queue of characters to be transmitted. */
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
@@ -352,7 +347,7 @@ volatile avr32_usart_t *usart0 = &AVR32_USART0;
queue and send it. This does not need to be in a critical section as
if the interrupt has already removed the character the next interrupt
will simply turn off the Tx interrupt again. */
- usart0->ier = (1 << AVR32_USART_IER_TXRDY_OFFSET);
+ usart->ier = (1 << AVR32_USART_IER_TXRDY_OFFSET);
return pdPASS;
}
diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/Makefile b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/Makefile
index c529c5cca..55ee8bc9a 100644
--- a/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/Makefile
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/Makefile
@@ -13,12 +13,17 @@
# elf file.elf Link: create ELF output file from object files.
# lss file.lss Create extended listing from target output file.
# sym file.sym Create symbol table from target output file.
+# hex file.hex Create Intel HEX image from ELF output file.
# bin file.bin Create binary image from ELF output file.
# sizes Display target size information.
+# isp Use ISP instead of JTAGICE mkII when programming.
# cpuinfo Get CPU information.
# halt Stop CPU execution.
+# chiperase Perform a JTAG Chip Erase command.
+# erase Perform a flash chip erase.
# program Program MCU memory from ELF output file.
-# reset Reset CPU.
+# secureflash Protect chip by setting security bit.
+# reset Reset MCU.
# debug Open a debug connection with the MCU.
# run Start CPU execution.
# readregs Read CPU registers.
@@ -78,11 +83,13 @@ DPNDFILES = $(CSRCS:.c=.d) $(ASSRCS:.S=.d)
CPPFILES = $(CSRCS:.c=.i)
CC = avr32-gcc
-CFLAGS = $(DEBUG) $(OPTIMIZATION) $(C_EXTRA_FLAGS)
+CFLAGS = $(DEBUG) $(OPTIMIZATION) $(C_EXTRA_FLAGS) \
+ $(PLATFORM_INC_PATH:%=-Wa,-I%) $(INC_PATH:%=-Wa,-I%) $(AS_EXTRA_FLAGS)
ASFILES = $(CSRCS:.c=.x) $(ASSRCS:.S=.x)
AS = avr32-as
-ASFLAGS = $(DEBUG) $(AS_EXTRA_FLAGS)
+ASFLAGS = $(DEBUG) \
+ $(PLATFORM_INC_PATH:%=-Wa,-I%) $(INC_PATH:%=-Wa,-I%) $(AS_EXTRA_FLAGS)
OBJFILES = $(CSRCS:.c=.o) $(ASSRCS:.S=.o)
LD = avr32-ld
@@ -98,18 +105,20 @@ NM = avr32-nm
SYM = $(TGTFILE:$(TGTTYPE)=.sym)
OBJCOPY = avr32-objcopy
+HEX = $(TGTFILE:$(TGTTYPE)=.hex)
BIN = $(TGTFILE:$(TGTTYPE)=.bin)
SIZE = avr32-size
-SUDO = $(shell if [ -x /usr/bin/sudo ]; then echo sudo; fi)
-
SLEEP = sleep
SLEEPUSB = 9
PROGRAM = avr32program
-DBGPROXY = avr32gdbproxy
+ISP = batchisp
+ISPFLAGS = -device at32$(PART) -hardware usb -operation
+
+DBGPROXY = avr32gdbproxy
DOCGEN = doxygen
@@ -127,11 +136,15 @@ MSG_ARCHIVING = Archiving to \`$@\'.
MSG_LINKING = Linking to \`$@\'.
MSG_EXTENDED_LISTING = Creating extended listing to \`$@\'.
MSG_SYMBOL_TABLE = Creating symbol table to \`$@\'.
+MSG_IHEX_IMAGE = Creating Intel HEX image to \`$@\'.
MSG_BINARY_IMAGE = Creating binary image to \`$@\'.
MSG_GETTING_CPU_INFO = Getting CPU information.
MSG_HALTING = Stopping CPU execution.
-MSG_PROGRAMMING = Programming MCU memory from \`$<\'.
-MSG_RESETTING = Resetting CPU.
+MSG_ERASING_CHIP = Performing a JTAG Chip Erase command.
+MSG_ERASING = Performing a flash chip erase.
+MSG_PROGRAMMING = Programming MCU memory from \`$(TGTFILE)\'.
+MSG_SECURING_FLASH = Protecting chip by setting security bit.
+MSG_RESETTING = Resetting MCU.
MSG_DEBUGGING = Opening debug connection with MCU.
MSG_RUNNING = Starting CPU execution.
MSG_READING_CPU_REGS = Reading CPU registers.
@@ -151,11 +164,11 @@ include $(MAKECFG)
# Default goal: build the project.
ifeq ($(TGTTYPE),.a)
.PHONY: all
-all: ccversion a lss sym
+all: ccversion a lss sym sizes
else
ifeq ($(TGTTYPE),.elf)
.PHONY: all
-all: ccversion elf lss sym bin sizes
+all: ccversion elf lss sym hex bin sizes
else
$(error $(ERR_TARGET_TYPE))
endif
@@ -166,6 +179,7 @@ endif
clean:
@echo $(MSG_CLEANING)
-$(VERBOSE_CMD)$(RM) $(BIN)
+ -$(VERBOSE_CMD)$(RM) $(HEX)
-$(VERBOSE_CMD)$(RM) $(SYM)
-$(VERBOSE_CMD)$(RM) $(LSS)
-$(VERBOSE_CMD)$(RM) $(TGTFILE)
@@ -219,9 +233,15 @@ lss: $(LSS)
sym: $(SYM)
ifeq ($(TGTTYPE),.elf)
+
+# Create Intel HEX image from ELF output file.
+.PHONY: hex
+hex: $(HEX)
+
# Create binary image from ELF output file.
.PHONY: bin
bin: $(BIN)
+
endif
# Display target size information.
@@ -229,17 +249,37 @@ endif
sizes: $(TGTFILE)
@echo
@echo
+ifeq ($(TGTTYPE),.a)
+ @$(SIZE) -Bxt $<
+else
+ifeq ($(TGTTYPE),.elf)
@$(SIZE) -Ax $<
+ @$(SIZE) -Bx $<
+endif
+endif
+ @echo
+ @echo
ifeq ($(TGTTYPE),.elf)
+# Use ISP instead of JTAGICE mkII when programming.
+.PHONY: isp
+ifeq ($(filter-out isp verbose,$(MAKECMDGOALS)),)
+isp: all
+else
+isp:
+ @:
+endif
+
+ifeq ($(findstring isp,$(MAKECMDGOALS)),)
+
# Get CPU information.
.PHONY: cpuinfo
cpuinfo:
@echo
@echo $(MSG_GETTING_CPU_INFO)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB cpuinfo
-ifneq ($(call LastWord,$(filter cpuinfo program reset debug run readregs,$(MAKECMDGOALS))),cpuinfo)
+ $(VERBOSE_CMD)$(PROGRAM) cpuinfo
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),cpuinfo)
@$(SLEEP) $(SLEEPUSB)
else
@echo
@@ -248,45 +288,85 @@ endif
# Stop CPU execution.
.PHONY: halt
halt:
-ifeq ($(filter cpuinfo program reset run readregs,$(MAKECMDGOALS)),)
+ifeq ($(filter cpuinfo chiperase erase program secureflash reset run readregs,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_HALTING)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB halt
+ $(VERBOSE_CMD)$(PROGRAM) halt
ifneq ($(call LastWord,$(filter halt debug,$(MAKECMDGOALS))),halt)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
- @echo > /dev/null
+ @:
+endif
+
+# Perform a JTAG Chip Erase command.
+.PHONY: chiperase
+chiperase:
+ @echo
+ @echo $(MSG_ERASING_CHIP)
+ $(VERBOSE_CMD)$(PROGRAM) chiperase
+ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash reset debug run readregs,$(MAKECMDGOALS))),chiperase)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Perform a flash chip erase.
+.PHONY: erase
+erase:
+ifeq ($(filter chiperase program,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_ERASING)
+ $(VERBOSE_CMD)$(PROGRAM) erase $(FLASH:%=-f%)
+ifneq ($(call LastWord,$(filter cpuinfo erase secureflash reset debug run readregs,$(MAKECMDGOALS))),erase)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+else
+ @:
endif
# Program MCU memory from ELF output file.
.PHONY: program
-program: $(TGTFILE)
+program: all
@echo
@echo $(MSG_PROGRAMMING)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB program $(FLASH:%=-f%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $<
-ifneq ($(call LastWord,$(filter cpuinfo program debug readregs,$(MAKECMDGOALS))),program)
+ $(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TGTFILE)
+ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash debug readregs,$(MAKECMDGOALS))),program)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
-# Reset CPU.
+# Protect chip by setting security bit.
+.PHONY: secureflash
+secureflash:
+ @echo
+ @echo $(MSG_SECURING_FLASH)
+ $(VERBOSE_CMD)$(PROGRAM) secureflash
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),secureflash)
+ @$(SLEEP) $(SLEEPUSB)
+else
+ @echo
+endif
+
+# Reset MCU.
.PHONY: reset
reset:
ifeq ($(filter program run,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_RESETTING)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB reset
-ifneq ($(call LastWord,$(filter cpuinfo reset debug readregs,$(MAKECMDGOALS))),reset)
+ $(VERBOSE_CMD)$(PROGRAM) reset
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase secureflash reset debug readregs,$(MAKECMDGOALS))),reset)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
- @echo > /dev/null
+ @:
endif
# Open a debug connection with the MCU.
@@ -294,8 +374,8 @@ endif
debug:
@echo
@echo $(MSG_DEBUGGING)
- $(VERBOSE_CMD)$(SUDO) $(DBGPROXY) -cUSB $(patsubst cfi@%,-f%,$(FLASH:internal@%=-f%))
-ifneq ($(call LastWord,$(filter cpuinfo halt program reset debug run readregs,$(MAKECMDGOALS))),debug)
+ $(VERBOSE_CMD)$(DBGPROXY) $(FLASH:%=-f%)
+ifneq ($(call LastWord,$(filter cpuinfo halt chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),debug)
@$(SLEEP) $(SLEEPUSB)
else
@echo
@@ -307,14 +387,14 @@ run:
ifeq ($(findstring program,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_RUNNING)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB run $(if $(findstring reset,$(MAKECMDGOALS)),-R)
-ifneq ($(call LastWord,$(filter cpuinfo debug run readregs,$(MAKECMDGOALS))),run)
+ $(VERBOSE_CMD)$(PROGRAM) run $(if $(findstring reset,$(MAKECMDGOALS)),-R)
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase secureflash debug run readregs,$(MAKECMDGOALS))),run)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
- @echo > /dev/null
+ @:
endif
# Read CPU registers.
@@ -322,13 +402,80 @@ endif
readregs:
@echo
@echo $(MSG_READING_CPU_REGS)
- $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB readregs
-ifneq ($(call LastWord,$(filter cpuinfo program reset debug run readregs,$(MAKECMDGOALS))),readregs)
+ $(VERBOSE_CMD)$(PROGRAM) readregs
+ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),readregs)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
+else
+
+# Perform a flash chip erase.
+.PHONY: erase
+erase:
+ifeq ($(findstring program,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_ERASING)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck
+ifeq ($(call LastWord,$(filter erase secureflash debug run,$(MAKECMDGOALS))),erase)
+ @echo
+endif
+else
+ @:
+endif
+
+# Program MCU memory from ELF output file.
+.PHONY: program
+program: all
+ @echo
+ @echo $(MSG_PROGRAMMING)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TGTFILE) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
+ifeq ($(call LastWord,$(filter program secureflash debug,$(MAKECMDGOALS))),program)
+ @echo
+endif
+
+# Protect chip by setting security bit.
+.PHONY: secureflash
+secureflash:
+ @echo
+ @echo $(MSG_SECURING_FLASH)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) memory security addrange 0x0 0x0 fillbuffer 0x01 program $(if $(findstring run,$(MAKECMDGOALS)),start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0)
+ifeq ($(call LastWord,$(filter erase program secureflash debug,$(MAKECMDGOALS))),secureflash)
+ @echo
+endif
+
+# Reset MCU.
+.PHONY: reset
+reset:
+ @:
+
+# Open a debug connection with the MCU.
+.PHONY: debug
+debug:
+ @echo
+ @echo $(MSG_DEBUGGING)
+ $(VERBOSE_CMD)$(DBGPROXY) $(FLASH:%=-f%)
+ifeq ($(call LastWord,$(filter erase program secureflash debug run,$(MAKECMDGOALS))),debug)
+ @echo
+endif
+
+# Start CPU execution.
+.PHONY: run
+run:
+ifeq ($(filter program secureflash,$(MAKECMDGOALS)),)
+ @echo
+ @echo $(MSG_RUNNING)
+ $(VERBOSE_CMD)$(ISP) $(ISPFLAGS) start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0
+ifeq ($(call LastWord,$(filter erase debug run,$(MAKECMDGOALS))),run)
+ @echo
+endif
+else
+ @:
+endif
+
+endif
+
endif
# Build the documentation.
@@ -352,11 +499,11 @@ rebuilddoc: cleandoc doc
# Display main executed commands.
.PHONY: verbose
-ifeq ($(MAKECMDGOALS),verbose)
+ifeq ($(filter-out isp verbose,$(MAKECMDGOALS)),)
verbose: all
else
verbose:
- @echo > /dev/null
+ @:
endif
ifneq ($(findstring verbose,$(MAKECMDGOALS)),)
# Prefix displaying the following command if and only if verbose is a goal.
@@ -456,9 +603,17 @@ $(SYM): $(TGTFILE)
$(VERBOSE_NL)
ifeq ($(TGTTYPE),.elf)
+
+# Create Intel HEX image from ELF output file.
+$(HEX): $(TGTFILE)
+ @echo $(MSG_IHEX_IMAGE)
+ $(VERBOSE_CMD)$(OBJCOPY) -O ihex $< $@
+ $(VERBOSE_NL)
+
# Create binary image from ELF output file.
$(BIN): $(TGTFILE)
@echo $(MSG_BINARY_IMAGE)
$(VERBOSE_CMD)$(OBJCOPY) -O binary $< $@
$(VERBOSE_NL)
+
endif
diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/config.mk b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/config.mk
index a81384a24..bdc3331c0 100644
--- a/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/config.mk
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/config.mk
@@ -1,194 +1,198 @@
-# Hey Emacs, this is a -*- makefile -*-
-
-# The purpose of this file is to define the build configuration variables used
-# by the generic Makefile. See Makefile header for further information.
-
-# Copyright (c) 2007, Atmel Corporation All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-#
-# 1. Redistributions of source code must retain the above copyright notice, this
-# list of conditions and the following disclaimer.
-#
-# 2. Redistributions in binary form must reproduce the above copyright notice,
-# this list of conditions and the following disclaimer in the documentation and/
-# or other materials provided with the distribution.
-#
-# 3. The name of ATMEL may not be used to endorse or promote products derived
-# from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
-# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
-# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
-# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
-# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-
-# Base paths
-PRJ_PATH = ../..
-APPS_PATH = $(PRJ_PATH)/APPLICATIONS
-BRDS_PATH = $(PRJ_PATH)/BOARDS
-COMP_PATH = $(PRJ_PATH)/COMPONENTS
-DRVR_PATH = $(PRJ_PATH)/DRIVERS
-SERV_PATH = $(PRJ_PATH)/SERVICES
-UTIL_PATH = $(PRJ_PATH)/UTILS
-
-# Demo paths
-FREERTOS_PATH = ../../../..
-FREERTOS_PORT_PATH = $(FREERTOS_PATH)/Source/portable/GCC/AVR32_UC3
-FREERTOS_MEM_PATH = $(FREERTOS_PATH)/Source/portable/MemMang
-DEMO_PATH = ../..
-ETH_PATH = $(DEMO_PATH)/NETWORK
-WEB_PATH = $(ETH_PATH)/BasicWEB
-TFTP_PATH = $(ETH_PATH)/BasicTFTP
-SMTP_PATH = $(ETH_PATH)/BasicSMTP
-EMAC_PATH = $(ETH_PATH)/EMAC
-LWIP_PATH = $(FREERTOS_PATH)/Demo/Common/ethernet/lwIP
-LWIP_PORT_PATH = $(ETH_PATH)/lwip-port/AT32UC3A
-
-# CPU architecture: {ap|uc}
-ARCH = uc
-
-# Part: {none|ap7000|ap7010|ap7020|uc3a0256|uc3a0512|uc3a1128|uc3a1256|uc3a1512}
-PART = uc3a0512
-
-# Flash memories: [type@address,size]...
-FLASH = internal@0x80000000,512Kb
-
-# Device/Platform/Board include path
-PLATFORM_INC_PATH = \
- $(BRDS_PATH)/
-
-# Target name: {*.a|*.elf}
-TARGET = lwipdemo.elf
-
-# Definitions: [-D name[=definition]...] [-U name...]
-# Things that might be added to DEFS:
-# BOARD Board used: {EVK1100}
-DEFS = -D BOARD=EVK1100 -D FREERTOS_USED -D HTTP_USED=1 -D TFTP_USED=1 -D SMTP_USED=0
-
-# Include path
-INC_PATH = \
- $(UTIL_PATH)/ \
- $(UTIL_PATH)/PREPROCESSOR/ \
- $(DRVR_PATH)/INTC/ \
- $(DRVR_PATH)/TC/ \
- $(DRVR_PATH)/PM/ \
- $(DRVR_PATH)/GPIO/ \
- $(DRVR_PATH)/FLASHC/ \
- $(DEMO_PATH)/ \
- $(FREERTOS_PATH)/Source/include/ \
- $(FREERTOS_PATH)/Demo/Common/include/ \
- $(FREERTOS_PORT_PATH)/ \
- $(FREERTOS_MEM_PATH)/ \
- $(ETH_PATH)/ \
- $(EMAC_PATH)/ \
- $(LWIP_PATH)/include/ \
- $(LWIP_PATH)/include/ipv4/ \
- $(LWIP_PORT_PATH)/ \
- $(WEB_PATH)/ \
- $(TFTP_PATH)/ \
- $(SMTP_PATH)/
-
-# C source files
-
-LWIP_SRC = \
- $(LWIP_PATH)/core/inet.c \
- $(LWIP_PATH)/core/mem.c \
- $(LWIP_PATH)/core/memp.c \
- $(LWIP_PATH)/core/netif.c \
- $(LWIP_PATH)/core/pbuf.c \
- $(LWIP_PATH)/core/raw.c \
- $(LWIP_PATH)/core/stats.c \
- $(LWIP_PATH)/core/sys.c \
- $(LWIP_PATH)/core/tcp.c \
- $(LWIP_PATH)/core/tcp_in.c \
- $(LWIP_PATH)/core/tcp_out.c \
- $(LWIP_PATH)/core/ipv4/ip.c \
- $(LWIP_PATH)/core/ipv4/ip_addr.c \
- $(LWIP_PATH)/core/ipv4/icmp.c \
- $(LWIP_PATH)/api/sockets.c \
- $(LWIP_PATH)/api/tcpip.c \
- $(LWIP_PATH)/api/api_msg.c \
- $(LWIP_PATH)/api/err.c \
- $(LWIP_PATH)/api/api_lib.c \
- $(LWIP_PATH)/netif/etharp.c \
- $(LWIP_PATH)/core/udp.c \
- $(LWIP_PATH)/core/ipv4/ip_frag.c
-
-CSRCS = \
- $(BRDS_PATH)/EVK1100/led.c \
- $(DRVR_PATH)/INTC/intc.c \
- $(DRVR_PATH)/TC/tc.c \
- $(DRVR_PATH)/PM/pm.c \
- $(DRVR_PATH)/GPIO/gpio.c \
- $(DRVR_PATH)/FLASHC/flashc.c \
- $(DEMO_PATH)/main.c \
- $(DEMO_PATH)/PARTEST/ParTest.c \
- $(DEMO_PATH)/SERIAL/serial.c \
- $(FREERTOS_PATH)/Source/tasks.c \
- $(FREERTOS_PATH)/Source/queue.c \
- $(FREERTOS_PATH)/Source/list.c \
- $(FREERTOS_PATH)/Source/croutine.c \
- $(FREERTOS_PATH)/Demo/Common/Minimal/flash.c \
- $(FREERTOS_PORT_PATH)/port.c \
- $(FREERTOS_MEM_PATH)/heap_3.c \
- $(LWIP_SRC) \
- $(LWIP_PORT_PATH)/sys_arch.c \
- $(LWIP_PORT_PATH)/ethernetif.c \
- $(WEB_PATH)/BasicWEB.c \
- $(TFTP_PATH)/BasicTFTP.c \
- $(SMTP_PATH)/BasicSMTP.c \
- $(ETH_PATH)/ethernet.c \
- $(EMAC_PATH)/AVR32_EMAC.c \
- $(EMAC_PATH)/AVR32_EMAC_ISR.c \
- $(DEMO_PATH)/printf-stdarg.c
-
-# Assembler source files
-ASSRCS = \
- $(FREERTOS_PORT_PATH)/exception.S
-
-# Library path
-LIB_PATH =
-
-# Libraries to link with the project
-LIBS =
-
-# Linker script file if any
-LINKER_SCRIPT =
-
-# Options to request or suppress warnings: [-fsyntax-only] [-pedantic[-errors]] [-w] [-Wwarning...]
-# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
-WARNINGS = -Wall
-
-# Options for debugging: [-g]...
-# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
-DEBUG = -g
-
-# Options that control optimization: [-O[0|1|2|3|s]]...
-# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
-OPTIMIZATION = -O0 -ffunction-sections -fdata-sections
-
-# Extra flags to use when preprocessing
-CPP_EXTRA_FLAGS =
-
-# Extra flags to use when compiling
-C_EXTRA_FLAGS =
-
-# Extra flags to use when assembling
-AS_EXTRA_FLAGS =
-
-# Extra flags to use when linking
-LD_EXTRA_FLAGS = -Wl,--gc-sections
-
-# Documentation path
-DOC_PATH = ./DOC/
-
-# Documentation configuration file
-DOC_CFG = ./doxyfile.doxygen
+# Hey Emacs, this is a -*- makefile -*-
+
+# The purpose of this file is to define the build configuration variables used
+# by the generic Makefile. See Makefile header for further information.
+
+# Copyright (c) 2007, Atmel Corporation All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation and/
+# or other materials provided with the distribution.
+#
+# 3. The name of ATMEL may not be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+# Base paths
+PRJ_PATH = ../..
+APPS_PATH = $(PRJ_PATH)/APPLICATIONS
+BRDS_PATH = $(PRJ_PATH)/BOARDS
+COMP_PATH = $(PRJ_PATH)/COMPONENTS
+DRVR_PATH = $(PRJ_PATH)/DRIVERS
+SERV_PATH = $(PRJ_PATH)/SERVICES
+UTIL_PATH = $(PRJ_PATH)/UTILS
+
+# Demo paths
+FREERTOS_PATH = ../../../..
+FREERTOS_PORT_PATH = $(FREERTOS_PATH)/Source/portable/GCC/AVR32_UC3
+FREERTOS_MEM_PATH = $(FREERTOS_PATH)/Source/portable/MemMang
+DEMO_PATH = ../..
+ETH_PATH = $(DEMO_PATH)/NETWORK
+WEB_PATH = $(ETH_PATH)/BasicWEB
+TFTP_PATH = $(ETH_PATH)/BasicTFTP
+SMTP_PATH = $(ETH_PATH)/BasicSMTP
+LWIP_PATH = $(FREERTOS_PATH)/Demo/Common/ethernet/lwIP
+LWIP_PORT_PATH = $(ETH_PATH)/lwip-port/AT32UC3A
+
+# CPU architecture: {ap|uc}
+ARCH = uc
+
+# Part: {none|ap7xxx|uc3xxxxx}
+PART = uc3a0512
+
+# Flash memories: [{cfi|internal}@address,size]...
+FLASH = internal@0x80000000,512Kb
+
+# Clock source to use when programming: [{xtal|extclk|int}]
+PROG_CLOCK = xtal
+
+# Device/Platform/Board include path
+PLATFORM_INC_PATH = \
+ $(BRDS_PATH)/
+
+# Target name: {*.a|*.elf}
+TARGET = lwipdemo.elf
+
+# Definitions: [-D name[=definition]...] [-U name...]
+# Things that might be added to DEFS:
+# BOARD Board used: {EVKxxxx}
+# EXT_BOARD Extension board used (if any): {EXTxxxx}
+DEFS = -D BOARD=EVK1100 -D FREERTOS_USED -D HTTP_USED=1 -D TFTP_USED=1 -D SMTP_USED=0
+
+# Include path
+INC_PATH = \
+ $(UTIL_PATH)/ \
+ $(UTIL_PATH)/PREPROCESSOR/ \
+ $(SERV_PATH)/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/ \
+ $(DRVR_PATH)/INTC/ \
+ $(DRVR_PATH)/TC/ \
+ $(DRVR_PATH)/PM/ \
+ $(DRVR_PATH)/GPIO/ \
+ $(DRVR_PATH)/FLASHC/ \
+ $(DRVR_PATH)/MACB/ \
+ $(DEMO_PATH)/ \
+ $(FREERTOS_PATH)/Source/include/ \
+ $(FREERTOS_PATH)/Demo/Common/include/ \
+ $(FREERTOS_PORT_PATH)/ \
+ $(FREERTOS_MEM_PATH)/ \
+ $(ETH_PATH)/ \
+ $(LWIP_PATH)/include/ \
+ $(LWIP_PATH)/include/ipv4/ \
+ $(LWIP_PORT_PATH)/ \
+ $(WEB_PATH)/ \
+ $(TFTP_PATH)/ \
+ $(SMTP_PATH)/
+
+# C source files
+
+LWIP_SRC = \
+ $(LWIP_PATH)/core/inet.c \
+ $(LWIP_PATH)/core/mem.c \
+ $(LWIP_PATH)/core/memp.c \
+ $(LWIP_PATH)/core/netif.c \
+ $(LWIP_PATH)/core/pbuf.c \
+ $(LWIP_PATH)/core/raw.c \
+ $(LWIP_PATH)/core/stats.c \
+ $(LWIP_PATH)/core/sys.c \
+ $(LWIP_PATH)/core/tcp.c \
+ $(LWIP_PATH)/core/tcp_in.c \
+ $(LWIP_PATH)/core/tcp_out.c \
+ $(LWIP_PATH)/core/ipv4/ip.c \
+ $(LWIP_PATH)/core/ipv4/ip_addr.c \
+ $(LWIP_PATH)/core/ipv4/icmp.c \
+ $(LWIP_PATH)/api/sockets.c \
+ $(LWIP_PATH)/api/tcpip.c \
+ $(LWIP_PATH)/api/api_msg.c \
+ $(LWIP_PATH)/api/err.c \
+ $(LWIP_PATH)/api/api_lib.c \
+ $(LWIP_PATH)/netif/etharp.c \
+ $(LWIP_PATH)/core/udp.c \
+ $(LWIP_PATH)/core/ipv4/ip_frag.c
+
+CSRCS = \
+ $(BRDS_PATH)/EVK1100/led.c \
+ $(DRVR_PATH)/INTC/intc.c \
+ $(DRVR_PATH)/TC/tc.c \
+ $(DRVR_PATH)/PM/pm.c \
+ $(DRVR_PATH)/MACB/macb.c \
+ $(DRVR_PATH)/GPIO/gpio.c \
+ $(DRVR_PATH)/FLASHC/flashc.c \
+ $(DEMO_PATH)/main.c \
+ $(DEMO_PATH)/PARTEST/ParTest.c \
+ $(DEMO_PATH)/SERIAL/serial.c \
+ $(FREERTOS_PATH)/Source/tasks.c \
+ $(FREERTOS_PATH)/Source/queue.c \
+ $(FREERTOS_PATH)/Source/list.c \
+ $(FREERTOS_PATH)/Source/croutine.c \
+ $(FREERTOS_PATH)/Demo/Common/Minimal/flash.c \
+ $(FREERTOS_PORT_PATH)/port.c \
+ $(FREERTOS_MEM_PATH)/heap_3.c \
+ $(LWIP_SRC) \
+ $(LWIP_PORT_PATH)/sys_arch.c \
+ $(LWIP_PORT_PATH)/ethernetif.c \
+ $(WEB_PATH)/BasicWEB.c \
+ $(TFTP_PATH)/BasicTFTP.c \
+ $(SMTP_PATH)/BasicSMTP.c \
+ $(ETH_PATH)/ethernet.c \
+ $(DEMO_PATH)/printf-stdarg.c
+
+# Assembler source files
+ASSRCS = \
+ $(SERV_PATH)/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S \
+ $(FREERTOS_PORT_PATH)/exception.S
+
+# Library path
+LIB_PATH =
+
+# Libraries to link with the project
+LIBS =
+
+# Linker script file if any
+LINKER_SCRIPT = $(UTIL_PATH)/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds
+
+# Options to request or suppress warnings: [-fsyntax-only] [-pedantic[-errors]] [-w] [-Wwarning...]
+# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
+WARNINGS = -Wall
+
+# Options for debugging: [-g]...
+# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
+DEBUG = -g
+
+# Options that control optimization: [-O[0|1|2|3|s]]...
+# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
+OPTIMIZATION = -O0 -ffunction-sections -fdata-sections
+
+# Extra flags to use when preprocessing
+CPP_EXTRA_FLAGS =
+
+# Extra flags to use when compiling
+C_EXTRA_FLAGS =
+
+# Extra flags to use when assembling
+AS_EXTRA_FLAGS =
+
+# Extra flags to use when linking
+LD_EXTRA_FLAGS = -Wl,--gc-sections -Wl,-e,_trampoline
+
+# Documentation path
+DOC_PATH = ./DOC/
+
+# Documentation configuration file
+DOC_CFG = ./doxyfile.doxygen
diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/gdb_cmdfile.txt b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/gdb_cmdfile.txt
new file mode 100644
index 000000000..832686600
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/gdb_cmdfile.txt
@@ -0,0 +1,8 @@
+target extended-remote 127.0.0.1:4711
+symbol uc3a0512-demo.elf
+
+
+define current_task
+printf "Task name: %s\n", ((tskTCB *)pxCurrentTCB)->pcTaskName
+printf "pxTopOfStack: %x\n", ((tskTCB *)pxCurrentTCB)->pxTopOfStack
+end
diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewd b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewd
new file mode 100644
index 000000000..8ef76f6cf
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewd
@@ -0,0 +1,190 @@
+
+
+
+ 1
+
+ Debug
+
+ AVR32
+
+ 1
+
+ C-SPY
+ 2
+
+ 0
+ 1
+ 1
+
+ CMandatory
+ 1
+
+
+ CInput
+ 1
+
+
+ CCore
+ 0
+
+
+ CRunToEnable
+ 1
+
+
+ CRunToName
+ main
+
+
+ CMacOverride
+ 0
+
+
+ CMacFile
+
+
+
+ DynDriver
+ JTAGICEMKIIAVR32
+
+
+ DDFOverride
+ 0
+
+
+ DDFFile
+ $TOOLKIT_DIR$\config\iouc3a0512.ddf
+
+
+ DebuggerUseUbrofResetVector
+ 0
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+
+
+ JTAGICEMKIIAVR32
+ 3
+
+ 1
+ 1
+ 1
+
+ CJtagIceMkIIMandatory
+ 1
+
+
+ CJtagIceMkIIPeripherals
+ 0
+
+
+ CJtagIceMkIIReset
+ 0
+
+
+ CJtagIceMkIISWBreakpoints
+ 0
+
+
+ CJtagIceMkIISuppressDownload
+ 0
+
+
+ CJtagIceMkIIVerifyDownload
+ 0
+
+
+ CJTagIceMkIICommunicationLogging
+ 0
+
+
+ CJtagIceMkIICommLogFile
+
+
+
+ CJtagIceMkIIConnectionRage
+ 0
+ 2
+
+
+ CJtagIceMkIIConnectionPort
+ 0
+ 0
+
+
+ CJtagIceMkIIJtagFrequence
+ 0
+ 8
+
+
+ CJtagIceMkIIDaisyChain
+ 0
+
+
+ CJtagIceMkIIDaisyChainBeforeDevices
+ 0
+
+
+ CJtagIceMkIIDaisyChainBeforeBits
+ 0
+
+
+ CJtagIceMkIIDaisyChainAfterDevices
+ 0
+
+
+ CJtagIceMkIIDaisyChainAfterBits
+ 0
+
+
+ FlashLoaders
+
+
+
+ UseFlashLoader
+ 0
+
+
+
+
+ SIMAVR32
+ 2
+
+ 0
+ 1
+ 1
+
+ CSimMandatory
+ 1
+
+
+
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin
+ 1
+
+
+
+
+
+
diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewp b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewp
new file mode 100644
index 000000000..e6f90dd08
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.ewp
@@ -0,0 +1,1002 @@
+
+
+
+ 1
+
+ Debug
+
+ AVR32
+
+ 1
+
+ General
+ 2
+
+ 0
+ 1
+ 1
+
+ ProcessorCoreDyn
+ at32uc3a0512
+
+
+ ProcessorCoreSlave
+ at32uc3a0512
+
+
+ CodeModel
+ 1
+
+
+ DataModel
+ 1
+
+
+ EnableSimdInstructions
+ 0
+
+
+ EnableDspInstructions
+ 1
+
+
+ EnableRmwInstructions
+ 1
+
+
+ GAllowUnaligned
+ 0
+
+
+ GOutputBinary
+ 0
+
+
+ ExePath
+ Debug\Exe
+
+
+ ObjPath
+ Debug\Obj
+
+
+ ListPath
+ Debug\List
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/EC++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ RTLibraryPath
+ $TOOLKIT_DIR$\lib\dlavr32allaf.r82
+
+
+ RTConfigPath
+ $TOOLKIT_DIR$\lib\dlavr32allaf.h
+
+
+ Input variant
+ 0
+ 1
+
+
+ Input description
+ No specifier n, no float.
+
+
+ Output variant
+ 0
+ 1
+
+
+ Output description
+ No specifier a or A.
+
+
+ GUnhandledInterrupts
+ 0
+
+
+ GUnhandledExceptions
+ 0
+
+
+ GEnableTrace
+ 0
+
+
+ GTraceBufferSize
+ 0
+ 0
+
+
+ GSStackSize
+ 0x1000
+
+
+ GCStackSize
+ 0x1000
+
+
+ GHeapSize
+ 0x7000
+
+
+ GeneralMisraRules
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+
+
+ ICCAVR32
+ 3
+
+ 5
+ 1
+ 1
+
+ CCDefines
+ BOARD=EVK1100
+ HTTP_USED=1
+ SMTP_USED=0
+ TFTP_USED=1
+ FREERTOS_USED=1
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+ Pe191, Pa082, Pe236, Pe171
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCCore
+ 0
+
+
+ CCCodeModel
+ 0
+
+
+ CCDataModel
+ 0
+
+
+ CCObjPrefix
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCMultibyteSupport
+ 0
+
+
+ CCMigrationPreprocExtentions
+ 0
+
+
+ CCExt
+ 0
+
+
+ CCCharIs
+ 1
+
+
+ CCAllowList
+ 0
+ 0000000
+
+
+ CCObjUseModuleName
+ 0
+
+
+ CCObjModuleName
+
+
+
+ CCDebugInfo
+ 1
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ OutputFile
+ $FILE_BNAME$.r82
+
+
+ CCLangSelect
+ 0
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraRules
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$\..\..\UTILS\
+ $PROJ_DIR$\..\..\UTILS\PREPROCESSOR\
+ $PROJ_DIR$\..\..\BOARDS\
+ $PROJ_DIR$\..\..\DRIVERS\INTC\
+ $PROJ_DIR$\..\..\DRIVERS\TC\
+ $PROJ_DIR$\..\..\DRIVERS\USART\
+ $PROJ_DIR$\..\..\DRIVERS\PM\
+ $PROJ_DIR$\..\..\DRIVERS\MACB\
+ $PROJ_DIR$\..\..\DRIVERS\GPIO\
+ $PROJ_DIR$\..\..\DRIVERS\FLASHC\
+ $PROJ_DIR$\..\..\..\..\Source\include\
+ $PROJ_DIR$\..\..\..\Common\include\
+ $PROJ_DIR$\..\..\NETWORK\
+ $PROJ_DIR$\..\..\NETWORK\BasicWEB\
+ $PROJ_DIR$\..\..\NETWORK\BasicSMTP\
+ $PROJ_DIR$\..\..\NETWORK\BasicTFTP\
+ $PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\
+ $PROJ_DIR$\..\..\NETWORK\lwip-port\AT32UC3A\IAR\
+ $PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\
+ $PROJ_DIR$\..\..\..\Common\ethernet\lwIP\include\ipv4\
+ $PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\
+ $PROJ_DIR$\..\..\
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCStdIncludePath
+ $TOOLKIT_DIR$\INC\
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCModuleTypeOverride
+ 0
+
+
+ CCModuleType
+ 0
+
+
+ CCOptLevel
+ 0
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 0
+
+
+
+
+ AAVR32
+ 2
+
+ 0
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ ACore
+ 0
+
+
+ AEnableRemarks
+ 0
+
+
+ ADiagSuppress
+
+
+
+ ADiagRemark
+
+
+
+ ADiagWarning
+
+
+
+ ADiagError
+
+
+
+ ADiagWarnAreErr
+ 0
+
+
+ APreprocFile
+ 0
+
+
+ APreprocComments
+ 0
+
+
+ APreprocLine
+ 0
+
+
+ ADefines
+
+
+
+ AIncludePaths
+ $PROJ_DIR$\..\..\UTILS\
+ $PROJ_DIR$\..\..\UTILS\PREPROCESSOR\
+ $PROJ_DIR$\..\..\DRIVERS\INTC\
+
+
+ AListFile
+ 0
+
+
+ ACrossReference
+ 0
+
+
+ AMacDefs
+ 0
+
+
+ AMacExps
+ 0
+
+
+ AOnlyAsmed
+ 0
+
+
+ ANoDiagnostics
+ 0
+
+
+ AListOptions
+ 0
+
+
+ AMnemonicFirst
+ 0
+
+
+ ADirectiveFirst
+ 0
+
+
+ ACaseSensitivity
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diff --git a/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.eww b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.eww
new file mode 100644
index 000000000..125e9e5d0
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/AT32UC3A/IAR/lwipdemo.eww
@@ -0,0 +1,10 @@
+
+
+
+
+ $WS_DIR$\lwipdemo.ewp
+
+
+
+
+
diff --git a/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/evk1100.h b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/evk1100.h
index bec0ecd3f..2905fff22 100644
--- a/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/evk1100.h
+++ b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/evk1100.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -13,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -64,7 +62,7 @@
// part.
//#define FRCOSC 115200 //!< RCOsc frequency: Hz.
-#define FOSC32 32000 //!< Osc32 frequency: Hz.
+#define FOSC32 32768 //!< Osc32 frequency: Hz.
#define OSC32_STARTUP 3 //!< Osc32 startup time: RCOsc periods.
#define FOSC0 12000000 //!< Osc0 frequency: Hz.
@@ -117,6 +115,13 @@
# define USB_VBOF_ACTIVE_LEVEL LOW
#endif
+//! USB overcurrent detection pin.
+#ifdef EVK1100_REVA
+# define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PB18
+#else
+# define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PX33
+#endif
+
//! @}
@@ -278,7 +283,7 @@
*/
//! @{
#define DIP204_BACKLIGHT_PIN AVR32_PIN_PB18
-#define DIP204_PWM_CHANNEL AVR32_PWM_CHID6
+#define DIP204_PWM_CHANNEL 6
#define DIP204_PWM_PIN AVR32_PWM_PWM_6_PIN
#define DIP204_PWM_FUNCTION AVR32_PWM_PWM_6_FUNCTION
//! @}
@@ -299,9 +304,11 @@
//! @}
-/*! \name SPI Connections of the SD/MMC Connector
+/*! \name GPIO and SPI Connections of the SD/MMC Connector
*/
//! @{
+#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02
+#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA07
#define SD_MMC_SPI (&AVR32_SPI1)
#define SD_MMC_SPI_CS 1
#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN
diff --git a/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/led.c b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/led.c
index 550b0c028..9f0952bc9 100644
--- a/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/led.c
+++ b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/led.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -13,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -45,14 +43,7 @@
*/
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "preprocessor.h"
#include "compiler.h"
#include "evk1100.h"
@@ -89,7 +80,7 @@ static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =
//! Saved state of all LEDs.
-static U32 LED_State = (1 << LED_COUNT) - 1;
+static volatile U32 LED_State = (1 << LED_COUNT) - 1;
U32 LED_Read_Display(void)
diff --git a/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/led.h b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/led.h
index 3b3afd808..aa26a0af1 100644
--- a/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/led.h
+++ b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1100/led.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -13,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/BOARDS/EVK1101/evk1101.h b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1101/evk1101.h
new file mode 100644
index 000000000..87291f54f
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1101/evk1101.h
@@ -0,0 +1,239 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AT32UC3B EVK1101 board header file.
+ *
+ * This file contains definitions and services related to the features of the
+ * EVK1101 board.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 AT32UC3B devices can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef _EVK1101_H_
+#define _EVK1101_H_
+
+#include "compiler.h"
+
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
+# include "led.h"
+#endif // __AVR32_ABI_COMPILER__
+
+
+/*! \name Oscillator Definitions
+ */
+//! @{
+
+// RCOsc has no custom calibration by default. Set the following definition to
+// the appropriate value if a custom RCOsc calibration has been applied to your
+// part.
+//#define FRCOSC 115200 //!< RCOsc frequency: Hz.
+
+#define FOSC32 32768 //!< Osc32 frequency: Hz.
+#define OSC32_STARTUP 3 //!< Osc32 startup time: RCOsc periods.
+
+#define FOSC0 12000000 //!< Osc0 frequency: Hz.
+#define OSC0_STARTUP 3 //!< Osc0 startup time: RCOsc periods.
+
+// Osc1 crystal is not mounted by default. Set the following definitions to the
+// appropriate values if a custom Osc1 crystal is mounted on your board.
+//#define FOSC1 12000000 //!< Osc1 frequency: Hz.
+//#define OSC1_STARTUP 3 //!< Osc1 startup time: RCOsc periods.
+
+//! @}
+
+
+/*! \name USB Definitions
+ */
+//! @{
+
+//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x.
+//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and
+//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from .
+#define USB_ID AVR32_USBB_USB_ID_0_0
+
+//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x.
+//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and
+//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from .
+#define USB_VBOF AVR32_USBB_USB_VBOF_0_0
+
+//! Active level of the USB_VBOF output pin.
+#define USB_VBOF_ACTIVE_LEVEL LOW
+
+//! USB overcurrent detection pin.
+#define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PA20
+
+//! @}
+
+
+//! Number of LEDs.
+#define LED_COUNT 4
+
+/*! \name GPIO Connections of LEDs
+ */
+//! @{
+#define LED0_GPIO AVR32_PIN_PA07
+#define LED1_GPIO AVR32_PIN_PA08
+#define LED2_GPIO AVR32_PIN_PA21
+#define LED3_GPIO AVR32_PIN_PA22
+//! @}
+
+/*! \name PWM Channels of LEDs
+ */
+//! @{
+#define LED0_PWM 0
+#define LED1_PWM 1
+#define LED2_PWM 2
+#define LED3_PWM 6
+//! @}
+
+/*! \name PWM Functions of LEDs
+ */
+//! @{
+#define LED0_PWM_FUNCTION AVR32_PWM_PWM_0_0_FUNCTION
+#define LED1_PWM_FUNCTION AVR32_PWM_PWM_1_0_FUNCTION
+#define LED2_PWM_FUNCTION AVR32_PWM_PWM_2_0_FUNCTION
+#define LED3_PWM_FUNCTION AVR32_PWM_PWM_6_0_FUNCTION
+//! @}
+
+/*! \name Color Identifiers of LEDs to Use with LED Functions
+ */
+//! @{
+#define LED_MONO0_GREEN LED0
+#define LED_MONO1_GREEN LED1
+#define LED_MONO2_GREEN LED2
+#define LED_MONO3_GREEN LED3
+//! @}
+
+
+/*! \name GPIO Connections of Push Buttons
+ */
+//! @{
+#define GPIO_PUSH_BUTTON_0 AVR32_PIN_PB02
+#define GPIO_PUSH_BUTTON_1 AVR32_PIN_PB03
+//! @}
+
+
+/*! \name GPIO Connections of the Joystick
+ */
+//! @{
+#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA13
+#define GPIO_JOYSTICK_LEFT AVR32_PIN_PB06
+#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PB09
+#define GPIO_JOYSTICK_UP AVR32_PIN_PB07
+#define GPIO_JOYSTICK_DOWN AVR32_PIN_PB08
+//! @}
+
+
+/*! \name ADC Connection of the Temperature Sensor
+ */
+//! @{
+#define ADC_TEMPERATURE_CHANNEL 7
+#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_7_PIN
+#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_7_FUNCTION
+//! @}
+
+
+/*! \name ADC Connection of the Light Sensor
+ */
+//! @{
+#define ADC_LIGHT_CHANNEL 6
+#define ADC_LIGHT_PIN AVR32_ADC_AD_6_PIN
+#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_6_FUNCTION
+//! @}
+
+
+/*! \name ADC Connections of the Accelerometer
+ */
+//! @{
+#define ADC_ACC_X_CHANNEL 1
+#define ADC_ACC_X_PIN AVR32_ADC_AD_1_PIN
+#define ADC_ACC_X_FUNCTION AVR32_ADC_AD_1_FUNCTION
+#define ADC_ACC_Y_CHANNEL 2
+#define ADC_ACC_Y_PIN AVR32_ADC_AD_2_PIN
+#define ADC_ACC_Y_FUNCTION AVR32_ADC_AD_2_FUNCTION
+#define ADC_ACC_Z_CHANNEL 3
+#define ADC_ACC_Z_PIN AVR32_ADC_AD_3_PIN
+#define ADC_ACC_Z_FUNCTION AVR32_ADC_AD_3_FUNCTION
+//! @}
+
+
+/*! \name PWM Connections of Audio
+ */
+//! @{
+#define AUDIO_LOW_PWM_CHANNEL 5
+#define AUDIO_LOW_PWM_PIN AVR32_PWM_PWM_5_0_PIN
+#define AUDIO_LOW_PWM_FUNCTION AVR32_PWM_PWM_5_0_FUNCTION
+#define AUDIO_HIGH_PWM_CHANNEL 6
+#define AUDIO_HIGH_PWM_PIN AVR32_PWM_PWM_6_1_PIN
+#define AUDIO_HIGH_PWM_FUNCTION AVR32_PWM_PWM_6_1_FUNCTION
+//! @}
+
+
+/*! \name SPI Connections of the AT45DBX Data Flash Memory
+ */
+//! @{
+#define AT45DBX_SPI (&AVR32_SPI)
+#define AT45DBX_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN
+#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION
+#define AT45DBX_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN
+#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION
+#define AT45DBX_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN
+#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION
+#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI_NPCS_0_0_PIN
+#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI_NPCS_0_0_FUNCTION
+//! @}
+
+
+/*! \name GPIO and SPI Connections of the SD/MMC Connector
+ */
+//! @{
+#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PB00
+#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PB01
+#define SD_MMC_SPI (&AVR32_SPI)
+#define SD_MMC_SPI_CS 1
+#define SD_MMC_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN
+#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION
+#define SD_MMC_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN
+#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION
+#define SD_MMC_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN
+#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION
+#define SD_MMC_SPI_NPCS_PIN AVR32_SPI_NPCS_1_0_PIN
+#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI_NPCS_1_0_FUNCTION
+//! @}
+
+
+#endif // _EVK1101_H_
diff --git a/Demo/lwIP_AVR32_UC3/BOARDS/EVK1101/led.c b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1101/led.c
new file mode 100644
index 000000000..70705769b
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1101/led.c
@@ -0,0 +1,305 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AT32UC3B EVK1101 board LEDs support package.
+ *
+ * This file contains definitions and services related to the LED features of
+ * the EVK1101 board.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 AT32UC3B devices can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include
+#include "preprocessor.h"
+#include "compiler.h"
+#include "evk1101.h"
+#include "led.h"
+
+
+//! Structure describing LED hardware connections.
+typedef const struct
+{
+ struct
+ {
+ U32 PORT; //!< LED GPIO port.
+ U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port.
+ } GPIO; //!< LED GPIO descriptor.
+ struct
+ {
+ S32 CHANNEL; //!< LED PWM channel (< 0 if N/A).
+ S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A).
+ } PWM; //!< LED PWM descriptor.
+} tLED_DESCRIPTOR;
+
+
+//! Hardware descriptors of all LEDs.
+static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =
+{
+#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \
+ { \
+ {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\
+ {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \
+ },
+ MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~)
+#undef INSERT_LED_DESCRIPTOR
+};
+
+
+//! Saved state of all LEDs.
+static volatile U32 LED_State = (1 << LED_COUNT) - 1;
+
+
+U32 LED_Read_Display(void)
+{
+ return LED_State;
+}
+
+
+void LED_Display(U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor;
+ volatile avr32_gpio_port_t *led_gpio_port;
+
+ leds &= (1 << LED_COUNT) - 1;
+ LED_State = leds;
+ for (led_descriptor = &LED_DESCRIPTOR[0];
+ led_descriptor < LED_DESCRIPTOR + LED_COUNT;
+ led_descriptor++)
+ {
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ if (leds & 1)
+ {
+ led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
+ }
+ else
+ {
+ led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
+ }
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= 1;
+ }
+}
+
+
+U32 LED_Read_Display_Mask(U32 mask)
+{
+ return Rd_bits(LED_State, mask);
+}
+
+
+void LED_Display_Mask(U32 mask, U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ mask &= (1 << LED_COUNT) - 1;
+ Wr_bits(LED_State, mask, leds);
+ while (mask)
+ {
+ led_shift = 1 + ctz(mask);
+ led_descriptor += led_shift;
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ leds >>= led_shift - 1;
+ if (leds & 1)
+ {
+ led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
+ }
+ else
+ {
+ led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
+ }
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= 1;
+ mask >>= led_shift;
+ }
+}
+
+
+Bool LED_Test(U32 leds)
+{
+ return Tst_bits(LED_State, leds);
+}
+
+
+void LED_Off(U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ leds &= (1 << LED_COUNT) - 1;
+ Clr_bits(LED_State, leds);
+ while (leds)
+ {
+ led_shift = 1 + ctz(leds);
+ led_descriptor += led_shift;
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= led_shift;
+ }
+}
+
+
+void LED_On(U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ leds &= (1 << LED_COUNT) - 1;
+ Set_bits(LED_State, leds);
+ while (leds)
+ {
+ led_shift = 1 + ctz(leds);
+ led_descriptor += led_shift;
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= led_shift;
+ }
+}
+
+
+void LED_Toggle(U32 leds)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ leds &= (1 << LED_COUNT) - 1;
+ Tgl_bits(LED_State, leds);
+ while (leds)
+ {
+ led_shift = 1 + ctz(leds);
+ led_descriptor += led_shift;
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
+ led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
+ leds >>= led_shift;
+ }
+}
+
+
+U32 LED_Read_Display_Field(U32 field)
+{
+ return Rd_bitfield(LED_State, field);
+}
+
+
+void LED_Display_Field(U32 field, U32 leds)
+{
+ LED_Display_Mask(field, leds << ctz(field));
+}
+
+
+U8 LED_Get_Intensity(U32 led)
+{
+ tLED_DESCRIPTOR *led_descriptor;
+
+ // Check that the argument value is valid.
+ led = ctz(led);
+ led_descriptor = &LED_DESCRIPTOR[led];
+ if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0;
+
+ // Return the duty cycle value if the LED PWM channel is enabled, else 0.
+ return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ?
+ AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0;
+}
+
+
+void LED_Set_Intensity(U32 leds, U8 intensity)
+{
+ tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
+ volatile avr32_pwm_channel_t *led_pwm_channel;
+ volatile avr32_gpio_port_t *led_gpio_port;
+ U8 led_shift;
+
+ // For each specified LED...
+ for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift)
+ {
+ // Select the next specified LED and check that it has a PWM channel.
+ led_shift = 1 + ctz(leds);
+ led_descriptor += led_shift;
+ if (led_descriptor->PWM.CHANNEL < 0) continue;
+
+ // Initialize or update the LED PWM channel.
+ led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL];
+ if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)))
+ {
+ led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) &
+ ~(AVR32_PWM_CALG_MASK |
+ AVR32_PWM_CPOL_MASK |
+ AVR32_PWM_CPD_MASK);
+ led_pwm_channel->cprd = 0x000000FF;
+ led_pwm_channel->cdty = intensity;
+ AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL;
+ }
+ else
+ {
+ AVR32_PWM.isr;
+ while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL)));
+ led_pwm_channel->cupd = intensity;
+ }
+
+ // Switch the LED pin to its PWM function.
+ led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
+ if (led_descriptor->PWM.FUNCTION & 0x1)
+ {
+ led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK;
+ }
+ else
+ {
+ led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK;
+ }
+ if (led_descriptor->PWM.FUNCTION & 0x2)
+ {
+ led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK;
+ }
+ else
+ {
+ led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK;
+ }
+ led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK;
+ }
+}
diff --git a/Demo/lwIP_AVR32_UC3/BOARDS/EVK1101/led.h b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1101/led.h
new file mode 100644
index 000000000..bf8948712
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/BOARDS/EVK1101/led.h
@@ -0,0 +1,182 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AT32UC3B EVK1101 board LEDs support package.
+ *
+ * This file contains definitions and services related to the LED features of
+ * the EVK1101 board.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 AT32UC3B devices can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef _LED_H_
+#define _LED_H_
+
+#include "compiler.h"
+
+
+/*! \name Identifiers of LEDs to Use with LED Functions
+ */
+//! @{
+#define LED0 0x01
+#define LED1 0x02
+#define LED2 0x04
+#define LED3 0x08
+//! @}
+
+
+/*! \brief Gets the last state of all LEDs set through the LED API.
+ *
+ * \return State of all LEDs (1 bit per LED).
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern U32 LED_Read_Display(void);
+
+/*! \brief Sets the state of all LEDs.
+ *
+ * \param leds New state of all LEDs (1 bit per LED).
+ *
+ * \note The pins of all LEDs are set to GPIO output mode.
+ */
+extern void LED_Display(U32 leds);
+
+/*! \brief Gets the last state of the specified LEDs set through the LED API.
+ *
+ * \param mask LEDs of which to get the state (1 bit per LED).
+ *
+ * \return State of the specified LEDs (1 bit per LED).
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern U32 LED_Read_Display_Mask(U32 mask);
+
+/*! \brief Sets the state of the specified LEDs.
+ *
+ * \param mask LEDs of which to set the state (1 bit per LED).
+ *
+ * \param leds New state of the specified LEDs (1 bit per LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_Display_Mask(U32 mask, U32 leds);
+
+/*! \brief Tests the last state of the specified LEDs set through the LED API.
+ *
+ * \param leds LEDs of which to test the state (1 bit per LED).
+ *
+ * \return \c TRUE if at least one of the specified LEDs has a state on, else
+ * \c FALSE.
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern Bool LED_Test(U32 leds);
+
+/*! \brief Turns off the specified LEDs.
+ *
+ * \param leds LEDs to turn off (1 bit per LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_Off(U32 leds);
+
+/*! \brief Turns on the specified LEDs.
+ *
+ * \param leds LEDs to turn on (1 bit per LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_On(U32 leds);
+
+/*! \brief Toggles the specified LEDs.
+ *
+ * \param leds LEDs to toggle (1 bit per LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_Toggle(U32 leds);
+
+/*! \brief Gets as a bit-field the last state of the specified LEDs set through
+ * the LED API.
+ *
+ * \param field LEDs of which to get the state (1 bit per LED).
+ *
+ * \return State of the specified LEDs (1 bit per LED, beginning with the first
+ * specified LED).
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern U32 LED_Read_Display_Field(U32 field);
+
+/*! \brief Sets as a bit-field the state of the specified LEDs.
+ *
+ * \param field LEDs of which to set the state (1 bit per LED).
+ * \param leds New state of the specified LEDs (1 bit per LED, beginning with
+ * the first specified LED).
+ *
+ * \note The pins of the specified LEDs are set to GPIO output mode.
+ */
+extern void LED_Display_Field(U32 field, U32 leds);
+
+/*! \brief Gets the intensity of the specified LED.
+ *
+ * \param led LED of which to get the intensity (1 bit per LED; only the least
+ * significant set bit is used).
+ *
+ * \return Intensity of the specified LED (0x00 to 0xFF).
+ *
+ * \warning The PWM channel of the specified LED is supposed to be used only by
+ * this module.
+ *
+ * \note The GPIO pin configuration of all LEDs is left unchanged.
+ */
+extern U8 LED_Get_Intensity(U32 led);
+
+/*! \brief Sets the intensity of the specified LEDs.
+ *
+ * \param leds LEDs of which to set the intensity (1 bit per LED).
+ * \param intensity New intensity of the specified LEDs (0x00 to 0xFF).
+ *
+ * \warning The PWM channels of the specified LEDs are supposed to be used only
+ * by this module.
+ *
+ * \note The pins of the specified LEDs are set to PWM output mode.
+ */
+extern void LED_Set_Intensity(U32 leds, U8 intensity);
+
+
+#endif // _LED_H_
diff --git a/Demo/lwIP_AVR32_UC3/BOARDS/board.h b/Demo/lwIP_AVR32_UC3/BOARDS/board.h
index 36484edcc..346165ef6 100644
--- a/Demo/lwIP_AVR32_UC3/BOARDS/board.h
+++ b/Demo/lwIP_AVR32_UC3/BOARDS/board.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -13,7 +11,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -48,22 +46,33 @@
#ifndef _BOARD_H_
#define _BOARD_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__ || __AAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
+#include
+/*! \name Base Boards
+ */
+//! @{
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
+#define EVK1101 2 //!< AT32UC3B EVK1101 board.
+//! @}
+
+/*! \name Extension Boards
+ */
+//! @{
+#define EXT1102 1 //!< AT32UC3B EXT1102 board.
+//! @}
#if BOARD == EVK1100
# include "EVK1100/evk1100.h"
+#elif BOARD == EVK1101
+# include "EVK1101/evk1101.h"
#else
# error No known AVR32 board defined
#endif
+#if EXT_BOARD == EXT1102
+# include "EXT1102/ext1102.h"
+#endif
+
#ifndef FRCOSC
# define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency.
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.c b/Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.c
index 5b5d0c57e..f9a2c6ec1 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.c
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.c
@@ -1,20 +1,18 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
- * \brief Flash Controller driver.
+ * \brief FLASHC driver for AVR32 UC3.
*
- * This file defines a useful set of functions for the flash controller
- * on AVR32A devices.
+ * AVR32 Flash Controller driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices: All AVR32A devices.
+ * - Supported devices: All AVR32 devices with a FLASHC module can be used.
+ * - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
- *****************************************************************************/
+ ******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
@@ -44,240 +42,1054 @@
*/
+#include
+#include
+#include "compiler.h"
#include "flashc.h"
-/*! Flash command key*/
-#define X_KEY 0xA5000000
-
-/*! Get locke error.
- * \warning: Flash status register (FCR) is read, and Programmming error status may be automatically
- * cleared when reading FCR.
+/*! \name FLASHC Writable Bit-Field Registers
*/
-#define Flashc_get_lockerror() ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCKE_MASK)>>AVR32_FLASHC_FSR_LOCKE_OFFSET)
+//! @{
+
+typedef union
+{
+ unsigned long fcr;
+ avr32_flashc_fcr_t FCR;
+} u_avr32_flashc_fcr_t;
+
+typedef union
+{
+ unsigned long fcmd;
+ avr32_flashc_fcmd_t FCMD;
+} u_avr32_flashc_fcmd_t;
-/*! Get programming error.
- * \warning: Flash status register (FCR) is read, and locke error status may be automatically
- * cleared when reading FCR.
+//! @}
+
+
+/*! \name Flash Properties
*/
-#define Flashc_get_programming_error() ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_PROGE_MASK)>>AVR32_FLASHC_FSR_PROGE_OFFSET)
+//! @{
+
+
+unsigned int flashc_get_flash_size(void)
+{
+ static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] =
+ {
+ 32 << 10,
+ 64 << 10,
+ 128 << 10,
+ 256 << 10,
+ 384 << 10,
+ 512 << 10,
+ 768 << 10,
+ 1024 << 10
+ };
+ return FLASH_SIZE[(AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FSZ_MASK) >> AVR32_FLASHC_FSR_FSZ_OFFSET];
+}
+
+
+unsigned int flashc_get_page_count(void)
+{
+ return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE;
+}
+
-/*! Check if page is erased (used with the quick page read command result)
- * \warning: Flash status register (FCR) is read, and error status may be automatically
- * cleared when reading FCR.
+unsigned int flashc_get_page_count_per_region(void)
+{
+ return flashc_get_page_count() / AVR32_FLASHC_REGIONS;
+}
+
+
+unsigned int flashc_get_page_region(int page_number)
+{
+ return ((page_number >= 0) ? page_number : flashc_get_page_number()) / flashc_get_page_count_per_region();
+}
+
+
+unsigned int flashc_get_region_first_page_number(unsigned int region)
+{
+ return region * flashc_get_page_count_per_region();
+}
+
+
+//! @}
+
+
+/*! \name FLASHC Control
*/
-#define Flashc_is_page_erased() ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK)>>AVR32_FLASHC_FSR_QPRR_OFFSET)
+//! @{
-/*! Set: No erase is performed before programming. */
-#define Flashc_set_no_erase_before_programming() (AVR32_FLASHC.fcr |= AVR32_FLASHC_FCR_NEBP_MASK)
-/*! Set: Page erase is performed before programming. */
-#define Flashc_set_erase_before_programming() (AVR32_FLASHC.fcr &= ~AVR32_FLASHC_FCR_NEBP_MASK)
+unsigned int flashc_get_wait_state(void)
+{
+ return (AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FWS_MASK) >> AVR32_FLASHC_FCR_FWS_OFFSET;
+}
-/*!
- * Memcopy function
- * \param *s1 destination
- * \param *s2 source
- * \param n word numbers to copy
+void flashc_set_wait_state(unsigned int wait_state)
+{
+ u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
+ u_avr32_flashc_fcr.FCR.fws = wait_state;
+ AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
+}
+
+
+Bool flashc_is_ready_int_enabled(void)
+{
+ return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0);
+}
+
+
+void flashc_enable_ready_int(Bool enable)
+{
+ u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
+ u_avr32_flashc_fcr.FCR.frdy = (enable != FALSE);
+ AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
+}
+
+
+Bool flashc_is_lock_error_int_enabled(void)
+{
+ return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0);
+}
+
+
+void flashc_enable_lock_error_int(Bool enable)
+{
+ u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
+ u_avr32_flashc_fcr.FCR.locke = (enable != FALSE);
+ AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
+}
+
+
+Bool flashc_is_prog_error_int_enabled(void)
+{
+ return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_PROGE_MASK) != 0);
+}
+
+
+void flashc_enable_prog_error_int(Bool enable)
+{
+ u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
+ u_avr32_flashc_fcr.FCR.proge = (enable != FALSE);
+ AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
+}
+
+
+//! @}
+
+
+/*! \name FLASHC Status
*/
-U32 *flashc_memcpy(U32 *s1, const U32 *s2, const U32 n) {
- register U32 *u32pdst;
- register U32 i;
- u32pdst = s1;
- for (i = n; i > 0; i--) *u32pdst++ = *s2++;
- return s1;
+//! @{
+
+
+Bool flashc_is_ready(void)
+{
+ return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK) != 0);
+}
+
+
+void flashc_default_wait_until_ready(void)
+{
+ while (!flashc_is_ready());
}
-/*!
- * Set number of wait state for flash controller.
+
+void (*volatile flashc_wait_until_ready)(void) = flashc_default_wait_until_ready;
+
+
+/*! \brief Gets the error status of the FLASHC.
+ *
+ * \return The error status of the FLASHC built up from
+ * \c AVR32_FLASHC_FSR_LOCKE_MASK and \c AVR32_FLASHC_FSR_PROGE_MASK.
+ *
+ * \warning This hardware error status is cleared by all functions reading the
+ * Flash Status Register (FSR). This function is therefore not part of
+ * the driver's API which instead presents \ref flashc_is_lock_error
+ * and \ref flashc_is_programming_error.
*/
-int flashc_set_wait_state(U16 ws)
+static unsigned int flashc_get_error_status(void)
+{
+ return AVR32_FLASHC.fsr & (AVR32_FLASHC_FSR_LOCKE_MASK |
+ AVR32_FLASHC_FSR_PROGE_MASK);
+}
+
+
+//! Sticky error status of the FLASHC.
+//! This variable is updated by functions that issue FLASHC commands. It
+//! contains the cumulated FLASHC error status of all the FLASHC commands issued
+//! by a function.
+static unsigned int flashc_error_status = 0;
+
+
+Bool flashc_is_lock_error(void)
+{
+ return ((flashc_error_status & AVR32_FLASHC_FSR_LOCKE_MASK) != 0);
+}
+
+
+Bool flashc_is_programming_error(void)
{
- if (ws > 1 ) return FLASHC_INVALID_INPUT;
- if (ws == 0) AVR32_FLASHC.fcr &= ~AVR32_FLASHC_FWS_MASK; // update flash control register FCR
- if (ws == 1) AVR32_FLASHC.fcr |= AVR32_FLASHC_FWS_MASK;
- return FLASHC_SUCCESS;
+ return ((flashc_error_status & AVR32_FLASHC_FSR_PROGE_MASK) != 0);
}
-/*!
- * Page write n
- * \param n page number
- * \warning Assuming the page address is already loaded
+//! @}
+
+
+/*! \name FLASHC Command Control
*/
-void flashc_page_write_n(U16 page_n) {
- register U32 u32Command;
- u32Command = X_KEY | AVR32_FLASHC_FCMD_CMD_WP; // key and command
- u32Command |= ((page_n<> AVR32_FLASHC_FCMD_CMD_OFFSET;
+}
+
+
+unsigned int flashc_get_page_number(void)
+{
+ return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_PAGEN_MASK) >> AVR32_FLASHC_FCMD_PAGEN_OFFSET;
+}
+
+
+void flashc_issue_command(unsigned int command, int page_number)
+{
+ u_avr32_flashc_fcmd_t u_avr32_flashc_fcmd;
+ flashc_wait_until_ready();
+ u_avr32_flashc_fcmd.fcmd = AVR32_FLASHC.fcmd;
+ u_avr32_flashc_fcmd.FCMD.cmd = command;
+ if (page_number >= 0) u_avr32_flashc_fcmd.FCMD.pagen = page_number;
+ u_avr32_flashc_fcmd.FCMD.key = AVR32_FLASHC_FCMD_KEY_KEY;
+ AVR32_FLASHC.fcmd = u_avr32_flashc_fcmd.fcmd;
+ flashc_error_status = flashc_get_error_status();
+ flashc_wait_until_ready();
}
-/* Page write
- * Assuming the page address is already loaded
+
+//! @}
+
+
+/*! \name FLASHC Global Commands
*/
-void flashc_page_write(U16 page_n) {
- register U32 u32Command;
- u32Command = X_KEY | AVR32_FLASHC_FCMD_CMD_WP; // key and command
- u32Command |= ((page_n<>AVR32_FLASHC_FSR_FRDY_OFFSET));
+unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size)
+{
+ flashc_set_gp_fuse_bitfield(AVR32_FLASHC_FGPFR_BOOTPROT_OFFSET,
+ AVR32_FLASHC_FGPFR_BOOTPROT_SIZE,
+ (1 << AVR32_FLASHC_FGPFR_BOOTPROT_SIZE) - 1 -
+ ((bootprot_size) ?
+ 32 - clz((((min(max(bootprot_size, AVR32_FLASHC_PAGE_SIZE << 1),
+ AVR32_FLASHC_PAGE_SIZE <<
+ ((1 << AVR32_FLASHC_FGPFR_BOOTPROT_SIZE) - 1)) +
+ AVR32_FLASHC_PAGE_SIZE - 1) /
+ AVR32_FLASHC_PAGE_SIZE) << 1) - 1) - 1 :
+ 0));
+ return flashc_get_bootloader_protected_size();
+}
- if (Flashc_is_page_erased() == 0) // check QPRR bit in FCR to have the result of the quick page read
- return FLASHC_FAILURE;
- return FLASHC_SUCCESS;
+
+Bool flashc_is_external_privileged_fetch_locked(void)
+{
+ return (!flashc_read_gp_fuse_bit(AVR32_FLASHC_FGPFR_EPFL_OFFSET));
}
-/*!
- * Page load and write
- * \warning Dest is a FLASH address at a page size boundary
- * (assuming the page is already erased)
- */
-void flashc_page_copy_write(U32 *u32dest, const U32 *src) {
- register U32 u32command,pagen;
- flashc_memcpy(u32dest, src, AVR32_FLASHC_PAGE_SIZE / 4); // copy Src to Dest (Dest is a FLASH address at a page boundary)
- pagen = (U32)(((U32)u32dest-AVR32_FLASH_ADDRESS)/AVR32_FLASHC_PAGE_SIZE); // memory page addr
- u32command = X_KEY | ((pagen<> (AVR32_FLASHC_FGPFR_GPF00_OFFSET + (pos & 0x1F)) &
+ ((1 << min(width, 32)) - 1);
+}
+
+
+U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte)
+{
+ return AVR32_FLASHC.fgpfr >> (AVR32_FLASHC_FGPFR_GPF00_OFFSET + ((gp_fuse_byte & 0x03) << 3));
+}
+
+
+U32 flashc_read_all_gp_fuses(void)
+{
+ return AVR32_FLASHC.fgpfr;
+}
+
+
+Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check)
+{
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EGPB, gp_fuse_bit & 0x1F);
+ return (check) ? flashc_read_gp_fuse_bit(gp_fuse_bit) : TRUE;
+}
+
+
+Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check)
+{
+ unsigned int error_status = 0;
+ unsigned int gp_fuse_bit;
+ pos &= 0x1F;
+ width = min(width, 32);
+ for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++)
+ {
+ flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE);
+ error_status |= flashc_error_status;
+ }
+ flashc_error_status = error_status;
+ return (check) ? (flashc_read_gp_fuse_bitfield(pos, width) == (1 << width) - 1) : TRUE;
+}
+
+
+Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check)
+{
+ unsigned int error_status;
+ unsigned int current_gp_fuse_byte;
+ U32 value = flashc_read_all_gp_fuses();
+ flashc_erase_all_gp_fuses(FALSE);
+ error_status = flashc_error_status;
+ for (current_gp_fuse_byte = 0; current_gp_fuse_byte < 4; current_gp_fuse_byte++, value >>= 8)
+ {
+ if (current_gp_fuse_byte != gp_fuse_byte)
+ {
+ flashc_write_gp_fuse_byte(current_gp_fuse_byte, value);
+ error_status |= flashc_error_status;
+ }
+ }
+ flashc_error_status = error_status;
+ return (check) ? (flashc_read_gp_fuse_byte(gp_fuse_byte) == 0xFF) : TRUE;
+}
+
+
+Bool flashc_erase_all_gp_fuses(Bool check)
+{
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EAGPF, -1);
+ return (check) ? (flashc_read_all_gp_fuses() == 0xFFFFFFFF) : TRUE;
+}
+
+
+void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value)
+{
+ if (!value)
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WGPB, gp_fuse_bit & 0x1F);
+}
+
+
+void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U32 value)
+{
+ unsigned int error_status = 0;
+ unsigned int gp_fuse_bit;
+ pos &= 0x1F;
+ width = min(width, 32);
+ for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1)
+ {
+ flashc_write_gp_fuse_bit(gp_fuse_bit, value & 0x01);
+ error_status |= flashc_error_status;
+ }
+ flashc_error_status = error_status;
+}
+
+
+void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value)
{
- return *addr;
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_PGPFB, (gp_fuse_byte & 0x03) | value << 2);
}
-/**
- * This function allows to write up to 65535 bytes in the flash memory.
- * This function manages alignement issue (byte and page alignements).
+
+void flashc_write_all_gp_fuses(U32 value)
+{
+ unsigned int error_status = 0;
+ unsigned int gp_fuse_byte;
+ for (gp_fuse_byte = 0; gp_fuse_byte < 4; gp_fuse_byte++, value >>= 8)
+ {
+ flashc_write_gp_fuse_byte(gp_fuse_byte, value);
+ error_status |= flashc_error_status;
+ }
+ flashc_error_status = error_status;
+}
+
+
+void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value)
+{
+ if (value)
+ flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE);
+ else
+ flashc_write_gp_fuse_bit(gp_fuse_bit, FALSE);
+}
+
+
+void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U32 value)
+{
+ unsigned int error_status = 0;
+ unsigned int gp_fuse_bit;
+ pos &= 0x1F;
+ width = min(width, 32);
+ for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1)
+ {
+ flashc_set_gp_fuse_bit(gp_fuse_bit, value & 0x01);
+ error_status |= flashc_error_status;
+ }
+ flashc_error_status = error_status;
+}
+
+
+void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value)
+{
+ unsigned int error_status;
+ switch (value)
+ {
+ case 0xFF:
+ flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE);
+ break;
+ case 0x00:
+ flashc_write_gp_fuse_byte(gp_fuse_byte, 0x00);
+ break;
+ default:
+ flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE);
+ error_status = flashc_error_status;
+ flashc_write_gp_fuse_byte(gp_fuse_byte, value);
+ flashc_error_status |= error_status;
+ }
+}
+
+
+void flashc_set_all_gp_fuses(U32 value)
+{
+ unsigned int error_status;
+ switch (value)
+ {
+ case 0xFFFFFFFF:
+ flashc_erase_all_gp_fuses(FALSE);
+ break;
+ case 0x00000000:
+ flashc_write_all_gp_fuses(0x00000000);
+ break;
+ default:
+ flashc_erase_all_gp_fuses(FALSE);
+ error_status = flashc_error_status;
+ flashc_write_all_gp_fuses(value);
+ flashc_error_status |= error_status;
+ }
+}
+
+
+//! @}
+
+
+/*! \name Access to Flash Pages
*/
-int flash_wr_block(U32 * src, U32 dst, U32 n)
+//! @{
+
+
+void flashc_clear_page_buffer(void)
+{
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_CPB, -1);
+}
+
+
+Bool flashc_is_page_erased(void)
+{
+ return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK) != 0);
+}
+
+
+Bool flashc_quick_page_read(int page_number)
+{
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPR, page_number);
+ return flashc_is_page_erased();
+}
+
+
+Bool flashc_erase_page(int page_number, Bool check)
+{
+ Bool page_erased = TRUE;
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EP, page_number);
+ if (check)
+ {
+ unsigned int error_status = flashc_error_status;
+ page_erased = flashc_quick_page_read(-1);
+ flashc_error_status |= error_status;
+ }
+ return page_erased;
+}
+
+
+Bool flashc_erase_all_pages(Bool check)
+{
+ Bool all_pages_erased = TRUE;
+ unsigned int error_status = 0;
+ unsigned int page_number = flashc_get_page_count();
+ while (page_number)
+ {
+ all_pages_erased &= flashc_erase_page(--page_number, check);
+ error_status |= flashc_error_status;
+ }
+ flashc_error_status = error_status;
+ return all_pages_erased;
+}
+
+
+void flashc_write_page(int page_number)
+{
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WP, page_number);
+}
+
+
+Bool flashc_check_user_page_erase(void)
+{
+ volatile U64 *user_page_ptr = (U64 *)AVR32_FLASHC_USER_PAGE;
+ while (user_page_ptr < (U64 *)(AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE))
+ {
+ if (*user_page_ptr++ != 0xFFFFFFFFFFFFFFFFULL)
+ return FALSE;
+ }
+ return TRUE;
+}
+
+
+Bool flashc_erase_user_page(Bool check)
+{
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EUP, -1);
+ return (check) ? flashc_check_user_page_erase() : TRUE;
+}
+
+
+void flashc_write_user_page(void)
+{
+ flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WUP, -1);
+}
+
+
+volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase)
+{
+ return flashc_memset16(dst, src | (U16)src << 8, nbytes, erase);
+}
+
+
+volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase)
+{
+ return flashc_memset32(dst, src | (U32)src << 16, nbytes, erase);
+}
+
+
+volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase)
{
- U32 u32NbWord=0;
- U32 u32Temp=0;
- U32 u32SavePageAddr=0;
+ return flashc_memset64(dst, src | (U64)src << 32, nbytes, erase);
+}
+
+
+volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase)
+{
+ // Use aggregated pointers to have several alignments available for a same address.
+ UnionCVPtr flash_array_end;
+ UnionVPtr dest;
+ Union64 source = {0};
+ StructCVPtr dest_end;
+ UnionCVPtr flash_page_source_end;
+ Bool incomplete_flash_page_end;
+ Union64 flash_dword;
+ UnionVPtr tmp;
+ unsigned int error_status = 0;
+ unsigned int i;
+
+ // Reformat arguments.
+ flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size();
+ dest.u8ptr = dst;
+ for (i = (Get_align((U32)dest.u8ptr, sizeof(U64)) - 1) & (sizeof(U64) - 1);
+ src; i = (i - 1) & (sizeof(U64) - 1))
+ {
+ source.u8[i] = src;
+ src >>= 8;
+ }
+ dest_end.u8ptr = dest.u8ptr + nbytes;
+
+ // If destination is outside flash, go to next flash page if any.
+ if (dest.u8ptr < AVR32_FLASH)
+ {
+ dest.u8ptr = AVR32_FLASH;
+ }
+ else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE)
+ {
+ dest.u8ptr = AVR32_FLASHC_USER_PAGE;
+ }
+
+ // If end of destination is outside flash, move it to the end of the previous flash page if any.
+ if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE)
+ {
+ dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE;
+ }
+ else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr)
+ {
+ dest_end.u8ptr = flash_array_end.u8ptr;
+ }
+
+ // Align each end of destination pointer with its natural boundary.
+ dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16));
+ dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32));
+ dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64));
+
+ // While end of destination is not reached...
+ while (dest.u8ptr < dest_end.u8ptr)
+ {
+ // Clear the page buffer in order to prepare data for a flash page write.
+ flashc_clear_page_buffer();
+ error_status |= flashc_error_status;
+
+ // Determine where the source data will end in the current flash page.
+ flash_page_source_end.u64ptr =
+ (U64 *)min((U32)dest_end.u64ptr,
+ Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE);
- U32 u32Address = dst-(dst%AVR32_FLASHC_PAGE_SIZE); // Compute the start of the page to be modified
+ // Determine if the current destination page has an incomplete end.
+ incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >=
+ Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE));
- while(n) // While there is data to load from src buffer
- {
- // u32Address = dst-((dst&0xFFFFffff)%AVR32_FLASHC_PAGE_SIZE); // Compute the start of the page to be modified
- u32SavePageAddr = (u32Address-AVR32_FLASH_ADDRESS)/AVR32_FLASHC_PAGE_SIZE; //memorize page addr
+ // Use a flash double-word buffer to manage unaligned accesses.
+ flash_dword.u64 = source.u64;
- // For each word in this page
- for(u32NbWord=0 ; u32NbWord= dst) //current address is inside the target range adr
- {
- u32Temp = * ((U32*)src); // load word from buffer src
- src++;
- n--;
- }
- else //current word addr out of dst target
- {
- u32Temp = flash_rd_word((U32 const*)u32Address); // load word from existing flash
- }
- }
- else //complete page with words from existing flash
- {
- u32Temp = flash_rd_word((U32 const*)u32Address);
- }
- flash_fill_temp_buffer(u32Temp, u32Address); // fill page buffer
- u32Address+=4; // one more word for u32Address
+ // Fill the beginning of the page buffer with the current flash page data.
+ for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE);
+ tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
+ tmp.u64ptr++)
+ *tmp.u64ptr = *tmp.u64ptr;
}
- // u32Address = u32SavePageAddr*AVR32_FLASHC_PAGE_SIZE+AVR32_FLASH_ADDRESS;
+ // If destination is not 64-bit aligned...
+ if (!Test_align((U32)dest.u8ptr, sizeof(U64)))
+ {
+ // If page erase is requested...
+ if (erase)
+ {
+ // Fill the beginning of the flash double-word buffer with the current flash page data.
+ for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
+ flash_dword.u8[i] = *tmp.u8ptr++;
+ }
+ // If page erase is not requested...
+ else
+ {
+ // Erase the beginning of the flash double-word buffer.
+ for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
+ flash_dword.u8[i] = 0xFF;
+ }
+
+ // Align the destination pointer with its 64-bit boundary.
+ dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
+
+ // If the current destination double-word is not the last one...
+ if (dest.u64ptr < dest_end.u64ptr)
+ {
+ // Write the flash double-word buffer to the page buffer and reinitialize it.
+ *dest.u64ptr++ = flash_dword.u64;
+ flash_dword.u64 = source.u64;
+ }
+ }
+ }
+
+ // Write the source data to the page buffer with 64-bit alignment.
+ for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
+ *dest.u64ptr++ = source.u64;
- /*
- // Done with QPR
- for(u32NbWord=0 ; u32NbWord>AVR32_FLASHC_FSR_FRDY_OFFSET));
+ // Write the flash double-word buffer to the page buffer.
+ *dest.u64ptr++ = flash_dword.u64;
+ }
+ }
+
+ // If the current flash page is in the flash array...
+ if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE)
+ {
+ // Erase the current page if requested and write it from the page buffer.
+ if (erase)
+ {
+ flashc_erase_page(-1, FALSE);
+ error_status |= flashc_error_status;
+ }
+ flashc_write_page(-1);
+ error_status |= flashc_error_status;
- if ( (AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK)>> AVR32_FLASHC_FSR_QPRR_OFFSET == 0 ) // test QPR bit in FSR
- { // erase page
- AVR32_FLASHC.fcmd = X_KEY | ((u32SavePageAddr<>AVR32_FLASHC_FSR_FRDY_OFFSET));
+ // If the end of the flash array is reached, go to the User page.
+ if (dest.u8ptr >= flash_array_end.u8ptr)
+ dest.u8ptr = AVR32_FLASHC_USER_PAGE;
}
+ // If the current flash page is the User page...
+ else
+ {
+ // Erase the User page if requested and write it from the page buffer.
+ if (erase)
+ {
+ flashc_erase_user_page(FALSE);
+ error_status |= flashc_error_status;
+ }
+ flashc_write_user_page();
+ error_status |= flashc_error_status;
+ }
+ }
- flashc_page_write_n(u32SavePageAddr); // write the corresponding page number
- flashc_clear_page_buffer();
- } // end while (n)
- return FLASHC_SUCCESS;
+ // Update the FLASHC error status.
+ flashc_error_status = error_status;
+
+ // Return the initial destination pointer as the standard memset function does.
+ return dst;
}
-/* Erase all flash with pages access */
-void flash_erase(void)
+
+volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase)
{
- U32 u32NbPage = flashc_get_page_count();
- while (u32NbPage) flashc_erase_page(--u32NbPage);
+ // Use aggregated pointers to have several alignments available for a same address.
+ UnionCVPtr flash_array_end;
+ UnionVPtr dest;
+ UnionCPtr source;
+ StructCVPtr dest_end;
+ UnionCVPtr flash_page_source_end;
+ Bool incomplete_flash_page_end;
+ Union64 flash_dword;
+ Bool flash_dword_pending = FALSE;
+ UnionVPtr tmp;
+ unsigned int error_status = 0;
+ unsigned int i, j;
+
+ // Reformat arguments.
+ flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size();
+ dest.u8ptr = dst;
+ source.u8ptr = src;
+ dest_end.u8ptr = dest.u8ptr + nbytes;
+
+ // If destination is outside flash, go to next flash page if any.
+ if (dest.u8ptr < AVR32_FLASH)
+ {
+ source.u8ptr += AVR32_FLASH - dest.u8ptr;
+ dest.u8ptr = AVR32_FLASH;
+ }
+ else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE)
+ {
+ source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr;
+ dest.u8ptr = AVR32_FLASHC_USER_PAGE;
+ }
+
+ // If end of destination is outside flash, move it to the end of the previous flash page if any.
+ if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE)
+ {
+ dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE;
+ }
+ else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr)
+ {
+ dest_end.u8ptr = flash_array_end.u8ptr;
+ }
+
+ // Align each end of destination pointer with its natural boundary.
+ dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16));
+ dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32));
+ dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64));
+
+ // While end of destination is not reached...
+ while (dest.u8ptr < dest_end.u8ptr)
+ {
+ // Clear the page buffer in order to prepare data for a flash page write.
+ flashc_clear_page_buffer();
+ error_status |= flashc_error_status;
+
+ // Determine where the source data will end in the current flash page.
+ flash_page_source_end.u64ptr =
+ (U64 *)min((U32)dest_end.u64ptr,
+ Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE);
+
+ // Determine if the current destination page has an incomplete end.
+ incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >=
+ Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE));
+
+ // If destination does not point to the beginning of the current flash page...
+ if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE))
+ {
+ // If page erase is requested...
+ if (erase)
+ {
+ // Fill the beginning of the page buffer with the current flash page data.
+ for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE);
+ tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
+ tmp.u64ptr++)
+ *tmp.u64ptr = *tmp.u64ptr;
+ }
+
+ // If destination is not 64-bit aligned...
+ if (!Test_align((U32)dest.u8ptr, sizeof(U64)))
+ {
+ // If page erase is requested...
+ if (erase)
+ {
+ // Fill the beginning of the flash double-word buffer with the current flash page data.
+ for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
+ flash_dword.u8[i] = *tmp.u8ptr++;
+ }
+ // If page erase is not requested...
+ else
+ {
+ // Erase the beginning of the flash double-word buffer.
+ for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
+ flash_dword.u8[i] = 0xFF;
+ }
+
+ // Fill the end of the flash double-word buffer with the source data.
+ for (; i < sizeof(U64); i++)
+ flash_dword.u8[i] = *source.u8ptr++;
+
+ // Align the destination pointer with its 64-bit boundary.
+ dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
+
+ // If the current destination double-word is not the last one...
+ if (dest.u64ptr < dest_end.u64ptr)
+ {
+ // Write the flash double-word buffer to the page buffer.
+ *dest.u64ptr++ = flash_dword.u64;
+ }
+ // If the current destination double-word is the last one, the flash
+ // double-word buffer must be kept for later.
+ else flash_dword_pending = TRUE;
+ }
+ }
+
+ // Read the source data with the maximal possible alignment and write it to
+ // the page buffer with 64-bit alignment.
+ switch (Get_align((U32)source.u8ptr, sizeof(U32)))
+ {
+ case 0:
+ for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
+ *dest.u64ptr++ = *source.u64ptr++;
+ break;
+
+ case sizeof(U16):
+ for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
+ {
+ for (j = 0; j < sizeof(U64) / sizeof(U16); j++) flash_dword.u16[j] = *source.u16ptr++;
+ *dest.u64ptr++ = flash_dword.u64;
+ }
+ break;
+
+ default:
+ for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
+ {
+ for (j = 0; j < sizeof(U64); j++) flash_dword.u8[j] = *source.u8ptr++;
+ *dest.u64ptr++ = flash_dword.u64;
+ }
+ }
+
+ // If the current destination page has an incomplete end...
+ if (incomplete_flash_page_end)
+ {
+ // If the flash double-word buffer is in use, do not initialize it.
+ if (flash_dword_pending) i = Get_align((U32)dest_end.u8ptr, sizeof(U64));
+ // If the flash double-word buffer is free...
+ else
+ {
+ // Fill the beginning of the flash double-word buffer with the source data.
+ for (i = 0; i < Get_align((U32)dest_end.u8ptr, sizeof(U64)); i++)
+ flash_dword.u8[i] = *source.u8ptr++;
+ }
+
+ // If page erase is requested...
+ if (erase)
+ {
+ tmp.u8ptr = (volatile U8 *)dest_end.u8ptr;
+
+ // If end of destination is not 64-bit aligned...
+ if (!Test_align((U32)dest_end.u8ptr, sizeof(U64)))
+ {
+ // Fill the end of the flash double-word buffer with the current flash page data.
+ for (; i < sizeof(U64); i++)
+ flash_dword.u8[i] = *tmp.u8ptr++;
+
+ // Write the flash double-word buffer to the page buffer.
+ *dest.u64ptr++ = flash_dword.u64;
+ }
+
+ // Fill the end of the page buffer with the current flash page data.
+ for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++)
+ *tmp.u64ptr = *tmp.u64ptr;
+ }
+ // If page erase is not requested but end of destination is not 64-bit aligned...
+ else if (!Test_align((U32)dest_end.u8ptr, sizeof(U64)))
+ {
+ // Erase the end of the flash double-word buffer.
+ for (; i < sizeof(U64); i++)
+ flash_dword.u8[i] = 0xFF;
+
+ // Write the flash double-word buffer to the page buffer.
+ *dest.u64ptr++ = flash_dword.u64;
+ }
+ }
+
+ // If the current flash page is in the flash array...
+ if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE)
+ {
+ // Erase the current page if requested and write it from the page buffer.
+ if (erase)
+ {
+ flashc_erase_page(-1, FALSE);
+ error_status |= flashc_error_status;
+ }
+ flashc_write_page(-1);
+ error_status |= flashc_error_status;
+
+ // If the end of the flash array is reached, go to the User page.
+ if (dest.u8ptr >= flash_array_end.u8ptr)
+ {
+ source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr;
+ dest.u8ptr = AVR32_FLASHC_USER_PAGE;
+ }
+ }
+ // If the current flash page is the User page...
+ else
+ {
+ // Erase the User page if requested and write it from the page buffer.
+ if (erase)
+ {
+ flashc_erase_user_page(FALSE);
+ error_status |= flashc_error_status;
+ }
+ flashc_write_user_page();
+ error_status |= flashc_error_status;
+ }
+ }
+
+ // Update the FLASHC error status.
+ flashc_error_status = error_status;
+
+ // Return the initial destination pointer as the standard memcpy function does.
+ return dst;
}
+
+
+//! @}
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.h b/Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.h
index d9d0e5f10..fec9d08a2 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.h
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.h
@@ -1,20 +1,18 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
- * \brief Flash Controller driver .h file.
+ * \brief FLASHC driver for AVR32 UC3.
*
- * This file defines a useful set of functions for the flash controller
- * on AVR32A devices.
+ * AVR32 Flash Controller driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices: All AVR32A devices.
+ * - Supported devices: All AVR32 devices with a FLASHC module can be used.
+ * - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
- *****************************************************************************/
+ ******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
@@ -47,147 +45,841 @@
#ifndef _FLASHC_H_
#define _FLASHC_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
+#include
#include "compiler.h"
-/*! Value returned by function when it completed successfully */
-#define FLASHC_SUCCESS 0
-
-/*! Value returned by function when it was unable to complete successfully
- for some unspecified reason */
-#define FLASHC_FAILURE -1
-
-/*! Value returned by function when the input paramters are out of range */
-#define FLASHC_INVALID_INPUT 1
-
-
-/*! Get Flash size */
-#if __GNUC__
-__attribute__((__always_inline__))
-#endif
-extern __inline__ unsigned int flashc_get_flash_size(void)
-{
- static const unsigned int FLASHC_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] =
- {
- 32 << 10,
- 64 << 10,
- 128 << 10,
- 256 << 10,
- 384 << 10,
- 512 << 10,
- 768 << 10,
- 1024 << 10
- };
-
- return FLASHC_SIZE[Rd_bitfield(AVR32_FLASHC.fsr, AVR32_FLASHC_FSR_FSZ_MASK)];
-}
-
-/*! Get Flash page count */
-#if __GNUC__
-__attribute__((__always_inline__))
-#endif
-extern __inline__ unsigned int flashc_get_page_count(void)
-{
- return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE;
-}
-
-/*! Get Flash page count per region */
-#if __GNUC__
-__attribute__((__always_inline__))
-#endif
-extern __inline__ unsigned int flashc_get_page_count_per_region(void)
-{
- return flashc_get_page_count() / 16;
-}
-
-/*! Wait flash ready status, the application must wait before running a new command.
- * Warning: Flash status register (FCR) is read, and error status may be automatically
- * cleared when reading FCR.
- */
-#if __GNUC__
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void flashc_busy_wait(void)
-{
- while (!Tst_bits(AVR32_FLASHC.fsr, AVR32_FLASHC_FSR_FRDY_MASK));
-}
-
-/*! Check if security bit is active.
- * \warning: Flash status register (FCR) is read, and error status may be automatically
- * cleared when reading FCR.
- */
-#if __GNUC__
-__attribute__((__always_inline__))
-#endif
-extern __inline__ Bool flashc_is_security_active(void)
-{
- return Tst_bits(AVR32_FLASHC.fsr, AVR32_FLASHC_FSR_SECURITY_MASK);
-}
-
-/*! \brief Memcopy function
- * \param *s1 destination
- * \param *s2 source
- * \param n number of words to copy
- */
-extern U32 *flashc_memcpy(U32 *s1, const U32 *s2, const U32 n);
-
-/*! \brief Set number of wait state
- * \param ws 0 if for no-wait state, for 1 wait-state
- * \return FLASHC_SUCCESS, FLASHC_INVALID_INPUT or FLASHC_FAILURE
- */
-extern int flashc_set_wait_state(U16 ws);
-
-/*! \brief Page write number n. Assuming page bubuffer is already loaded.
- * \param n Page number
- */
-extern void flashc_page_write_n(U16 n);
-
-/*! \brief Page write
- * Assuming the page address is already loaded
- */
-extern void flashc_page_write(U16 page_n);
-
-/*! \brief Clear page buffer
+//! Number of flash regions defined by the FLASHC.
+#define AVR32_FLASHC_REGIONS (AVR32_FLASHC_FLASH_SIZE /\
+ (AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE))
+
+
+/*! \name Flash Properties
*/
-extern void flashc_clear_page_buffer(void);
+//! @{
+
+/*! \brief Gets the size of the whole flash array.
+ *
+ * \return The size of the whole flash array in bytes.
+ */
+extern unsigned int flashc_get_flash_size(void);
+
+/*! \brief Gets the total number of pages in the flash array.
+ *
+ * \return The total number of pages in the flash array.
+ */
+extern unsigned int flashc_get_page_count(void);
+
+/*! \brief Gets the number of pages in each flash region.
+ *
+ * \return The number of pages in each flash region.
+ */
+extern unsigned int flashc_get_page_count_per_region(void);
+
+/*! \brief Gets the region number of a page.
+ *
+ * \param page_number The page number:
+ * \arg \c 0 to (flashc_get_page_count() - 1) : a page number within
+ * the flash array;
+ * \arg < 0 : the current page number.
+ *
+ * \return The region number of the specified page.
+ */
+extern unsigned int flashc_get_page_region(int page_number);
+
+/*! \brief Gets the number of the first page of a region.
+ *
+ * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1) .
+ *
+ * \return The number of the first page of the specified region.
+ */
+extern unsigned int flashc_get_region_first_page_number(unsigned int region);
+
+//! @}
+
+
+/*! \name FLASHC Control
+ */
+//! @{
+
+/*! \brief Gets the number of wait states of flash read accesses.
+ *
+ * \return The number of wait states of flash read accesses.
+ */
+extern unsigned int flashc_get_wait_state(void);
+
+/*! \brief Sets the number of wait states of flash read accesses.
+ *
+ * \param wait_state The number of wait states of flash read accesses: \c 0 to
+ * \c 1.
+ */
+extern void flashc_set_wait_state(unsigned int wait_state);
+
+/*! \brief Tells whether the Flash Ready interrupt is enabled.
+ *
+ * \return Whether the Flash Ready interrupt is enabled.
+ */
+extern Bool flashc_is_ready_int_enabled(void);
+
+/*! \brief Enables or disables the Flash Ready interrupt.
+ *
+ * \param enable Whether to enable the Flash Ready interrupt: \c TRUE or
+ * \c FALSE.
+ */
+extern void flashc_enable_ready_int(Bool enable);
+
+/*! \brief Tells whether the Lock Error interrupt is enabled.
+ *
+ * \return Whether the Lock Error interrupt is enabled.
+ */
+extern Bool flashc_is_lock_error_int_enabled(void);
+
+/*! \brief Enables or disables the Lock Error interrupt.
+ *
+ * \param enable Whether to enable the Lock Error interrupt: \c TRUE or
+ * \c FALSE.
+ */
+extern void flashc_enable_lock_error_int(Bool enable);
+
+/*! \brief Tells whether the Programming Error interrupt is enabled.
+ *
+ * \return Whether the Programming Error interrupt is enabled.
+ */
+extern Bool flashc_is_prog_error_int_enabled(void);
+
+/*! \brief Enables or disables the Programming Error interrupt.
+ *
+ * \param enable Whether to enable the Programming Error interrupt: \c TRUE or
+ * \c FALSE.
+ */
+extern void flashc_enable_prog_error_int(Bool enable);
+
+//! @}
+
+
+/*! \name FLASHC Status
+ */
+//! @{
+
+/*! \brief Tells whether the FLASHC is ready to run a new command.
+ *
+ * \return Whether the FLASHC is ready to run a new command.
+ */
+extern Bool flashc_is_ready(void);
+
+/*! \brief Waits actively until the FLASHC is ready to run a new command.
+ *
+ * This is the default function assigned to \ref flashc_wait_until_ready.
+ */
+extern void flashc_default_wait_until_ready(void);
+
+//! Pointer to the function used by the driver when it needs to wait until the
+//! FLASHC is ready to run a new command.
+//! The default function is \ref flashc_default_wait_until_ready.
+//! The user may change this pointer to use another implementation.
+extern void (*volatile flashc_wait_until_ready)(void);
+
+/*! \brief Tells whether a Lock Error has occurred during the last function
+ * called that issued one or more FLASHC commands.
+ *
+ * \return Whether a Lock Error has occurred during the last function called
+ * that issued one or more FLASHC commands.
+ */
+extern Bool flashc_is_lock_error(void);
+
+/*! \brief Tells whether a Programming Error has occurred during the last
+ * function called that issued one or more FLASHC commands.
+ *
+ * \return Whether a Programming Error has occurred during the last function
+ * called that issued one or more FLASHC commands.
+ */
+extern Bool flashc_is_programming_error(void);
+
+//! @}
+
+
+/*! \name FLASHC Command Control
+ */
+//! @{
+
+/*! \brief Gets the last issued FLASHC command.
+ *
+ * \return The last issued FLASHC command.
+ */
+extern unsigned int flashc_get_command(void);
+
+/*! \brief Gets the current FLASHC page number.
+ *
+ * \return The current FLASHC page number.
+ */
+extern unsigned int flashc_get_page_number(void);
+
+/*! \brief Issues a FLASHC command.
+ *
+ * \param command The command: \c AVR32_FLASHC_FCMD_CMD_x.
+ * \param page_number The page number to apply the command to:
+ * \arg \c 0 to (flashc_get_page_count() - 1) : a page number within
+ * the flash array;
+ * \arg < 0 : use this to apply the command to the current page number
+ * or if the command does not apply to any page number;
+ * \arg this argument may have other meanings according to the command. See
+ * the FLASHC chapter of the MCU datasheet.
+ *
+ * \warning A Lock Error is issued if the command violates the protection
+ * mechanism.
+ *
+ * \warning A Programming Error is issued if the command is invalid.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_issue_command(unsigned int command, int page_number);
+
+//! @}
+
-/*! \brief Page erase
- * Assuming the page address is already loaded
+/*! \name FLASHC Global Commands
+ */
+//! @{
+
+/*! \brief Issues a No Operation command to the FLASHC.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
*/
-extern void flashc_erase_page(U16 page_n);
+extern void flashc_no_operation(void);
-/*! \brief Erase all Pages
+/*! \brief Issues an Erase All command to the FLASHC.
+ *
+ * This command erases all bits in the flash array, the general-purpose fuse
+ * bits and the Security bit. The User page is not erased.
+ *
+ * This command also ensures that all volatile memories, such as register file
+ * and RAMs, are erased before the Security bit is erased, i.e. deactivated.
+ *
+ * \warning A Lock Error is issued if at least one region is locked or the
+ * bootloader protection is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
*/
extern void flashc_erase_all(void);
-/*! \brief Erase a page and check if erase is OK
+//! @}
+
+
+/*! \name FLASHC Protection Mechanisms
+ */
+//! @{
+
+/*! \brief Tells whether the Security bit is active.
+ *
+ * \return Whether the Security bit is active.
+ */
+extern Bool flashc_is_security_bit_active(void);
+
+/*! \brief Activates the Security bit.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_activate_security_bit(void);
+
+/*! \brief Gets the bootloader protected size.
+ *
+ * \return The bootloader protected size in bytes.
+ */
+extern unsigned int flashc_get_bootloader_protected_size(void);
+
+/*! \brief Sets the bootloader protected size.
+ *
+ * \param bootprot_size The wanted bootloader protected size in bytes. If this
+ * size is not supported, the actual size will be the
+ * nearest greater available size or the maximal possible
+ * size if the requested size is too large.
+ *
+ * \return The actual bootloader protected size in bytes.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size);
+
+/*! \brief Tells whether external privileged fetch is locked.
+ *
+ * \return Whether external privileged fetch is locked.
+ */
+extern Bool flashc_is_external_privileged_fetch_locked(void);
+
+/*! \brief Locks or unlocks external privileged fetch.
+ *
+ * \param lock Whether to lock external privileged fetch: \c TRUE or \c FALSE.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_lock_external_privileged_fetch(Bool lock);
+
+/*! \brief Tells whether the region of a page is locked.
+ *
+ * \param page_number The page number:
+ * \arg \c 0 to (flashc_get_page_count() - 1) : a page number within
+ * the flash array;
+ * \arg < 0 : the current page number.
+ *
+ * \return Whether the region of the specified page is locked.
+ */
+extern Bool flashc_is_page_region_locked(int page_number);
+
+/*! \brief Tells whether a region is locked.
+ *
+ * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1) .
+ *
+ * \return Whether the specified region is locked.
*/
-extern int flashc_erase_page_and_check(U16 page_n);
+extern Bool flashc_is_region_locked(unsigned int region);
-/*! \brief Page load and write
- * \warning Dest is a FLASH address at a page boundary
- * (assuming the page is already erased)
+/*! \brief Locks or unlocks the region of a page.
+ *
+ * \param page_number The page number:
+ * \arg \c 0 to (flashc_get_page_count() - 1) : a page number within
+ * the flash array;
+ * \arg < 0 : the current page number.
+ * \param lock Whether to lock the region of the specified page: \c TRUE or
+ * \c FALSE.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
*/
-extern void flashc_page_copy_write(U32 *Dest, const U32 *Src) ;
+extern void flashc_lock_page_region(int page_number, Bool lock);
-/*! \brief This function allows to write up to 65535 bytes in the flash memory.
- * This function manages alignement issue (byte and page alignements).
+/*! \brief Locks or unlocks a region.
+ *
+ * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1) .
+ * \param lock Whether to lock the specified region: \c TRUE or \c FALSE.
*
- * \param *src Address of data to write.
- * \param dst Start address in flash memory where write data
- * \param n Number of word to write
- * \return FLASHC_SUCCESS or FLASHC_FAILURE
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
*/
-extern int flash_wr_block(U32 * src, U32 dst, U32 n);
+extern void flashc_lock_region(unsigned int region, Bool lock);
+
+/*! \brief Locks or unlocks all regions.
+ *
+ * \param lock Whether to lock the regions: \c TRUE or \c FALSE.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_lock_all_regions(Bool lock);
+
+//! @}
+
+
+/*! \name Access to General-Purpose Fuses
+ */
+//! @{
+
+/*! \brief Reads a general-purpose fuse bit.
+ *
+ * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 31.
+ *
+ * \return The value of the specified general-purpose fuse bit.
+ */
+extern Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit);
+
+/*! \brief Reads a general-purpose fuse bit-field.
+ *
+ * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
+ * \c 31.
+ * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
+ * \c 32.
+ *
+ * \return The value of the specified general-purpose fuse bit-field.
+ */
+extern U32 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width);
+
+/*! \brief Reads a general-purpose fuse byte.
+ *
+ * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 3.
+ *
+ * \return The value of the specified general-purpose fuse byte.
+ */
+extern U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte);
+
+/*! \brief Reads all general-purpose fuses.
+ *
+ * \return The value of all general-purpose fuses as a word.
+ */
+extern U32 flashc_read_all_gp_fuses(void);
+
+/*! \brief Erases a general-purpose fuse bit.
+ *
+ * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 31.
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ * requested.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ * is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check);
+
+/*! \brief Erases a general-purpose fuse bit-field.
+ *
+ * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
+ * \c 31.
+ * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
+ * \c 32.
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ * requested.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ * is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check);
+
+/*! \brief Erases a general-purpose fuse byte.
+ *
+ * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 3.
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ * requested.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check);
+
+/*! \brief Erases all general-purpose fuses.
+ *
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ * requested.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_all_gp_fuses(Bool check);
+
+/*! \brief Writes a general-purpose fuse bit.
+ *
+ * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 31.
+ * \param value The value of the specified general-purpose fuse bit.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ * is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ */
+extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
+
+/*! \brief Writes a general-purpose fuse bit-field.
+ *
+ * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
+ * \c 31.
+ * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
+ * \c 32.
+ * \param value The value of the specified general-purpose fuse bit-field.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ * is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ */
+extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U32 value);
+
+/*! \brief Writes a general-purpose fuse byte.
+ *
+ * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 3.
+ * \param value The value of the specified general-purpose fuse byte.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ */
+extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
+
+/*! \brief Writes all general-purpose fuses.
+ *
+ * \param value The value of all general-purpose fuses as a word.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ */
+extern void flashc_write_all_gp_fuses(U32 value);
+
+/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write
+ * operations.
+ *
+ * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 31.
+ * \param value The value of the specified general-purpose fuse bit.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ * is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
+
+/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and
+ * write operations.
+ *
+ * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
+ * \c 31.
+ * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
+ * \c 32.
+ * \param value The value of the specified general-purpose fuse bit-field.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ * is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U32 value);
+
+/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write
+ * operations.
+ *
+ * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 3.
+ * \param value The value of the specified general-purpose fuse byte.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
+
+/*! \brief Sets all general-purpose fuses with the appropriate erase and write
+ * operations.
+ *
+ * \param value The value of all general-purpose fuses as a word.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_set_all_gp_fuses(U32 value);
+
+//! @}
+
+
+/*! \name Access to Flash Pages
+ */
+//! @{
+
+/*! \brief Clears the page buffer.
+ *
+ * This command resets all bits in the page buffer to one. Write accesses to the
+ * page buffer can only change page buffer bits from one to zero.
+ *
+ * \warning The page buffer is not automatically reset after a page write.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_clear_page_buffer(void);
+
+/*! \brief Tells whether the page to which the last Quick Page Read command was
+ * applied was erased.
+ *
+ * \return Whether the page to which the last Quick Page Read command was
+ * applied was erased.
+ */
+extern Bool flashc_is_page_erased(void);
+
+/*! \brief Applies the Quick Page Read command to a page.
+ *
+ * \param page_number The page number:
+ * \arg \c 0 to (flashc_get_page_count() - 1) : a page number within
+ * the flash array;
+ * \arg < 0 : the current page number.
+ *
+ * \return Whether the specified page is erased.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern Bool flashc_quick_page_read(int page_number);
+
+/*! \brief Erases a page.
+ *
+ * \param page_number The page number:
+ * \arg \c 0 to (flashc_get_page_count() - 1) : a page number within
+ * the flash array;
+ * \arg < 0 : the current page number.
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ * requested.
+ *
+ * \warning A Lock Error is issued if the command is applied to a page belonging
+ * to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_page(int page_number, Bool check);
+
+/*! \brief Erases all pages within the flash array.
+ *
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ * requested.
+ *
+ * \warning A Lock Error is issued if at least one region is locked or the
+ * bootloader protection is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_all_pages(Bool check);
+
+/*! \brief Writes a page from the page buffer.
+ *
+ * \param page_number The page number:
+ * \arg \c 0 to (flashc_get_page_count() - 1) : a page number within
+ * the flash array;
+ * \arg < 0 : the current page number.
+ *
+ * \warning A Lock Error is issued if the command is applied to a page belonging
+ * to a locked region or to the bootloader protected area.
+ *
+ * \warning The page buffer is not automatically reset after a page write.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ */
+extern void flashc_write_page(int page_number);
+
+/*! \brief Checks whether the User page is erased.
+ *
+ * \return Whether the User page is erased.
+ */
+extern Bool flashc_check_user_page_erase(void);
+
+/*! \brief Erases the User page.
+ *
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ * requested.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_user_page(Bool check);
+
+/*! \brief Writes the User page from the page buffer.
+ *
+ * \warning The page buffer is not automatically reset after a page write.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ */
+extern void flashc_write_user_page(void);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ * from the repeated \a src source byte.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source byte.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ * to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ * from the repeated \a src big-endian source half-word.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source half-word.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ * to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ * from the repeated \a src big-endian source word.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source word.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ * to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ * from the repeated \a src big-endian source double-word.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source double-word.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ * to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ * from the repeated \a src big-endian source pattern.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source double-word.
+ * \param src_width \a src width in bits: 8, 16, 32 or 64.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ * to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+#define flashc_memset(dst, src, src_width, nbytes, erase) \
+ TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase))
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ * from the source pointed to by \a src.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Pointer to source data.
+ * \param nbytes Number of bytes to copy.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning If copying takes place between areas that overlap, the behavior is
+ * undefined.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ * to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ * \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase);
+
+//! @}
-#endif /* #ifndef _FLASHC_H_*/
+#endif // _FLASHC_H_
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/GPIO/gpio.c b/Demo/lwIP_AVR32_UC3/DRIVERS/GPIO/gpio.c
index 24e0a446c..9b61a65aa 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/GPIO/gpio.c
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/GPIO/gpio.c
@@ -6,11 +6,11 @@
* This file defines a useful set of functions for the GPIO.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices: All AVR32 devices with a PWM module can be used.
+ * - Supported devices: All AVR32 devices with a GPIO module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/GPIO/gpio.h b/Demo/lwIP_AVR32_UC3/DRIVERS/GPIO/gpio.h
index c262ac8f6..3e2c6ff07 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/GPIO/gpio.h
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/GPIO/gpio.h
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -45,13 +45,7 @@
#ifndef _GPIO_H_
#define _GPIO_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
+#include
/*! \name Return Values of the GPIO API
@@ -90,8 +84,16 @@ extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
/*! \brief Enables a specific module mode for a pin.
*
- * \param pin The pin number.
- * \param function The pin function.
+ * \param pin The pin number.\n
+ * Refer to the product header file `uc3x.h' (where x is the part
+ * number; e.g. x = a0512) for module pins. E.g., to enable a PWM
+ * channel output, the pin number can be AVR32_PWM_PWM_3_PIN for PWM
+ * channel 3.
+ * \param function The pin function.\n
+ * Refer to the product header file `uc3x.h' (where x is the
+ * part number; e.g. x = a0512) for module pin functions. E.g.,
+ * to enable a PWM channel output, the pin function can be
+ * AVR32_PWM_PWM_3_FUNCTION for PWM channel 3.
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
@@ -106,7 +108,12 @@ extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
/*! \brief Enables the GPIO mode of a pin.
*
- * \param pin The pin number.
+ * \param pin The pin number.\n
+ * Refer to the product header file `uc3x.h' (where x is the part
+ * number; e.g. x = a0512) for pin definitions. E.g., to enable the
+ * GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
+ * AVR32_PWM_PWM_3_PIN for PWM channel 3 can also be used to release
+ * module pins for GPIO.
*/
extern void gpio_enable_gpio_pin(unsigned int pin);
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.c b/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.c
index 71f9c706c..e6a64298a 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.c
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.c
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -42,14 +42,7 @@
*/
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "compiler.h"
#include "preprocessor.h"
#include "intc.h"
@@ -61,7 +54,7 @@ extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.
//! Each line handler table contains a set of pointers to interrupt handlers.
#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
-static volatile __int_handler _int_line_handler_table_##GRP[AVR32_INTC_NUM_IRQS_PER_GRP##GRP];
+static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);
#undef DECL_INT_LINE_HANDLER_TABLE
@@ -186,6 +179,7 @@ void INTC_init_interrupts(void)
void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev)
{
+ // Determine the group of the IRQ.
unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;
// Store in _int_line_handler_table_x the pointer to the interrupt handler, so
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.h b/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.h
index 0772d9068..93ecef436 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.h
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/INTC/intc.h
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/MACB/macb.c b/Demo/lwIP_AVR32_UC3/DRIVERS/MACB/macb.c
new file mode 100644
index 000000000..e4043a2fb
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/MACB/macb.c
@@ -0,0 +1,999 @@
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief MACB driver for EVK1100 board.
+ *
+ * This file defines a useful set of functions for the MACB interface on
+ * AVR32 devices.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 devices with a MACB module can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include
+#include
+#include
+
+
+#ifdef FREERTOS_USED
+ #include "FreeRTOS.h"
+ #include "task.h"
+ #include "semphr.h"
+#endif
+#include "macb.h"
+#include "gpio.h"
+#include "conf_eth.h"
+#include "intc.h"
+
+
+/* Size of each receive buffer - DO NOT CHANGE. */
+#define RX_BUFFER_SIZE 128
+
+
+/* The buffer addresses written into the descriptors must be aligned so the
+last few bits are zero. These bits have special meaning for the MACB
+peripheral and cannot be used as part of the address. */
+#define ADDRESS_MASK ( ( unsigned long ) 0xFFFFFFFC )
+
+/* Bit used within the address stored in the descriptor to mark the last
+descriptor in the array. */
+#define RX_WRAP_BIT ( ( unsigned long ) 0x02 )
+
+/* A short delay is used to wait for a buffer to become available, should
+one not be immediately available when trying to transmit a frame. */
+#define BUFFER_WAIT_DELAY ( 2 )
+
+#ifndef FREERTOS_USED
+#define portENTER_CRITICAL Disable_global_interrupt
+#define portEXIT_CRITICAL Enable_global_interrupt
+#define portENTER_SWITCHING_ISR()
+#define portEXIT_SWITCHING_ISR()
+#endif
+
+
+/* Buffer written to by the MACB DMA. Must be aligned as described by the
+comment above the ADDRESS_MASK definition. */
+#if __GNUC__
+static volatile char pcRxBuffer[ ETHERNET_CONF_NB_RX_BUFFERS * RX_BUFFER_SIZE ] __attribute__ ((aligned (8)));
+#elif __ICCAVR32__
+#pragma data_alignment=8
+static volatile char pcRxBuffer[ ETHERNET_CONF_NB_RX_BUFFERS * RX_BUFFER_SIZE ];
+#endif
+
+
+/* Buffer read by the MACB DMA. Must be aligned as described by the comment
+above the ADDRESS_MASK definition. */
+#if __GNUC__
+static volatile char pcTxBuffer[ ETHERNET_CONF_NB_TX_BUFFERS * ETHERNET_CONF_TX_BUFFER_SIZE ] __attribute__ ((aligned (8)));
+#elif __ICCAVR32__
+#pragma data_alignment=8
+static volatile char pcTxBuffer[ ETHERNET_CONF_NB_TX_BUFFERS * ETHERNET_CONF_TX_BUFFER_SIZE ];
+#endif
+
+/* Descriptors used to communicate between the program and the MACB peripheral.
+These descriptors hold the locations and state of the Rx and Tx buffers. */
+static volatile AVR32_TxTdDescriptor xTxDescriptors[ ETHERNET_CONF_NB_TX_BUFFERS ];
+static volatile AVR32_RxTdDescriptor xRxDescriptors[ ETHERNET_CONF_NB_RX_BUFFERS ];
+
+/* The IP and Ethernet addresses are read from the header files. */
+char cMACAddress[ 6 ] = { ETHERNET_CONF_ETHADDR0,ETHERNET_CONF_ETHADDR1,ETHERNET_CONF_ETHADDR2,ETHERNET_CONF_ETHADDR3,ETHERNET_CONF_ETHADDR4,ETHERNET_CONF_ETHADDR5 };
+
+/*-----------------------------------------------------------*/
+
+/* See the header file for descriptions of public functions. */
+
+/*
+ * Prototype for the MACB interrupt function - called by the asm wrapper.
+ */
+#ifdef FREERTOS_USED
+#if __GNUC__
+__attribute__((naked))
+#elif __ICCAVR32__
+#pragma shadow_registers = full // Naked.
+#endif
+#else
+#if __GNUC__
+__attribute__((__interrupt__))
+#elif __ICCAVR32__
+__interrupt
+#endif
+#endif
+void vMACB_ISR( void );
+static long prvMACB_ISR_NonNakedBehaviour( void );
+
+
+#if ETHERNET_CONF_USE_PHY_IT
+#ifdef FREERTOS_USED
+#if __GNUC__
+__attribute__((naked))
+#elif __ICCAVR32__
+#pragma shadow_registers = full // Naked.
+#endif
+#else
+#if __GNUC__
+__attribute__((__interrupt__))
+#elif __ICCAVR32__
+__interrupt
+#endif
+#endif
+void vPHY_ISR( void );
+static long prvPHY_ISR_NonNakedBehaviour( void );
+#endif
+
+
+/*
+ * Initialise both the Tx and Rx descriptors used by the MACB.
+ */
+static void prvSetupDescriptors(volatile avr32_macb_t * macb);
+
+/*
+ * Write our MAC address into the MACB.
+ */
+static void prvSetupMACAddress( volatile avr32_macb_t * macb );
+
+/*
+ * Configure the MACB for interrupts.
+ */
+static void prvSetupMACBInterrupt( volatile avr32_macb_t * macb );
+
+/*
+ * Some initialisation functions.
+ */
+static Bool prvProbePHY( volatile avr32_macb_t * macb );
+static unsigned long ulReadMDIO(volatile avr32_macb_t * macb, unsigned short usAddress);
+static void vWriteMDIO(volatile avr32_macb_t * macb, unsigned short usAddress, unsigned short usValue);
+
+
+#ifdef FREERTOS_USED
+/* The semaphore used by the MACB ISR to wake the MACB task. */
+static xSemaphoreHandle xSemaphore = NULL;
+#else
+static volatile Bool DataToRead = FALSE;
+#endif
+
+/* Holds the index to the next buffer from which data will be read. */
+volatile unsigned long ulNextRxBuffer = 0;
+
+
+long lMACBSend(volatile avr32_macb_t * macb, char *pcFrom, unsigned long ulLength, long lEndOfFrame )
+{
+static unsigned long uxTxBufferIndex = 0;
+char *pcBuffer;
+unsigned long ulLastBuffer, ulDataBuffered = 0, ulDataRemainingToSend, ulLengthToSend;
+
+
+ /* If the length of data to be transmitted is greater than each individual
+ transmit buffer then the data will be split into more than one buffer.
+ Loop until the entire length has been buffered. */
+ while( ulDataBuffered < ulLength )
+ {
+ // Is a buffer available ?
+ while( !( xTxDescriptors[ uxTxBufferIndex ].U_Status.status & AVR32_TRANSMIT_OK ) )
+ {
+ // There is no room to write the Tx data to the Tx buffer.
+ // Wait a short while, then try again.
+#ifdef FREERTOS_USED
+ vTaskDelay( BUFFER_WAIT_DELAY );
+#else
+ __asm__ __volatile__ ("nop");
+#endif
+ }
+
+ portENTER_CRITICAL();
+ {
+ // Get the address of the buffer from the descriptor,
+ // then copy the data into the buffer.
+ pcBuffer = ( char * ) xTxDescriptors[ uxTxBufferIndex ].addr;
+
+ // How much can we write to the buffer ?
+ ulDataRemainingToSend = ulLength - ulDataBuffered;
+ if( ulDataRemainingToSend <= ETHERNET_CONF_TX_BUFFER_SIZE )
+ {
+ // We can write all the remaining bytes.
+ ulLengthToSend = ulDataRemainingToSend;
+ }
+ else
+ {
+ // We can't write more than ETH_TX_BUFFER_SIZE in one go.
+ ulLengthToSend = ETHERNET_CONF_TX_BUFFER_SIZE;
+ }
+ // Copy the data into the buffer.
+ memcpy( ( void * ) pcBuffer, ( void * ) &( pcFrom[ ulDataBuffered ] ), ulLengthToSend );
+ ulDataBuffered += ulLengthToSend;
+ // Is this the last data for the frame ?
+ if( lEndOfFrame && ( ulDataBuffered >= ulLength ) )
+ {
+ // No more data remains for this frame so we can start the transmission.
+ ulLastBuffer = AVR32_LAST_BUFFER;
+ }
+ else
+ {
+ // More data to come for this frame.
+ ulLastBuffer = 0;
+ }
+ // Fill out the necessary in the descriptor to get the data sent,
+ // then move to the next descriptor, wrapping if necessary.
+ if( uxTxBufferIndex >= ( ETHERNET_CONF_NB_TX_BUFFERS - 1 ) )
+ {
+ xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME )
+ | ulLastBuffer
+ | AVR32_TRANSMIT_WRAP;
+ uxTxBufferIndex = 0;
+ }
+ else
+ {
+ xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME )
+ | ulLastBuffer;
+ uxTxBufferIndex++;
+ }
+ /* If this is the last buffer to be sent for this frame we can
+ start the transmission. */
+ if( ulLastBuffer )
+ {
+ macb->ncr |= AVR32_MACB_TSTART_MASK;
+ }
+ }
+ portEXIT_CRITICAL();
+ }
+
+ return PASS;
+}
+
+
+unsigned long ulMACBInputLength( void )
+{
+register unsigned long ulIndex , ulLength = 0;
+unsigned int uiTemp;
+
+ // Skip any fragments. We are looking for the first buffer that contains
+ // data and has the SOF (start of frame) bit set.
+ while( ( xRxDescriptors[ ulNextRxBuffer ].addr & AVR32_OWNERSHIP_BIT ) && !( xRxDescriptors[ ulNextRxBuffer ].U_Status.status & AVR32_SOF ) )
+ {
+ // Ignoring this buffer. Mark it as free again.
+ uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr;
+ xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT );
+ ulNextRxBuffer++;
+ if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS )
+ {
+ ulNextRxBuffer = 0;
+ }
+ }
+
+ // We are going to walk through the descriptors that make up this frame,
+ // but don't want to alter ulNextRxBuffer as this would prevent vMACBRead()
+ // from finding the data. Therefore use a copy of ulNextRxBuffer instead.
+ ulIndex = ulNextRxBuffer;
+
+ // Walk through the descriptors until we find the last buffer for this frame.
+ // The last buffer will give us the length of the entire frame.
+ while( ( xRxDescriptors[ ulIndex ].addr & AVR32_OWNERSHIP_BIT ) && !ulLength )
+ {
+ ulLength = xRxDescriptors[ ulIndex ].U_Status.status & AVR32_LENGTH_FRAME;
+ // Increment to the next buffer, wrapping if necessary.
+ ulIndex++;
+ if( ulIndex >= ETHERNET_CONF_NB_RX_BUFFERS )
+ {
+ ulIndex = 0;
+ }
+ }
+ return ulLength;
+}
+/*-----------------------------------------------------------*/
+
+void vMACBRead( char *pcTo, unsigned long ulSectionLength, unsigned long ulTotalFrameLength )
+{
+static unsigned long ulSectionBytesReadSoFar = 0, ulBufferPosition = 0, ulFameBytesReadSoFar = 0;
+static char *pcSource;
+register unsigned long ulBytesRemainingInBuffer, ulRemainingSectionBytes;
+unsigned int uiTemp;
+
+ // Read ulSectionLength bytes from the Rx buffers.
+ // This is not necessarily any correspondence between the length of our Rx buffers,
+ // and the length of the data we are returning or the length of the data being requested.
+ // Therefore, between calls we have to remember not only which buffer we are currently
+ // processing, but our position within that buffer.
+ // This would be greatly simplified if PBUF_POOL_BUFSIZE could be guaranteed to be greater
+ // than the size of each Rx buffer, and that memory fragmentation did not occur.
+
+ // This function should only be called after a call to ulMACBInputLength().
+ // This will ensure ulNextRxBuffer is set to the correct buffer. */
+
+ // vMACBRead is called with pcTo set to NULL to indicate that we are about
+ // to read a new frame. Any fragments remaining in the frame we were
+ // processing during the last call should be dropped.
+ if( pcTo == NULL )
+ {
+ // How many bytes are indicated as being in this buffer?
+ // If none then the buffer is completely full and the frame is contained within more
+ // than one buffer.
+ // Reset our state variables ready for the next read from this buffer.
+ pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK );
+ ulFameBytesReadSoFar = ( unsigned long ) 0;
+ ulBufferPosition = ( unsigned long ) 0;
+ }
+ else
+ {
+ // Loop until we have obtained the required amount of data.
+ ulSectionBytesReadSoFar = 0;
+ while( ulSectionBytesReadSoFar < ulSectionLength )
+ {
+ // We may have already read some data from this buffer.
+ // How much data remains in the buffer?
+ ulBytesRemainingInBuffer = ( RX_BUFFER_SIZE - ulBufferPosition );
+
+ // How many more bytes do we need to read before we have the
+ // required amount of data?
+ ulRemainingSectionBytes = ulSectionLength - ulSectionBytesReadSoFar;
+
+ // Do we want more data than remains in the buffer?
+ if( ulRemainingSectionBytes > ulBytesRemainingInBuffer )
+ {
+ // We want more data than remains in the buffer so we can
+ // write the remains of the buffer to the destination, then move
+ // onto the next buffer to get the rest.
+ memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulBytesRemainingInBuffer );
+ ulSectionBytesReadSoFar += ulBytesRemainingInBuffer;
+ ulFameBytesReadSoFar += ulBytesRemainingInBuffer;
+
+ // Mark the buffer as free again.
+ uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr;
+ xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT );
+ // Move onto the next buffer.
+ ulNextRxBuffer++;
+
+ if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS )
+ {
+ ulNextRxBuffer = ( unsigned long ) 0;
+ }
+
+ // Reset the variables for the new buffer.
+ pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK );
+ ulBufferPosition = ( unsigned long ) 0;
+ }
+ else
+ {
+ // We have enough data in this buffer to send back.
+ // Read out enough data and remember how far we read up to.
+ memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulRemainingSectionBytes );
+
+ // There may be more data in this buffer yet.
+ // Increment our position in this buffer past the data we have just read.
+ ulBufferPosition += ulRemainingSectionBytes;
+ ulSectionBytesReadSoFar += ulRemainingSectionBytes;
+ ulFameBytesReadSoFar += ulRemainingSectionBytes;
+
+ // Have we now finished with this buffer?
+ if( ( ulBufferPosition >= RX_BUFFER_SIZE ) || ( ulFameBytesReadSoFar >= ulTotalFrameLength ) )
+ {
+ // Mark the buffer as free again.
+ uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr;
+ xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT );
+ // Move onto the next buffer.
+ ulNextRxBuffer++;
+
+ if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS )
+ {
+ ulNextRxBuffer = 0;
+ }
+
+ pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK );
+ ulBufferPosition = 0;
+ }
+ }
+ }
+ }
+}
+/*-----------------------------------------------------------*/
+void vMACBSetMACAddress(const char * MACAddress)
+{
+ memcpy(cMACAddress, MACAddress, sizeof(cMACAddress));
+}
+
+Bool xMACBInit( volatile avr32_macb_t * macb )
+{
+volatile unsigned long status;
+
+ // set up registers
+ macb->ncr = 0;
+ macb->tsr = ~0UL;
+ macb->rsr = ~0UL;
+ macb->idr = ~0UL;
+ status = macb->isr;
+
+
+#if ETHERNET_CONF_USE_RMII_INTERFACE
+ // RMII used, set 0 to the USRIO Register
+ macb->usrio &= ~AVR32_MACB_RMII_MASK;
+#else
+ // RMII not used, set 1 to the USRIO Register
+ macb->usrio |= AVR32_MACB_RMII_MASK;
+#endif
+
+ // Load our MAC address into the MACB.
+ prvSetupMACAddress(macb);
+
+ // Setup the buffers and descriptors.
+ prvSetupDescriptors(macb);
+
+#if ETHERNET_CONF_SYSTEM_CLOCK <= 20000000
+ macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV8 << AVR32_MACB_NCFGR_CLK_OFFSET);
+#elif ETHERNET_CONF_SYSTEM_CLOCK <= 40000000
+ macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV16 << AVR32_MACB_NCFGR_CLK_OFFSET);
+#elif ETHERNET_CONF_SYSTEM_CLOCK <= 80000000
+ macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV32 << AVR32_MACB_NCFGR_CLK_OFFSET;
+#elif ETHERNET_CONF_SYSTEM_CLOCK <= 160000000
+ macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV64 << AVR32_MACB_NCFGR_CLK_OFFSET;
+#else
+# error System clock too fast
+#endif
+
+ // Are we connected?
+ if( prvProbePHY(macb) == TRUE )
+ {
+ // Enable the interrupt!
+ portENTER_CRITICAL();
+ {
+ prvSetupMACBInterrupt(macb);
+ }
+ portEXIT_CRITICAL();
+ // Enable Rx and Tx, plus the stats register.
+ macb->ncr = AVR32_MACB_NCR_TE_MASK | AVR32_MACB_NCR_RE_MASK;
+ return (TRUE);
+ }
+ return (FALSE);
+}
+
+void vDisableMACBOperations(volatile avr32_macb_t * macb)
+{
+#if ETHERNET_CONF_USE_PHY_IT
+volatile avr32_gpio_t *gpio = &AVR32_GPIO;
+volatile avr32_gpio_port_t *gpio_port = &gpio->port[MACB_INTERRUPT_PIN/32];
+
+ gpio_port->ierc = 1 << (MACB_INTERRUPT_PIN%32);
+#endif
+
+ // write the MACB control register : disable Tx & Rx
+ macb->ncr &= ~((1 << AVR32_MACB_RE_OFFSET) | (1 << AVR32_MACB_TE_OFFSET));
+ // We no more want to interrupt on Rx and Tx events.
+ macb->idr = AVR32_MACB_IER_RCOMP_MASK | AVR32_MACB_IER_TCOMP_MASK;
+}
+
+
+void vClearMACBTxBuffer( void )
+{
+static unsigned long uxNextBufferToClear = 0;
+
+ // Called on Tx interrupt events to set the AVR32_TRANSMIT_OK bit in each
+ // Tx buffer within the frame just transmitted. This marks all the buffers
+ // as available again.
+
+ // The first buffer in the frame should have the bit set automatically. */
+ if( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_TRANSMIT_OK )
+ {
+ // Loop through the other buffers in the frame.
+ while( !( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_LAST_BUFFER ) )
+ {
+ uxNextBufferToClear++;
+
+ if( uxNextBufferToClear >= ETHERNET_CONF_NB_TX_BUFFERS )
+ {
+ uxNextBufferToClear = 0;
+ }
+
+ xTxDescriptors[ uxNextBufferToClear ].U_Status.status |= AVR32_TRANSMIT_OK;
+ }
+
+ // Start with the next buffer the next time a Tx interrupt is called.
+ uxNextBufferToClear++;
+
+ // Do we need to wrap back to the first buffer?
+ if( uxNextBufferToClear >= ETHERNET_CONF_NB_TX_BUFFERS )
+ {
+ uxNextBufferToClear = 0;
+ }
+ }
+}
+
+static void prvSetupDescriptors(volatile avr32_macb_t * macb)
+{
+unsigned long xIndex;
+unsigned long ulAddress;
+
+ // Initialise xRxDescriptors descriptor.
+ for( xIndex = 0; xIndex < ETHERNET_CONF_NB_RX_BUFFERS; ++xIndex )
+ {
+ // Calculate the address of the nth buffer within the array.
+ ulAddress = ( unsigned long )( pcRxBuffer + ( xIndex * RX_BUFFER_SIZE ) );
+
+ // Write the buffer address into the descriptor.
+ // The DMA will place the data at this address when this descriptor is being used.
+ // Mask off the bottom bits of the address as these have special meaning.
+ xRxDescriptors[ xIndex ].addr = ulAddress & ADDRESS_MASK;
+ }
+
+ // The last buffer has the wrap bit set so the MACB knows to wrap back
+ // to the first buffer.
+ xRxDescriptors[ ETHERNET_CONF_NB_RX_BUFFERS - 1 ].addr |= RX_WRAP_BIT;
+
+ // Initialise xTxDescriptors.
+ for( xIndex = 0; xIndex < ETHERNET_CONF_NB_TX_BUFFERS; ++xIndex )
+ {
+ // Calculate the address of the nth buffer within the array.
+ ulAddress = ( unsigned long )( pcTxBuffer + ( xIndex * ETHERNET_CONF_TX_BUFFER_SIZE ) );
+
+ // Write the buffer address into the descriptor.
+ // The DMA will read data from here when the descriptor is being used.
+ xTxDescriptors[ xIndex ].addr = ulAddress & ADDRESS_MASK;
+ xTxDescriptors[ xIndex ].U_Status.status = AVR32_TRANSMIT_OK;
+ }
+
+ // The last buffer has the wrap bit set so the MACB knows to wrap back
+ // to the first buffer.
+ xTxDescriptors[ ETHERNET_CONF_NB_TX_BUFFERS - 1 ].U_Status.status = AVR32_TRANSMIT_WRAP | AVR32_TRANSMIT_OK;
+
+ // Tell the MACB where to find the descriptors.
+ macb->rbqp = ( unsigned long )xRxDescriptors;
+ macb->tbqp = ( unsigned long )xTxDescriptors;
+
+ // Enable the copy of data into the buffers, ignore broadcasts,
+ // and don't copy FCS.
+ macb->ncfgr |= (AVR32_MACB_CAF_MASK | AVR32_MACB_NBC_MASK | AVR32_MACB_NCFGR_DRFCS_MASK);
+
+}
+
+static void prvSetupMACAddress( volatile avr32_macb_t * macb )
+{
+ // Must be written SA1L then SA1H.
+ macb->sa1b = ( ( unsigned long ) cMACAddress[ 3 ] << 24 ) |
+ ( ( unsigned long ) cMACAddress[ 2 ] << 16 ) |
+ ( ( unsigned long ) cMACAddress[ 1 ] << 8 ) |
+ cMACAddress[ 0 ];
+
+ macb->sa1t = ( ( unsigned long ) cMACAddress[ 5 ] << 8 ) |
+ cMACAddress[ 4 ];
+}
+
+static void prvSetupMACBInterrupt( volatile avr32_macb_t * macb )
+{
+#ifdef FREERTOS_USED
+ // Create the semaphore used to trigger the MACB task.
+ if (xSemaphore == NULL)
+ {
+ vSemaphoreCreateBinary( xSemaphore );
+ }
+#else
+ // Create the flag used to trigger the MACB polling task.
+ DataToRead = FALSE;
+#endif
+
+
+#ifdef FREERTOS_USED
+ if( xSemaphore != NULL)
+ {
+ // We start by 'taking' the semaphore so the ISR can 'give' it when the
+ // first interrupt occurs.
+ xSemaphoreTake( xSemaphore, 0 );
+#endif
+ // Setup the interrupt for MACB.
+ // Register the interrupt handler to the interrupt controller at interrupt level 2
+ INTC_register_interrupt((__int_handler)&vMACB_ISR, AVR32_MACB_IRQ, INT2);
+
+#if ETHERNET_CONF_USE_PHY_IT
+ /* GPIO enable interrupt upon rising edge */
+ gpio_enable_pin_interrupt(MACB_INTERRUPT_PIN, GPIO_FALLING_EDGE);
+ // Setup the interrupt for PHY.
+ // Register the interrupt handler to the interrupt controller at interrupt level 2
+ INTC_register_interrupt((__int_handler)&vPHY_ISR, (AVR32_GPIO_IRQ_0 + (MACB_INTERRUPT_PIN/8)), INT2);
+ /* enable interrupts on INT pin */
+ vWriteMDIO( macb, PHY_MICR , ( MICR_INTEN | MICR_INTOE ));
+ /* enable "link change" interrupt for Phy */
+ vWriteMDIO( macb, PHY_MISR , MISR_LINK_INT_EN );
+#endif
+
+ // We want to interrupt on Rx and Tx events
+ macb->ier = AVR32_MACB_IER_RCOMP_MASK | AVR32_MACB_IER_TCOMP_MASK;
+#ifdef FREERTOS_USED
+ }
+#endif
+}
+
+/*! Read a register on MDIO bus (access to the PHY)
+ * This function is looping until PHY gets ready
+ *
+ * \param macb Input. instance of the MACB to use
+ * \param usAddress Input. register to set.
+ *
+ * \return unsigned long data that has been read
+ */
+static unsigned long ulReadMDIO(volatile avr32_macb_t * macb, unsigned short usAddress)
+{
+unsigned long value, status;
+
+ // initiate transaction : enable management port
+ macb->ncr |= AVR32_MACB_NCR_MPE_MASK;
+ // Write the PHY configuration frame to the MAN register
+ macb->man = (AVR32_MACB_SOF_MASK & (0x01<nsr;
+ } while (!(status & AVR32_MACB_NSR_IDLE_MASK));
+ // read the register value in maintenance register
+ value = macb->man & 0x0000ffff;
+ // disable management port
+ macb->ncr &= ~AVR32_MACB_NCR_MPE_MASK;
+ // return the read value
+ return (value);
+}
+
+/*! Write a given value to a register on MDIO bus (access to the PHY)
+ * This function is looping until PHY gets ready
+ *
+ * \param *macb Input. instance of the MACB to use
+ * \param usAddress Input. register to set.
+ * \param usValue Input. value to write.
+ *
+ */
+static void vWriteMDIO(volatile avr32_macb_t * macb, unsigned short usAddress, unsigned short usValue)
+{
+unsigned long status;
+
+ // initiate transaction : enable management port
+ macb->ncr |= AVR32_MACB_NCR_MPE_MASK;
+ // Write the PHY configuration frame to the MAN register
+ macb->man = (( AVR32_MACB_SOF_MASK & (0x01<nsr;
+ } while (!(status & AVR32_MACB_NSR_IDLE_MASK));
+ // disable management port
+ macb->ncr &= ~AVR32_MACB_NCR_MPE_MASK;
+}
+
+static Bool prvProbePHY( volatile avr32_macb_t * macb )
+{
+volatile unsigned long mii_status, phy_ctrl;
+volatile unsigned long config;
+unsigned long upper, lower, mode, advertise, lpa;
+volatile unsigned long physID;
+
+ // Read Phy Identifier register 1 & 2
+ lower = ulReadMDIO(macb, PHY_PHYSID2);
+ upper = ulReadMDIO(macb, PHY_PHYSID1);
+ // get Phy ID, ignore Revision
+ physID = ((upper << 16) & 0xFFFF0000) | (lower & 0xFFF0);
+ // check if it match config
+ if (physID == ETHERNET_CONF_PHY_ID)
+ {
+ // read RBR
+ mode = ulReadMDIO(macb, PHY_RBR);
+ // set RMII mode if not done
+ if ((mode & RBR_RMII) != RBR_RMII)
+ {
+ // force RMII flag if strap options are wrong
+ mode |= RBR_RMII;
+ vWriteMDIO(macb, PHY_RBR, mode);
+ }
+
+ // set advertise register
+#if ETHERNET_CONF_AN_ENABLE == 1
+ advertise = ADVERTISE_CSMA | ADVERTISE_ALL;
+#else
+ advertise = ADVERTISE_CSMA;
+ #if ETHERNET_CONF_USE_100MB
+ #if ETHERNET_CONF_USE_FULL_DUPLEX
+ advertise |= ADVERTISE_100FULL;
+ #else
+ advertise |= ADVERTISE_100HALF;
+ #endif
+ #else
+ #if ETHERNET_CONF_USE_FULL_DUPLEX
+ advertise |= ADVERTISE_10FULL;
+ #else
+ advertise |= ADVERTISE_10HALF;
+ #endif
+ #endif
+#endif
+ // write advertise register
+ vWriteMDIO(macb, PHY_ADVERTISE, advertise);
+ // read Control register
+ config = ulReadMDIO(macb, PHY_BMCR);
+ // read Phy Control register
+ phy_ctrl = ulReadMDIO(macb, PHY_PHYCR);
+#if ETHERNET_CONF_AN_ENABLE
+ #if ETHERNET_CONF_AUTO_CROSS_ENABLE
+ // enable Auto MDIX
+ phy_ctrl |= PHYCR_MDIX_EN;
+ #else
+ // disable Auto MDIX
+ phy_ctrl &= ~PHYCR_MDIX_EN;
+ #if ETHERNET_CONF_CROSSED_LINK
+ // force direct link = Use crossed RJ45 cable
+ phy_ctrl &= ~PHYCR_MDIX_FORCE;
+ #else
+ // force crossed link = Use direct RJ45 cable
+ phy_ctrl |= PHYCR_MDIX_FORCE;
+ #endif
+ #endif
+ // reset auto-negociation capability
+ config |= (BMCR_ANRESTART | BMCR_ANENABLE);
+#else
+ // disable Auto MDIX
+ phy_ctrl &= ~PHYCR_MDIX_EN;
+ #if ETHERNET_CONF_CROSSED_LINK
+ // force direct link = Use crossed RJ45 cable
+ phy_ctrl &= ~PHYCR_MDIX_FORCE;
+ #else
+ // force crossed link = Use direct RJ45 cable
+ phy_ctrl |= PHYCR_MDIX_FORCE;
+ #endif
+ // clear AN bit
+ config &= ~BMCR_ANENABLE;
+
+ #if ETHERNET_CONF_USE_100MB
+ config |= BMCR_SPEED100;
+ #else
+ config &= ~BMCR_SPEED100;
+ #endif
+ #if ETHERNET_CONF_USE_FULL_DUPLEX
+ config |= BMCR_FULLDPLX;
+ #else
+ config &= ~BMCR_FULLDPLX;
+ #endif
+#endif
+ // update Phy ctrl register
+ vWriteMDIO(macb, PHY_PHYCR, phy_ctrl);
+
+ // update ctrl register
+ vWriteMDIO(macb, PHY_BMCR, config);
+
+ // loop while link status isn't OK
+ do {
+ mii_status = ulReadMDIO(macb, PHY_BMSR);
+ } while (!(mii_status & BMSR_LSTATUS));
+
+ // read the LPA configuration of the PHY
+ lpa = ulReadMDIO(macb, PHY_LPA);
+
+ // read the MACB config register
+ config = AVR32_MACB.ncfgr;
+
+ // if 100MB needed
+ if ((lpa & advertise) & (LPA_100HALF | LPA_100FULL))
+ {
+ config |= AVR32_MACB_SPD_MASK;
+ }
+ else
+ {
+ config &= ~(AVR32_MACB_SPD_MASK);
+ }
+
+ // if FULL DUPLEX needed
+ if ((lpa & advertise) & (LPA_10FULL | LPA_100FULL))
+ {
+ config |= AVR32_MACB_FD_MASK;
+ }
+ else
+ {
+ config &= ~(AVR32_MACB_FD_MASK);
+ }
+
+ // write the MACB config register
+ macb->ncfgr = config;
+
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+void vMACBWaitForInput( unsigned long ulTimeOut )
+{
+#ifdef FREERTOS_USED
+ // Just wait until we are signled from an ISR that data is available, or
+ // we simply time out.
+ xSemaphoreTake( xSemaphore, ulTimeOut );
+#else
+unsigned long i;
+ gpio_clr_gpio_pin(LED0_GPIO);
+ i = ulTimeOut * 1000;
+ // wait for an interrupt to occurs
+ do
+ {
+ if ( DataToRead == TRUE )
+ {
+ // IT occurs, reset interrupt flag
+ portENTER_CRITICAL();
+ DataToRead = FALSE;
+ portEXIT_CRITICAL();
+ break;
+ }
+ i--;
+ }
+ while(i != 0);
+ gpio_set_gpio_pin(LED0_GPIO);
+#endif
+}
+
+
+/*
+ * The MACB ISR. Handles both Tx and Rx complete interrupts.
+ */
+#ifdef FREERTOS_USED
+#if __GNUC__
+__attribute__((naked))
+#elif __ICCAVR32__
+#pragma shadow_registers = full // Naked.
+#endif
+#else
+#if __GNUC__
+__attribute__((__interrupt__))
+#elif __ICCAVR32__
+__interrupt
+#endif
+#endif
+void vMACB_ISR( void )
+{
+ // This ISR can cause a context switch, so the first statement must be a
+ // call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
+ // variable declarations.
+ portENTER_SWITCHING_ISR();
+
+ // the return value is used by FreeRTOS to change the context if needed after rete instruction
+ // in standalone use, this value should be ignored
+ prvMACB_ISR_NonNakedBehaviour();
+
+ // Exit the ISR. If a task was woken by either a character being received
+ // or transmitted then a context switch will occur.
+ portEXIT_SWITCHING_ISR();
+}
+/*-----------------------------------------------------------*/
+
+#if __GNUC__
+__attribute__((__noinline__))
+#elif __ICCAVR32__
+#pragma optimize = no_inline
+#endif
+static long prvMACB_ISR_NonNakedBehaviour( void )
+{
+
+ // Variable definitions can be made now.
+ volatile unsigned long ulIntStatus, ulEventStatus;
+ long xSwitchRequired = FALSE;
+
+ // Find the cause of the interrupt.
+ ulIntStatus = AVR32_MACB.isr;
+ ulEventStatus = AVR32_MACB.rsr;
+
+ if( ( ulIntStatus & AVR32_MACB_IDR_RCOMP_MASK ) || ( ulEventStatus & AVR32_MACB_REC_MASK ) )
+ {
+ // A frame has been received, signal the IP task so it can process
+ // the Rx descriptors.
+ portENTER_CRITICAL();
+#ifdef FREERTOS_USED
+ xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, FALSE );
+#else
+ DataToRead = TRUE;
+#endif
+ portEXIT_CRITICAL();
+ AVR32_MACB.rsr = AVR32_MACB_REC_MASK;
+ AVR32_MACB.rsr;
+ }
+
+ if( ulIntStatus & AVR32_MACB_TCOMP_MASK )
+ {
+ // A frame has been transmitted. Mark all the buffers used by the
+ // frame just transmitted as free again.
+ vClearMACBTxBuffer();
+ AVR32_MACB.tsr = AVR32_MACB_TSR_COMP_MASK;
+ AVR32_MACB.tsr;
+ }
+
+ return ( xSwitchRequired );
+}
+
+
+
+#if ETHERNET_CONF_USE_PHY_IT
+/*
+ * The PHY ISR. Handles Phy interrupts.
+ */
+#ifdef FREERTOS_USED
+#if __GNUC__
+__attribute__((naked))
+#elif __ICCAVR32__
+#pragma shadow_registers = full // Naked.
+#endif
+#else
+#if __GNUC__
+__attribute__((__interrupt__))
+#elif __ICCAVR32__
+__interrupt
+#endif
+#endif
+void vPHY_ISR( void )
+{
+ // This ISR can cause a context switch, so the first statement must be a
+ // call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
+ // variable declarations.
+ portENTER_SWITCHING_ISR();
+
+ // the return value is used by FreeRTOS to change the context if needed after rete instruction
+ // in standalone use, this value should be ignored
+ prvPHY_ISR_NonNakedBehaviour();
+
+ // Exit the ISR. If a task was woken by either a character being received
+ // or transmitted then a context switch will occur.
+ portEXIT_SWITCHING_ISR();
+}
+/*-----------------------------------------------------------*/
+
+#if __GNUC__
+__attribute__((__noinline__))
+#elif __ICCAVR32__
+#pragma optimize = no_inline
+#endif
+static long prvPHY_ISR_NonNakedBehaviour( void )
+{
+
+ // Variable definitions can be made now.
+ volatile unsigned long ulIntStatus, ulEventStatus;
+ long xSwitchRequired = FALSE;
+ volatile avr32_gpio_t *gpio = &AVR32_GPIO;
+ volatile avr32_gpio_port_t *gpio_port = &gpio->port[MACB_INTERRUPT_PIN/32];
+
+ // read Phy Interrupt register Status
+ ulIntStatus = ulReadMDIO(&AVR32_MACB, PHY_MISR);
+
+ // read Phy status register
+ ulEventStatus = ulReadMDIO(&AVR32_MACB, PHY_BMSR);
+ // dummy read
+ ulEventStatus = ulReadMDIO(&AVR32_MACB, PHY_BMSR);
+
+ // clear interrupt flag on GPIO
+ gpio_port->ifrc = 1 << (MACB_INTERRUPT_PIN%32);
+
+ return ( xSwitchRequired );
+}
+#endif
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/MACB/macb.h b/Demo/lwIP_AVR32_UC3/DRIVERS/MACB/macb.h
new file mode 100644
index 000000000..f29b4c0ba
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/MACB/macb.h
@@ -0,0 +1,422 @@
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief MACB example driver for EVK1100 board.
+ *
+ * This file defines a useful set of functions for the MACB interface on
+ * AVR32 devices.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 devices with a MACB module can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef AVR32_MACB_H
+#define AVR32_MACB_H
+
+#include
+
+#ifdef FREERTOS_USED
+#include
+#endif
+
+#include "conf_eth.h"
+
+/*! \name Rx Ring descriptor flags
+ */
+//! @{
+#define AVR32_MACB_RX_USED_OFFSET 0
+#define AVR32_MACB_RX_USED_SIZE 1
+#define AVR32_MACB_RX_WRAP_OFFSET 1
+#define AVR32_MACB_RX_WRAP_SIZE 1
+#define AVR32_MACB_RX_LEN_OFFSET 0
+#define AVR32_MACB_RX_LEN_SIZE 12
+#define AVR32_MACB_RX_OFFSET_OFFSET 12
+#define AVR32_MACB_RX_OFFSET_SIZE 2
+#define AVR32_MACB_RX_SOF_OFFSET 14
+#define AVR32_MACB_RX_SOF_SIZE 1
+#define AVR32_MACB_RX_EOF_OFFSET 15
+#define AVR32_MACB_RX_EOF_SIZE 1
+#define AVR32_MACB_RX_CFI_OFFSET 16
+#define AVR32_MACB_RX_CFI_SIZE 1
+//! @}
+
+/*! \name Tx Ring descriptor flags
+ */
+//! @{
+#define AVR32_MACB_TX_LEN_OFFSET 0
+#define AVR32_MACB_TX_LEN_SIZE 11
+#define AVR32_MACB_TX_EOF_OFFSET 15
+#define AVR32_MACB_TX_EOF_SIZE 1
+#define AVR32_MACB_TX_NOCRC_OFFSET 16
+#define AVR32_MACB_TX_NOCRC_SIZE 1
+#define AVR32_MACB_TX_EMF_OFFSET 27
+#define AVR32_MACB_TX_EMF_SIZE 1
+#define AVR32_MACB_TX_UNR_OFFSET 28
+#define AVR32_MACB_TX_UNR_SIZE 1
+#define AVR32_MACB_TX_MAXRETRY_OFFSET 29
+#define AVR32_MACB_TX_MAXRETRY_SIZE 1
+#define AVR32_MACB_TX_WRAP_OFFSET 30
+#define AVR32_MACB_TX_WRAP_SIZE 1
+#define AVR32_MACB_TX_USED_OFFSET 31
+#define AVR32_MACB_TX_USED_SIZE 1
+//! @}
+
+/*! \name Generic MII registers.
+ */
+//! @{
+#define PHY_BMCR 0x00 //!< Basic mode control register
+#define PHY_BMSR 0x01 //!< Basic mode status register
+#define PHY_PHYSID1 0x02 //!< PHYS ID 1
+#define PHY_PHYSID2 0x03 //!< PHYS ID 2
+#define PHY_ADVERTISE 0x04 //!< Advertisement control reg
+#define PHY_LPA 0x05 //!< Link partner ability reg
+//! @}
+
+#if BOARD == EVK1100
+/*! \name Extended registers for DP83848
+ */
+//! @{
+#define PHY_RBR 0x17 //!< RMII Bypass reg
+#define PHY_MICR 0x11 //!< Interrupt Control reg
+#define PHY_MISR 0x12 //!< Interrupt Status reg
+#define PHY_PHYCR 0x19 //!< Phy CTRL reg
+//! @}
+#endif
+
+
+/*! \name Basic mode control register.
+ */
+//! @{
+#define BMCR_RESV 0x007f //!< Unused...
+#define BMCR_CTST 0x0080 //!< Collision test
+#define BMCR_FULLDPLX 0x0100 //!< Full duplex
+#define BMCR_ANRESTART 0x0200 //!< Auto negotiation restart
+#define BMCR_ISOLATE 0x0400 //!< Disconnect PHY from MII
+#define BMCR_PDOWN 0x0800 //!< Powerdown the PHY
+#define BMCR_ANENABLE 0x1000 //!< Enable auto negotiation
+#define BMCR_SPEED100 0x2000 //!< Select 100Mbps
+#define BMCR_LOOPBACK 0x4000 //!< TXD loopback bits
+#define BMCR_RESET 0x8000 //!< Reset the PHY
+//! @}
+
+/*! \name Basic mode status register.
+ */
+//! @{
+#define BMSR_ERCAP 0x0001 //!< Ext-reg capability
+#define BMSR_JCD 0x0002 //!< Jabber detected
+#define BMSR_LSTATUS 0x0004 //!< Link status
+#define BMSR_ANEGCAPABLE 0x0008 //!< Able to do auto-negotiation
+#define BMSR_RFAULT 0x0010 //!< Remote fault detected
+#define BMSR_ANEGCOMPLETE 0x0020 //!< Auto-negotiation complete
+#define BMSR_RESV 0x00c0 //!< Unused...
+#define BMSR_ESTATEN 0x0100 //!< Extended Status in R15
+#define BMSR_100FULL2 0x0200 //!< Can do 100BASE-T2 HDX
+#define BMSR_100HALF2 0x0400 //!< Can do 100BASE-T2 FDX
+#define BMSR_10HALF 0x0800 //!< Can do 10mbps, half-duplex
+#define BMSR_10FULL 0x1000 //!< Can do 10mbps, full-duplex
+#define BMSR_100HALF 0x2000 //!< Can do 100mbps, half-duplex
+#define BMSR_100FULL 0x4000 //!< Can do 100mbps, full-duplex
+#define BMSR_100BASE4 0x8000 //!< Can do 100mbps, 4k packets
+//! @}
+
+/*! \name Advertisement control register.
+ */
+//! @{
+#define ADVERTISE_SLCT 0x001f //!< Selector bits
+#define ADVERTISE_CSMA 0x0001 //!< Only selector supported
+#define ADVERTISE_10HALF 0x0020 //!< Try for 10mbps half-duplex
+#define ADVERTISE_1000XFULL 0x0020 //!< Try for 1000BASE-X full-duplex
+#define ADVERTISE_10FULL 0x0040 //!< Try for 10mbps full-duplex
+#define ADVERTISE_1000XHALF 0x0040 //!< Try for 1000BASE-X half-duplex
+#define ADVERTISE_100HALF 0x0080 //!< Try for 100mbps half-duplex
+#define ADVERTISE_1000XPAUSE 0x0080 //!< Try for 1000BASE-X pause
+#define ADVERTISE_100FULL 0x0100 //!< Try for 100mbps full-duplex
+#define ADVERTISE_1000XPSE_ASYM 0x0100 //!< Try for 1000BASE-X asym pause
+#define ADVERTISE_100BASE4 0x0200 //!< Try for 100mbps 4k packets
+#define ADVERTISE_PAUSE_CAP 0x0400 //!< Try for pause
+#define ADVERTISE_PAUSE_ASYM 0x0800 //!< Try for asymetric pause
+#define ADVERTISE_RESV 0x1000 //!< Unused...
+#define ADVERTISE_RFAULT 0x2000 //!< Say we can detect faults
+#define ADVERTISE_LPACK 0x4000 //!< Ack link partners response
+#define ADVERTISE_NPAGE 0x8000 //!< Next page bit
+//! @}
+
+#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | ADVERTISE_CSMA)
+#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
+ ADVERTISE_100HALF | ADVERTISE_100FULL)
+
+/*! \name Link partner ability register.
+ */
+//! @{
+#define LPA_SLCT 0x001f //!< Same as advertise selector
+#define LPA_10HALF 0x0020 //!< Can do 10mbps half-duplex
+#define LPA_1000XFULL 0x0020 //!< Can do 1000BASE-X full-duplex
+#define LPA_10FULL 0x0040 //!< Can do 10mbps full-duplex
+#define LPA_1000XHALF 0x0040 //!< Can do 1000BASE-X half-duplex
+#define LPA_100HALF 0x0080 //!< Can do 100mbps half-duplex
+#define LPA_1000XPAUSE 0x0080 //!< Can do 1000BASE-X pause
+#define LPA_100FULL 0x0100 //!< Can do 100mbps full-duplex
+#define LPA_1000XPAUSE_ASYM 0x0100 //!< Can do 1000BASE-X pause asym
+#define LPA_100BASE4 0x0200 //!< Can do 100mbps 4k packets
+#define LPA_PAUSE_CAP 0x0400 //!< Can pause
+#define LPA_PAUSE_ASYM 0x0800 //!< Can pause asymetrically
+#define LPA_RESV 0x1000 //!< Unused...
+#define LPA_RFAULT 0x2000 //!< Link partner faulted
+#define LPA_LPACK 0x4000 //!< Link partner acked us
+#define LPA_NPAGE 0x8000 //!< Next page bit
+
+#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
+#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
+//! @}
+
+#if BOARD == EVK1100
+/*! RMII Bypass Register */
+#define RBR_RMII 0x0020 //!< RMII Mode
+/*! \name Interrupt Ctrl Register.
+ */
+//! @{
+#define MICR_INTEN 0x0002 //!< Enable interrupts
+#define MICR_INTOE 0x0001 //!< Enable INT output
+//! @}
+
+/*! \name Interrupt Status Register.
+ */
+//! @{
+#define MISR_ED_INT_EN 0x0040 //!< Energy Detect enabled
+#define MISR_LINK_INT_EN 0x0020 //!< Link status change enabled
+#define MISR_SPD_INT_EN 0x0010 //!< Speed change enabled
+#define MISR_DP_INT_EN 0x0008 //!< Duplex mode change enabled
+#define MISR_ANC_INT_EN 0x0004 //!< Auto-Neg complete enabled
+#define MISR_FHF_INT_EN 0x0002 //!< False Carrier enabled
+#define MISR_RHF_INT_EN 0x0001 //!< Receive Error enabled
+#define MISR_ED_INT 0x4000 //!< Energy Detect
+#define MISR_LINK_INT 0x2000 //!< Link status change
+#define MISR_SPD_INT 0x1000 //!< Speed change
+#define MISR_DP_INT 0x0800 //!< Duplex mode change
+#define MISR_ANC_INT 0x0400 //!< Auto-Neg complete
+#define MISR_FHF_INT 0x0200 //!< False Carrier
+#define MISR_RHF_INT 0x0100 //!< Receive Error
+//! @}
+
+/*! \name Phy Ctrl Register.
+ */
+//! @{
+#define PHYCR_MDIX_EN 0x8000 //!< Enable Auto MDIX
+#define PHYCR_MDIX_FORCE 0x4000 //!< Force MDIX crossed
+//! @}
+#endif
+
+/*! Packet structure.
+ */
+//! @{
+typedef struct
+{
+ char *data;
+ unsigned int len;
+} macb_packet_t;
+//! @}
+
+/*! Receive Transfer descriptor structure.
+ */
+//! @{
+typedef struct _AVR32_RxTdDescriptor {
+ unsigned int addr;
+ union
+ {
+ unsigned int status;
+ struct {
+ unsigned int BroadCast:1;
+ unsigned int MultiCast:1;
+ unsigned int UniCast:1;
+ unsigned int ExternalAdd:1;
+ unsigned int Res1:1;
+ unsigned int Sa1Match:1;
+ unsigned int Sa2Match:1;
+ unsigned int Sa3Match:1;
+ unsigned int Sa4Match:1;
+ unsigned int TypeID:1;
+ unsigned int VlanTag:1;
+ unsigned int PriorityTag:1;
+ unsigned int VlanPriority:3;
+ unsigned int Cfi:1;
+ unsigned int EndOfFrame:1;
+ unsigned int StartOfFrame:1;
+ unsigned int Rxbuf_off:2;
+ unsigned int Res0:1;
+ unsigned int Length:11;
+ }S_Status;
+ }U_Status;
+}AVR32_RxTdDescriptor, *AVR32P_RxTdDescriptor;
+//! @}
+
+/*! Transmit Transfer descriptor structure.
+ */
+//! @{
+typedef struct _AVR32_TxTdDescriptor {
+ unsigned int addr;
+ union
+ {
+ unsigned int status;
+ struct {
+ unsigned int BuffUsed:1;
+ unsigned int Wrap:1;
+ unsigned int TransmitError:1;
+ unsigned int TransmitUnderrun:1;
+ unsigned int BufExhausted:1;
+ unsigned int Res1:10;
+ unsigned int NoCrc:1;
+ unsigned int LastBuff:1;
+ unsigned int Res0:4;
+ unsigned int Length:11;
+ }S_Status;
+ }U_Status;
+}AVR32_TxTdDescriptor, *AVR32P_TxTdDescriptor;
+//! @}
+
+/*! Mask for frame used. */
+#define AVR32_OWNERSHIP_BIT 0x00000001
+
+/*! Receive status defintion.
+ */
+//! @{
+#define AVR32_BROADCAST_ADDR ((unsigned int) (1 << 31)) //* Broadcat address detected
+#define AVR32_MULTICAST_HASH ((unsigned int) (1 << 30)) //* MultiCast hash match
+#define AVR32_UNICAST_HASH ((unsigned int) (1 << 29)) //* UniCast hash match
+#define AVR32_EXTERNAL_ADDR ((unsigned int) (1 << 28)) //* External Address match
+#define AVR32_SA1_ADDR ((unsigned int) (1 << 26)) //* Specific address 1 match
+#define AVR32_SA2_ADDR ((unsigned int) (1 << 25)) //* Specific address 2 match
+#define AVR32_SA3_ADDR ((unsigned int) (1 << 24)) //* Specific address 3 match
+#define AVR32_SA4_ADDR ((unsigned int) (1 << 23)) //* Specific address 4 match
+#define AVR32_TYPE_ID ((unsigned int) (1 << 22)) //* Type ID match
+#define AVR32_VLAN_TAG ((unsigned int) (1 << 21)) //* VLAN tag detected
+#define AVR32_PRIORITY_TAG ((unsigned int) (1 << 20)) //* PRIORITY tag detected
+#define AVR32_VLAN_PRIORITY ((unsigned int) (7 << 17)) //* PRIORITY Mask
+#define AVR32_CFI_IND ((unsigned int) (1 << 16)) //* CFI indicator
+#define AVR32_EOF ((unsigned int) (1 << 15)) //* EOF
+#define AVR32_SOF ((unsigned int) (1 << 14)) //* SOF
+#define AVR32_RBF_OFFSET ((unsigned int) (3 << 12)) //* Receive Buffer Offset Mask
+#define AVR32_LENGTH_FRAME ((unsigned int) 0x0FFF) //* Length of frame
+//! @}
+
+/* Transmit Status definition */
+//! @{
+#define AVR32_TRANSMIT_OK ((unsigned int) (1 << 31)) //*
+#define AVR32_TRANSMIT_WRAP ((unsigned int) (1 << 30)) //* Wrap bit: mark the last descriptor
+#define AVR32_TRANSMIT_ERR ((unsigned int) (1 << 29)) //* RLE:transmit error
+#define AVR32_TRANSMIT_UND ((unsigned int) (1 << 28)) //* Transmit Underrun
+#define AVR32_BUF_EX ((unsigned int) (1 << 27)) //* Buffers exhausted in mid frame
+#define AVR32_TRANSMIT_NO_CRC ((unsigned int) (1 << 16)) //* No CRC will be appended to the current frame
+#define AVR32_LAST_BUFFER ((unsigned int) (1 << 15)) //*
+//! @}
+
+/**
+ * \brief Initialise the MACB driver.
+ *
+ * \param *macb Base address of the MACB
+ *
+ * \return TRUE if success, FALSE otherwise.
+ */
+Bool xMACBInit( volatile avr32_macb_t * macb );
+
+/**
+ * \brief Send ulLength bytes from pcFrom. This copies the buffer to one of the
+ * MACB Tx buffers, then indicates to the MACB that the buffer is ready.
+ * If lEndOfFrame is true then the data being copied is the end of the frame
+ * and the frame can be transmitted.
+ *
+ * \param *macb Base address of the MACB
+ * \param *pcFrom Address of the data buffer
+ * \param ulLength Length of the frame
+ * \param lEndOfFrame Flag for End Of Frame
+ *
+ * \return length sent.
+ */
+long lMACBSend(volatile avr32_macb_t * macb, char *pcFrom, unsigned long ulLength, long lEndOfFrame );
+
+
+/**
+ * \brief Frames can be read from the MACB in multiple sections.
+ * Read ulSectionLength bytes from the MACB receive buffers to pcTo.
+ * ulTotalFrameLength is the size of the entire frame. Generally vMACBRead
+ * will be repetedly called until the sum of all the ulSectionLenths totals
+ * the value of ulTotalFrameLength.
+ *
+ * \param *pcTo Address of the buffer
+ * \param ulSectionLength Length of the buffer
+ * \param ulTotalFrameLength Length of the frame
+ */
+void vMACBRead( char *pcTo, unsigned long ulSectionLength, unsigned long ulTotalFrameLength );
+
+/**
+ * \brief Called by the Tx interrupt, this function traverses the buffers used to
+ * hold the frame that has just completed transmission and marks each as
+ * free again.
+ */
+void vClearMACBTxBuffer( void );
+
+/**
+ * \brief Suspend on a semaphore waiting either for the semaphore to be obtained
+ * or a timeout. The semaphore is used by the MACB ISR to indicate that
+ * data has been received and is ready for processing.
+ *
+ * \param ulTimeOut time to wait for an input
+ *
+ */
+void vMACBWaitForInput( unsigned long ulTimeOut );
+
+/**
+ * \brief Function to get length of the next frame in the receive buffers
+ *
+ * \return the length of the next frame in the receive buffers.
+ */
+unsigned long ulMACBInputLength( void );
+
+/**
+ * \brief Set the MACB Physical address (SA1B & SA1T registers).
+ *
+ * \param *MACAddress the MAC address to set.
+ */
+void vMACBSetMACAddress(const char * MACAddress);
+
+/**
+ * \brief Disable MACB operations (Tx and Rx).
+ *
+ * \param *macb Base address of the MACB
+ */
+void vDisableMACBOperations(volatile avr32_macb_t * macb);
+
+#endif
+
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.c b/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.c
index 671c3e22c..e2f08d923 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.c
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.c
@@ -9,7 +9,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -44,297 +44,275 @@
#include "pm.h"
-void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
+/*! \name PM Writable Bit-Field Registers
+ */
+//! @{
+
+typedef union
{
- union {
- unsigned long oscctrl0;
- avr32_pm_oscctrl0_t OSCCTRL0;
- } oscctrl0 ;
- // Read
- oscctrl0.oscctrl0 = pm->oscctrl0;
- // Modify
- oscctrl0.OSCCTRL0.mode = AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK;
- // Write
- pm->oscctrl0 = oscctrl0.oscctrl0;
-}
+ unsigned long mcctrl;
+ avr32_pm_mcctrl_t MCCTRL;
+} u_avr32_pm_mcctrl_t;
+typedef union
+{
+ unsigned long cksel;
+ avr32_pm_cksel_t CKSEL;
+} u_avr32_pm_cksel_t;
-void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
+typedef union
+{
+ unsigned long pll;
+ avr32_pm_pll_t PLL;
+} u_avr32_pm_pll_t;
+
+typedef union
+{
+ unsigned long oscctrl0;
+ avr32_pm_oscctrl0_t OSCCTRL0;
+} u_avr32_pm_oscctrl0_t;
+
+typedef union
+{
+ unsigned long oscctrl1;
+ avr32_pm_oscctrl1_t OSCCTRL1;
+} u_avr32_pm_oscctrl1_t;
+
+typedef union
+{
+ unsigned long oscctrl32;
+ avr32_pm_oscctrl32_t OSCCTRL32;
+} u_avr32_pm_oscctrl32_t;
+
+typedef union
+{
+ unsigned long ier;
+ avr32_pm_ier_t IER;
+} u_avr32_pm_ier_t;
+
+typedef union
+{
+ unsigned long idr;
+ avr32_pm_idr_t IDR;
+} u_avr32_pm_idr_t;
+
+typedef union
+{
+ unsigned long icr;
+ avr32_pm_icr_t ICR;
+} u_avr32_pm_icr_t;
+
+typedef union
+{
+ unsigned long gcctrl;
+ avr32_pm_gcctrl_t GCCTRL;
+} u_avr32_pm_gcctrl_t;
+
+typedef union
+{
+ unsigned long rccr;
+ avr32_pm_rccr_t RCCR;
+} u_avr32_pm_rccr_t;
+
+typedef union
+{
+ unsigned long bgcr;
+ avr32_pm_bgcr_t BGCR;
+} u_avr32_pm_bgcr_t;
+
+typedef union
+{
+ unsigned long vregcr;
+ avr32_pm_vregcr_t VREGCR;
+} u_avr32_pm_vregcr_t;
+
+typedef union
+{
+ unsigned long bod;
+ avr32_pm_bod_t BOD;
+} u_avr32_pm_bod_t;
+
+//! @}
+
+
+/*! \brief Sets the mode of the oscillator 0.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x).
+ */
+static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
- union {
- unsigned long oscctrl0;
- avr32_pm_oscctrl0_t OSCCTRL0;
- } oscctrl0 ;
// Read
- oscctrl0.oscctrl0 = pm->oscctrl0;
+ u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
// Modify
- oscctrl0.OSCCTRL0.mode = (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
- AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3;
+ u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode;
// Write
- pm->oscctrl0 = oscctrl0.oscctrl0;
+ pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
}
-void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
+void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
- union {
- unsigned long oscctrl0;
- avr32_pm_oscctrl0_t OSCCTRL0;
- } oscctrl0 ;
+ pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK);
+}
- // Read register
- mcctrl.mcctrl = pm->mcctrl;
- oscctrl0.oscctrl0 = pm->oscctrl0;
- // Modify
- mcctrl.MCCTRL.osc0en = 1;
- oscctrl0.OSCCTRL0.startup = startup;
- // Write back
- pm->oscctrl0 = oscctrl0.oscctrl0;
- pm->mcctrl = mcctrl.mcctrl;
- while(!pm->ISR.osc0rdy); //For osc output valid
+void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
+{
+ pm_set_osc0_mode(pm, (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
+ AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3);
}
-void pm_disable_clk0(volatile avr32_pm_t *pm)
+void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
+ pm_enable_clk0_no_wait(pm, startup);
+ pm_wait_for_clk0_ready(pm);
+}
- // Read register
- mcctrl.mcctrl = pm->mcctrl;
- // Modify
- mcctrl.MCCTRL.osc0en = 0;
-
- // Write back
- pm->mcctrl = mcctrl.mcctrl;
+void pm_disable_clk0(volatile avr32_pm_t *pm)
+{
+ pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK;
}
void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
- union {
- unsigned long oscctrl0;
- avr32_pm_oscctrl0_t OSCCTRL0;
- } oscctrl0 ;
-
// Read register
- mcctrl.mcctrl = pm->mcctrl;
- oscctrl0.oscctrl0 = pm->oscctrl0;
+ u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
// Modify
- mcctrl.MCCTRL.osc0en = 1;
- oscctrl0.OSCCTRL0.startup=startup;
+ u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup;
// Write back
- pm->mcctrl = mcctrl.mcctrl;
- pm->oscctrl0 = oscctrl0.oscctrl0;
+ pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
+
+ pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK;
}
void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm)
{
- while(!pm->ISR.osc0rdy);
+ while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK));
}
-void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
+/*! \brief Sets the mode of the oscillator 1.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x).
+ */
+static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
- union {
- unsigned long oscctrl1;
- avr32_pm_oscctrl1_t OSCCTRL1;
- } oscctrl1 ;
// Read
- oscctrl1.oscctrl1= pm->oscctrl1;
+ u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
// Modify
- oscctrl1.OSCCTRL1.mode = AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK;
+ u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode;
// Write
- pm->oscctrl1 = oscctrl1.oscctrl1;
+ pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
}
-void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
+void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
{
- union {
- unsigned long oscctrl1;
- avr32_pm_oscctrl1_t OSCCTRL1;
- } oscctrl1 ;
- // Read
- oscctrl1.oscctrl1= pm->oscctrl1;
- // Modify
- oscctrl1.OSCCTRL1.mode = (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
- AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3;
- // Write
- pm->oscctrl1 = oscctrl1.oscctrl1;
+ pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK);
}
-void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
+void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
- union {
- unsigned long oscctrl1;
- avr32_pm_oscctrl1_t OSCCTRL1;
- } oscctrl1 ;
-
- // Read register
- mcctrl.mcctrl = pm->mcctrl;
- oscctrl1.oscctrl1 = pm->oscctrl1;
+ pm_set_osc1_mode(pm, (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
+ AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3);
+}
- mcctrl.MCCTRL.osc1en = 1;
- oscctrl1.OSCCTRL1.startup=startup;
- // Write back
- pm->oscctrl1 = oscctrl1.oscctrl1;
- pm->mcctrl = mcctrl.mcctrl;
- while(!pm->ISR.osc1rdy);
+void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
+{
+ pm_enable_clk1_no_wait(pm, startup);
+ pm_wait_for_clk1_ready(pm);
}
void pm_disable_clk1(volatile avr32_pm_t *pm)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
+ pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK;
+}
+void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
+{
// Read register
- mcctrl.mcctrl = pm->mcctrl;
-
+ u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
// Modify
- mcctrl.MCCTRL.osc1en = 0;
-
+ u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup;
// Write back
- pm->mcctrl = mcctrl.mcctrl;
+ pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
+
+ pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK;
}
-void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
+void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
- union {
- unsigned long oscctrl1;
- avr32_pm_oscctrl1_t OSCCTRL1;
- } oscctrl1 ;
-
- // Read register
- mcctrl.mcctrl = pm->mcctrl;
- oscctrl1.oscctrl1 = pm->oscctrl1;
-
- mcctrl.MCCTRL.osc1en = 1;
- oscctrl1.OSCCTRL1.startup=startup;
- // Write back
- pm->oscctrl1 = oscctrl1.oscctrl1;
- pm->mcctrl = mcctrl.mcctrl;
+ while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK));
}
-void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
+/*! \brief Sets the mode of the 32-kHz oscillator.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x).
+ */
+static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
- while(!pm->ISR.osc1rdy);
+ // Read
+ u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
+ // Modify
+ u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode;
+ // Write
+ pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
}
void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm)
{
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } u_ctrl;
- u_ctrl.oscctrl32 = pm->oscctrl32;
- u_ctrl.OSCCTRL32.mode = AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK;
- pm->oscctrl32 = u_ctrl.oscctrl32;
+ pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK);
}
void pm_enable_osc32_crystal(volatile avr32_pm_t *pm)
{
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } u_ctrl;
- u_ctrl.oscctrl32 = pm->oscctrl32;
- u_ctrl.OSCCTRL32.mode = AVR32_PM_OSCCTRL32_MODE_CRYSTAL;
- pm->oscctrl32 = u_ctrl.oscctrl32;
+ pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL);
}
void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup)
{
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } oscctrl32 ;
-
- // Read register
- oscctrl32.oscctrl32 = pm->oscctrl32;
- // Modify
- oscctrl32.OSCCTRL32.osc32en = 1;
- oscctrl32.OSCCTRL32.startup=startup;
- // Write back
- pm->oscctrl32 = oscctrl32.oscctrl32;
-
- while(!pm->ISR.osc32rdy);
+ pm_enable_clk32_no_wait(pm, startup);
+ pm_wait_for_clk32_ready(pm);
}
void pm_disable_clk32(volatile avr32_pm_t *pm)
{
- // To get rid of a GCC bug
- // This makes C code longer, but not ASM
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } oscctrl32 ;
-
- // Read register
- oscctrl32.oscctrl32 = pm->oscctrl32;
- // Modify
- oscctrl32.OSCCTRL32.osc32en = 0;
- // Write back
- pm->oscctrl32 = oscctrl32.oscctrl32;
+ pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK;
}
void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
- union {
- unsigned long oscctrl32;
- avr32_pm_oscctrl32_t OSCCTRL32;
- } oscctrl32 ;
-
// Read register
- oscctrl32.oscctrl32 = pm->oscctrl32;
+ u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
// Modify
- oscctrl32.OSCCTRL32.osc32en = 1;
- oscctrl32.OSCCTRL32.startup=startup;
+ u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1;
+ u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup;
// Write back
- pm->oscctrl32 = oscctrl32.oscctrl32;
+ pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
}
void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm)
{
- // To get rid of a GCC bug
- // This makes C code longer, but not ASM
-
- while(!pm->ISR.osc32rdy);
+ while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK));
}
@@ -346,29 +324,21 @@ void pm_cksel(volatile avr32_pm_t *pm,
unsigned int hsbdiv,
unsigned int hsbsel)
{
- // Force the compiler to generate only one 32 bits access
- union {
- avr32_pm_cksel_t selval ;
- unsigned long uword32;
- } cksel;
-
- cksel.uword32 = 0;
+ u_avr32_pm_cksel_t u_avr32_pm_cksel = {0};
- cksel.selval.cpudiv = hsbdiv;
- cksel.selval.cpusel = hsbsel;
- cksel.selval.hsbdiv = hsbdiv;
- cksel.selval.hsbsel = hsbsel;
- cksel.selval.pbbdiv = pbbdiv;
- cksel.selval.pbbsel = pbbsel;
- cksel.selval.pbadiv = pbadiv;
- cksel.selval.pbasel = pbasel;
+ u_avr32_pm_cksel.CKSEL.cpusel = hsbsel;
+ u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv;
+ u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel;
+ u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv;
+ u_avr32_pm_cksel.CKSEL.pbasel = pbasel;
+ u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv;
+ u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel;
+ u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv;
- pm->cksel = cksel.uword32;
+ pm->cksel = u_avr32_pm_cksel.cksel;
// Wait for ckrdy bit and then clear it
- while(!(pm->ISR.ckrdy));
-
- return;
+ while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK));
}
@@ -377,42 +347,30 @@ void pm_gc_setup(volatile avr32_pm_t *pm,
unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1)
unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1
unsigned int diven,
- unsigned int div) {
- union {
- unsigned long gcctrl;
- avr32_pm_gcctrl_t GCCTRL;
- } u_gc;
+ unsigned int div)
+{
+ u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0};
- u_gc.GCCTRL.oscsel = pll_osc;
- u_gc.GCCTRL.pllsel = osc_or_pll;
- u_gc.GCCTRL.diven = diven;
- u_gc.GCCTRL.div = div;
- u_gc.GCCTRL.cen = 0; // Disable GC first
- pm->gcctrl[gc] = u_gc.gcctrl;
+ u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc;
+ u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll;
+ u_avr32_pm_gcctrl.GCCTRL.diven = diven;
+ u_avr32_pm_gcctrl.GCCTRL.div = div;
+
+ pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl;
}
void pm_gc_enable(volatile avr32_pm_t *pm,
- unsigned int gc) {
- union {
- unsigned long gcctrl;
- avr32_pm_gcctrl_t GCCTRL;
- } u_gc;
- u_gc.gcctrl = pm->gcctrl[gc];
- u_gc.GCCTRL.cen = 1;
- pm->gcctrl[gc] = u_gc.gcctrl;
+ unsigned int gc)
+{
+ pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK;
}
void pm_gc_disable(volatile avr32_pm_t *pm,
- unsigned int gc) {
- union {
- unsigned long gcctrl;
- avr32_pm_gcctrl_t GCCTRL;
- } u_gc;
- u_gc.gcctrl = pm->gcctrl[gc];
- u_gc.GCCTRL.cen = 0;
- pm->gcctrl[gc] = u_gc.gcctrl;
+ unsigned int gc)
+{
+ pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK;
}
@@ -421,25 +379,16 @@ void pm_pll_setup(volatile avr32_pm_t *pm,
unsigned int mul,
unsigned int div,
unsigned int osc,
- unsigned int lockcount) {
-
- union {
- unsigned long pll ;
- avr32_pm_pll_t PLL ;
- } u_pll;
-
- u_pll.pll=0;
-
- u_pll.PLL.pllmul = mul;
- u_pll.PLL.plldiv = div;
- u_pll.PLL.pllosc = osc;
- u_pll.PLL.pllcount = lockcount;
-
- u_pll.PLL.pllopt = 0;
+ unsigned int lockcount)
+{
+ u_avr32_pm_pll_t u_avr32_pm_pll = {0};
- u_pll.PLL.plltest = 0;
+ u_avr32_pm_pll.PLL.pllosc = osc;
+ u_avr32_pm_pll.PLL.plldiv = div;
+ u_avr32_pm_pll.PLL.pllmul = mul;
+ u_avr32_pm_pll.PLL.pllcount = lockcount;
- (pm->pll)[pll] = u_pll.pll;
+ pm->pll[pll] = u_avr32_pm_pll.pll;
}
@@ -447,53 +396,38 @@ void pm_pll_set_option(volatile avr32_pm_t *pm,
unsigned int pll,
unsigned int pll_freq,
unsigned int pll_div2,
- unsigned int pll_wbwdisable) {
- union {
- unsigned long pll ;
- avr32_pm_pll_t PLL ;
- } u_pll;
-
- u_pll.pll = (pm->pll)[pll];
- u_pll.PLL.pllopt = pll_freq | (pll_div2<<1) | (pll_wbwdisable<<2);
- (pm->pll)[pll] = u_pll.pll;
+ unsigned int pll_wbwdisable)
+{
+ u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]};
+ u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2);
+ pm->pll[pll] = u_avr32_pm_pll.pll;
}
unsigned int pm_pll_get_option(volatile avr32_pm_t *pm,
- unsigned int pll) {
- return (pm->PLL)[pll].pllopt;
+ unsigned int pll)
+{
+ return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET;
}
void pm_pll_enable(volatile avr32_pm_t *pm,
- unsigned int pll) {
- union {
- unsigned long pll ;
- avr32_pm_pll_t PLL ;
- } u_pll;
-
- u_pll.pll = (pm->pll)[pll];
- u_pll.PLL.pllen = 1;
- (pm->pll)[pll] = u_pll.pll;
+ unsigned int pll)
+{
+ pm->pll[pll] |= AVR32_PM_PLLEN_MASK;
}
void pm_pll_disable(volatile avr32_pm_t *pm,
- unsigned int pll) {
- union {
- unsigned long pll ;
- avr32_pm_pll_t PLL ;
- } u_pll;
-
- u_pll.pll = (pm->pll)[pll];
- u_pll.PLL.pllen = 0;
- (pm->pll)[pll] = u_pll.pll;
+ unsigned int pll)
+{
+ pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK;
}
void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
{
- while(!pm->ISR.lock0);
+ while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK));
// Bypass the lock signal of the PLL
pm->pll[0] |= AVR32_PM_PLL0_PLLBPL_MASK;
@@ -502,7 +436,7 @@ void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
{
- while(!pm->ISR.lock1);
+ while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK));
// Bypass the lock signal of the PLL
pm->pll[1] |= AVR32_PM_PLL1_PLLBPL_MASK;
@@ -511,16 +445,12 @@ void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock)
{
- union {
- avr32_pm_mcctrl_t MCCTRL;
- unsigned long mcctrl;
- } mcctrl;
// Read
- mcctrl.mcctrl = pm->mcctrl;
+ u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl};
// Modify
- mcctrl.MCCTRL.mcsel = clock;
- // Write Back
- pm->MCCTRL.mcsel = mcctrl.mcctrl;
+ u_avr32_pm_mcctrl.MCCTRL.mcsel = clock;
+ // Write back
+ pm->mcctrl = u_avr32_pm_mcctrl.mcctrl;
}
@@ -532,77 +462,49 @@ void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int
}
-void pm_bod_enable_irq(volatile struct avr32_pm_t *pm) {
-
- union {
- unsigned long ier ;
- avr32_pm_ier_t IER ;
- } u_ier;
- u_ier.ier = 0;
- u_ier.IER.boddet = 1;
-
- pm->ier = u_ier.ier;
+void pm_bod_enable_irq(volatile avr32_pm_t *pm)
+{
+ pm->ier = AVR32_PM_IER_BODDET_MASK;
}
-void pm_bod_disable_irq(volatile struct avr32_pm_t *pm) {
-
- union {
- unsigned long idr ;
- avr32_pm_idr_t IDR ;
- } u_idr;
- u_idr.idr = 0;
- u_idr.IDR.boddet = 1;
-
- pm->idr = u_idr.idr;
+void pm_bod_disable_irq(volatile avr32_pm_t *pm)
+{
+ pm->idr = AVR32_PM_IDR_BODDET_MASK;
}
-void pm_bod_clear_irq(volatile struct avr32_pm_t *pm) {
-
- union {
- unsigned long icr ;
- avr32_pm_idr_t ICR ;
- } u_icr;
- u_icr.icr = 0;
- u_icr.ICR.boddet = 1;
-
- pm->icr = u_icr.icr;
+void pm_bod_clear_irq(volatile avr32_pm_t *pm)
+{
+ pm->icr = AVR32_PM_ICR_BODDET_MASK;
}
-unsigned long pm_bod_get_irq_status(volatile struct avr32_pm_t *pm) {
-
- return pm->ISR.boddet;
+unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm)
+{
+ return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0);
}
-unsigned long pm_bod_get_irq_enable_bit(volatile struct avr32_pm_t *pm) {
-
- return pm->IMR.boddet;
+unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm)
+{
+ return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0);
}
-unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) {
- union {
- unsigned long bod ;
- avr32_pm_bod_t BOD ;
- } u_bod;
-
- u_bod.bod = pm->bod;
-
- return (unsigned long) u_bod.BOD.level;
-
+unsigned long pm_bod_get_level(volatile avr32_pm_t *pm)
+{
+ return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET;
}
-void pm_write_gplp(volatile avr32_pm_t *pm,unsigned long gplp, unsigned long value) {
- (pm->gplp)[gplp] = value;
-
+void pm_write_gplp(volatile avr32_pm_t *pm,unsigned long gplp, unsigned long value)
+{
+ pm->gplp[gplp] = value;
}
-unsigned long pm_read_gplp(volatile avr32_pm_t *pm,unsigned long gplp) {
-
- return (pm->gplp)[gplp];
+unsigned long pm_read_gplp(volatile avr32_pm_t *pm,unsigned long gplp)
+{
+ return pm->gplp[gplp];
}
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.h b/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.h
index 5a3e6898a..616129b56 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.h
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/PM/pm.h
@@ -9,7 +9,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -44,15 +44,7 @@
#ifndef _PM_H_
#define _PM_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "compiler.h"
#include "preprocessor.h"
@@ -70,6 +62,22 @@
#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
+/*! \brief Gets the MCU reset cause.
+ *
+ * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM).
+ *
+ * \return The MCU reset cause which can be masked with the
+ * \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
+ */
+#if __GNUC__
+__attribute__((__always_inline__))
+#endif
+extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
+{
+ return pm->rcause;
+}
+
+
/*!
* \brief This function will enable the external clock mode of the oscillator 0.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/TC/tc.c b/Demo/lwIP_AVR32_UC3/DRIVERS/TC/tc.c
index 20dfe4ee5..e63cc8f9f 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/TC/tc.c
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/TC/tc.c
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -42,14 +42,7 @@
*/
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "compiler.h"
#include "tc.h"
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/TC/tc.h b/Demo/lwIP_AVR32_UC3/DRIVERS/TC/tc.h
index f76586d70..381008bee 100644
--- a/Demo/lwIP_AVR32_UC3/DRIVERS/TC/tc.h
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/TC/tc.h
@@ -10,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -45,17 +45,11 @@
#ifndef _TC_H_
#define _TC_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
+#include
//! TC driver functions return value in case of invalid argument(s).
-#define TC_INVALID_ARGUMENT -1
+#define TC_INVALID_ARGUMENT (-1)
//! Number of timer/counter channels.
#define TC_NUMBER_OF_CHANNELS (sizeof(((avr32_tc_t *)0)->channel) / sizeof(avr32_tc_channel_t))
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/USART/usart.c b/Demo/lwIP_AVR32_UC3/DRIVERS/USART/usart.c
new file mode 100644
index 000000000..3110bf5af
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/USART/usart.c
@@ -0,0 +1,448 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief USART driver for AVR32 UC3.
+ *
+ * This file contains basic functions for the AVR32 USART, with support for all
+ * modes, settings and clock speeds.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 devices with a USART module can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include "usart.h"
+
+
+//------------------------------------------------------------------------------
+/*! \name Private Functions
+ */
+//! @{
+
+
+/*! \brief Checks if the USART is in multidrop mode.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return \c 1 if the USART is in multidrop mode, otherwise \c 0.
+ */
+#if __GNUC__
+__attribute__((__always_inline__))
+#endif
+static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
+{
+ return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;
+}
+
+
+/*! \brief Calculates a clock divider (\e CD) that gets the USART as close to a
+ * wanted baudrate as possible.
+ *
+ * \todo manage the FP fractal part to avoid big errors
+ *
+ * Baudrate calculation:
+ * \f$ baudrate = \frac{Selected Clock}{16 \times CD} \f$ with 16x oversampling or
+ * \f$ baudrate = \frac{Selected Clock}{8 \times CD} \f$ with 8x oversampling or
+ * \f$ baudrate = \frac{Selected Clock}{CD} \f$ with SYNC bit set to allow high speed.
+ *
+ * \param usart Base address of the USART instance.
+ * \param baudrate Wanted baudrate.
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Baudrate successfully initialized.
+ * \retval USART_INVALID_INPUT Wanted baudrate is impossible with given clock speed.
+ */
+
+static int usart_set_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, long pba_hz)
+{
+ // Clock divider.
+ int cd;
+
+ // Baudrate calculation.
+ if (baudrate < pba_hz / 16)
+ {
+ // Use 16x oversampling, clear SYNC bit.
+ usart->mr &=~ (AVR32_USART_MR_OVER_MASK | AVR32_USART_MR_SYNC_MASK);
+ cd = (pba_hz + 8 * baudrate) / (16 * baudrate);
+
+ if ((cd >65535)) return USART_INVALID_INPUT;
+ }
+ else if (baudrate < pba_hz / 8)
+ {
+ // Use 8x oversampling.
+ usart->mr |= AVR32_USART_MR_OVER_MASK;
+ // clear SYNC bit
+ usart->mr &=~ AVR32_USART_MR_SYNC_MASK;
+
+ cd = (pba_hz + 4 * baudrate) / (8 * baudrate);
+
+ if ((cd < 1)||(cd >65535)) return USART_INVALID_INPUT;
+ }
+ else
+ {
+ // set SYNC to 1
+ usart->mr |= AVR32_USART_MR_SYNC_MASK;
+ // use PBA/BaudRate
+ cd = (pba_hz / baudrate);
+ }
+ usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
+
+ return USART_SUCCESS;
+}
+
+//! @}
+
+
+//------------------------------------------------------------------------------
+/*! \name Initialization Functions
+ */
+//! @{
+
+
+void usart_reset(volatile avr32_usart_t *usart)
+{
+ // Disable all USART interrupts.
+ // Interrupts needed should be set explicitly on every reset.
+ usart->idr = 0xFFFFFFFF;
+
+ // Reset mode and other registers that could cause unpredictable behavior after reset.
+ usart->mr = 0;
+ usart->rtor = 0;
+ usart->ttgr = 0;
+
+ // Shutdown TX and RX (will be re-enabled when setup has successfully completed),
+ // reset status bits and turn off DTR and RTS.
+ usart->cr = AVR32_USART_CR_RSTRX_MASK |
+ AVR32_USART_CR_RSTTX_MASK |
+ AVR32_USART_CR_RSTSTA_MASK |
+ AVR32_USART_CR_RSTIT_MASK |
+ AVR32_USART_CR_RSTNACK_MASK |
+ AVR32_USART_CR_DTRDIS_MASK |
+ AVR32_USART_CR_RTSDIS_MASK;
+}
+
+
+int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+ // Reset the USART and shutdown TX and RX.
+ usart_reset(usart);
+
+ // Check input values.
+ if (!opt) // Null pointer.
+ return USART_INVALID_INPUT;
+ if (opt->charlength < 5 || opt->charlength > 9 ||
+ opt->paritytype > 7 ||
+ opt->stopbits > 2 + 255 ||
+ opt->channelmode > 3)
+ return USART_INVALID_INPUT;
+
+ if (usart_set_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
+ return USART_INVALID_INPUT;
+
+ if (opt->charlength == 9)
+ {
+ // Character length set to 9 bits. MODE9 dominates CHRL.
+ usart->mr |= AVR32_USART_MR_MODE9_MASK;
+ }
+ else
+ {
+ // CHRL gives the character length (- 5) when MODE9 = 0.
+ usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
+ }
+
+ usart->mr |= (opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET) |
+ (opt->paritytype << AVR32_USART_MR_PAR_OFFSET);
+
+ if (opt->stopbits > USART_2_STOPBITS)
+ {
+ // Set two stop bits
+ usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
+ // and a timeguard period gives the rest.
+ usart->ttgr = opt->stopbits - USART_2_STOPBITS;
+ }
+ else
+ // Insert 1, 1.5 or 2 stop bits.
+ usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
+
+ // Setup complete; enable communication.
+ // Enable input and output.
+ usart->cr |= AVR32_USART_CR_TXEN_MASK |
+ AVR32_USART_CR_RXEN_MASK;
+
+ return USART_SUCCESS;
+}
+
+
+int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+ // First: Setup standard RS232.
+ if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
+ return USART_INVALID_INPUT;
+
+ // Clear previous mode.
+ usart->mr &= ~AVR32_USART_MR_MODE_MASK;
+ // Hardware handshaking.
+ usart->mr |= USART_MODE_HW_HSH << AVR32_USART_MR_MODE_OFFSET;
+
+ return USART_SUCCESS;
+}
+
+
+int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
+ long pba_hz, unsigned char irda_filter)
+{
+ // First: Setup standard RS232.
+ if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
+ return USART_INVALID_INPUT;
+
+ // Set IrDA counter.
+ usart->ifr = irda_filter;
+
+ // Activate "low-pass filtering" of input.
+ usart->mr |= AVR32_USART_MR_FILTER_MASK;
+
+ return USART_SUCCESS;
+}
+
+
+int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+ // First: Setup standard RS232.
+ if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
+ return USART_INVALID_INPUT;
+
+ // Clear previous mode.
+ usart->mr &= ~AVR32_USART_MR_MODE_MASK;
+ // Set modem mode.
+ usart->mr |= USART_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;
+
+ return USART_SUCCESS;
+}
+
+
+int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+ // First: Setup standard RS232.
+ if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
+ return USART_INVALID_INPUT;
+
+ // Clear previous mode.
+ usart->mr &= ~AVR32_USART_MR_MODE_MASK;
+ // Set RS485 mode.
+ usart->mr |= USART_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;
+
+ return USART_SUCCESS;
+}
+
+
+int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz)
+{
+ // Reset the USART and shutdown TX and RX.
+ usart_reset(usart);
+
+ // Check input values.
+ if (!opt) // Null pointer.
+ return USART_INVALID_INPUT;
+
+ if (t == 0)
+ {
+ // Set USART mode to ISO7816, T=0.
+ // The T=0 protocol always uses 2 stop bits.
+ usart->mr = (USART_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET) |
+ (AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET) |
+ (opt->bit_order << AVR32_USART_MR_MSBF_OFFSET); // Allow MSBF in T=0.
+ }
+ else if (t == 1)
+ {
+ // Only LSB first in the T=1 protocol.
+ // max_iterations field is only used in T=0 mode.
+ if (opt->bit_order != 0 ||
+ opt->max_iterations != 0)
+ return USART_INVALID_INPUT;
+ // Set USART mode to ISO7816, T=1.
+ // The T=1 protocol always uses 1 stop bit.
+ usart->mr = (USART_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET) |
+ (AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET);
+ }
+ else
+ return USART_INVALID_INPUT;
+
+ if (usart_set_baudrate(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)
+ return USART_INVALID_INPUT;
+
+ // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.
+ usart->fidi = opt->fidi_ratio;
+ // Set ISO7816 spesific options in the MODE register.
+ usart->mr |= (opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET) |
+ (opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET) |
+ (opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET) |
+ AVR32_USART_MR_CLKO_MASK; // Enable clock output.
+
+ // Setup complete; enable input.
+ // Leave TX disabled for now.
+ usart->cr |= AVR32_USART_CR_RXEN_MASK;
+
+ return USART_SUCCESS;
+}
+//! @}
+
+
+//------------------------------------------------------------------------------
+/*! \name Transmit/Receive Functions
+ */
+//! @{
+
+
+int usart_send_address(volatile avr32_usart_t *usart, int address)
+{
+ // Check if USART is in multidrop / RS485 mode.
+ if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;
+
+ // Prepare to send an address.
+ usart->cr |= AVR32_USART_CR_SENDA_MASK;
+
+ // Write the address to TX.
+ usart_bw_write_char(usart, address);
+
+ return USART_SUCCESS;
+}
+
+
+int usart_write_char(volatile avr32_usart_t *usart, int c)
+{
+ if (usart->csr & AVR32_USART_CSR_TXRDY_MASK)
+ {
+ usart->thr = c;
+ return USART_SUCCESS;
+ }
+ else
+ return USART_TX_BUSY;
+}
+
+
+int usart_putchar(volatile avr32_usart_t *usart, int c)
+{
+ int timeout = USART_DEFAULT_TIMEOUT;
+
+ if (c == '\n')
+ {
+ do
+ {
+ if (!timeout--) return USART_FAILURE;
+ } while (usart_write_char(usart, '\r') != USART_SUCCESS);
+
+ timeout = USART_DEFAULT_TIMEOUT;
+ }
+
+ do
+ {
+ if (!timeout--) return USART_FAILURE;
+ } while (usart_write_char(usart, c) != USART_SUCCESS);
+
+ return USART_SUCCESS;
+}
+
+
+int usart_read_char(volatile avr32_usart_t *usart, int *c)
+{
+ // Check for errors: frame, parity and overrun. In RS485 mode, a parity error
+ // would mean that an address char has been received.
+ if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
+ AVR32_USART_CSR_FRAME_MASK |
+ AVR32_USART_CSR_PARE_MASK))
+ return USART_RX_ERROR;
+
+ // No error; if we really did receive a char, read it and return SUCCESS.
+ if (usart->csr & AVR32_USART_CSR_RXRDY_MASK)
+ {
+ *c = (unsigned short)usart->rhr;
+ return USART_SUCCESS;
+ }
+ else
+ return USART_RX_EMPTY;
+}
+
+
+int usart_getchar(volatile avr32_usart_t *usart)
+{
+ int c, ret;
+
+ while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);
+
+ if (ret == USART_RX_ERROR)
+ return USART_FAILURE;
+
+ return c;
+}
+
+
+void usart_write_line(volatile avr32_usart_t *usart, const char *string)
+{
+ while (*string != '\0')
+ usart_putchar(usart, *string++);
+}
+
+
+int usart_get_echo_line(volatile avr32_usart_t *usart)
+{
+ int rx_char;
+ int retval = USART_SUCCESS;
+
+ while (1)
+ {
+ rx_char = usart_getchar(usart);
+ if (rx_char == USART_FAILURE)
+ {
+ usart_write_line(usart, "Error!!!\n");
+ break;
+ }
+ if (rx_char == '\x03')
+ {
+ retval = USART_FAILURE;
+ break;
+ }
+ usart_putchar(usart, rx_char);
+ if (rx_char == '\r')
+ {
+ usart_putchar(usart, '\n');
+ break;
+ }
+ }
+
+ return retval;
+}
+
+
+//! @}
diff --git a/Demo/lwIP_AVR32_UC3/DRIVERS/USART/usart.h b/Demo/lwIP_AVR32_UC3/DRIVERS/USART/usart.h
new file mode 100644
index 000000000..1d731f871
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/DRIVERS/USART/usart.h
@@ -0,0 +1,475 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief USART driver for AVR32 UC3.
+ *
+ * This file contains basic functions for the AVR32 USART, with support for all
+ * modes, settings and clock speeds.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 devices with a USART module can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef _USART_H_
+#define _USART_H_
+
+#include
+#include "compiler.h"
+
+
+/*! \name Return Values
+ */
+//! @{
+#define USART_SUCCESS 0 //!< Successful completion.
+#define USART_FAILURE -1 //!< Failure because of some unspecified reason.
+#define USART_INVALID_INPUT 1 //!< Input value out of range.
+#define USART_INVALID_ARGUMENT -1 //!< Argument value out of range.
+#define USART_TX_BUSY 2 //!< Transmitter was busy.
+#define USART_RX_EMPTY 3 //!< Nothing was received.
+#define USART_RX_ERROR 4 //!< Transmission error occurred.
+#define USART_MODE_FAULT 5 //!< USART not in the appropriate mode.
+//! @}
+
+//! Default time-out value (number of attempts).
+#define USART_DEFAULT_TIMEOUT 10000
+
+/*! \name Parity Settings
+ */
+//! @{
+#define USART_EVEN_PARITY AVR32_USART_MR_PAR_EVEN //!< Use even parity on character transmission.
+#define USART_ODD_PARITY AVR32_USART_MR_PAR_ODD //!< Use odd parity on character transmission.
+#define USART_SPACE_PARITY AVR32_USART_MR_PAR_SPACE //!< Use a space as parity bit.
+#define USART_MARK_PARITY AVR32_USART_MR_PAR_MARK //!< Use a mark as parity bit.
+#define USART_NO_PARITY AVR32_USART_MR_PAR_NONE //!< Don't use a parity bit.
+#define USART_MULTIDROP_PARITY AVR32_USART_MR_PAR_MULTI //!< Parity bit is used to flag address characters.
+//! @}
+
+/*! \name Operating Modes
+ */
+//! @{
+#define USART_MODE_NORMAL AVR32_USART_MR_MODE_NORMAL //!< Normal RS232 mode.
+#define USART_MODE_RS485 AVR32_USART_MR_MODE_RS485 //!< RS485 mode.
+#define USART_MODE_HW_HSH AVR32_USART_MR_MODE_HARDWARE //!< RS232 mode with hardware handshaking.
+#define USART_MODE_MODEM AVR32_USART_MR_MODE_MODEM //!< Modem mode.
+#define USART_MODE_ISO7816_T0 AVR32_USART_MR_MODE_ISO7816_T0 //!< ISO7816, T = 0 mode.
+#define USART_MODE_ISO7816_T1 AVR32_USART_MR_MODE_ISO7816_T1 //!< ISO7816, T = 1 mode.
+#define USART_MODE_IRDA AVR32_USART_MR_MODE_IRDA //!< IrDA mode.
+#define USART_MODE_SW_HSH AVR32_USART_MR_MODE_SOFTWARE //!< RS232 mode with software handshaking.
+//! @}
+
+
+/*! \name Channel Modes
+ */
+//! @{
+#define USART_NORMAL_CHMODE AVR32_USART_MR_CHMODE_NORMAL //!< Normal communication.
+#define USART_AUTO_ECHO AVR32_USART_MR_CHMODE_ECHO //!< Echo data.
+#define USART_LOCAL_LOOPBACK AVR32_USART_MR_CHMODE_LOCAL_LOOP //!< Local loopback.
+#define USART_REMOTE_LOOPBACK AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback.
+//! @}
+
+/*! \name Stop Bits Settings
+ */
+//! @{
+#define USART_1_STOPBIT AVR32_USART_MR_NBSTOP_1 //!< Use 1 stop bit.
+#define USART_1_5_STOPBITS AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits.
+#define USART_2_STOPBITS AVR32_USART_MR_NBSTOP_2 //!< Use 2 stop bits (for more, just give the number of bits).
+//! @}
+
+
+//! Input parameters when initializing RS232 and similar modes.
+typedef struct
+{
+ //! Set baudrate of the USART.
+ unsigned long baudrate;
+
+ //! Number of bits to transmit as a character (5 to 9).
+ unsigned char charlength;
+
+ //! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY,
+ //! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or
+ //! \ref USART_MULTIDROP_PARITY.
+ unsigned char paritytype;
+
+ //! Number of stop bits between two characters: \ref USART_1_STOPBIT,
+ //! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257
+ //! which will result in a time guard period of that length between characters.
+ unsigned short stopbits;
+
+ //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
+ //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
+ unsigned char channelmode;
+} usart_options_t;
+
+//! Input parameters when initializing ISO7816 modes.
+typedef struct
+{
+ //! Set the frequency of the ISO7816 clock.
+ unsigned long iso7816_hz;
+
+ //! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock).
+ //! Bit rate = \ref iso7816_hz / \ref fidi_ratio.
+ unsigned short fidi_ratio;
+
+ //! Inhibit Non Acknowledge:\n
+ //! - 0: the NACK is generated;\n
+ //! - 1: the NACK is not generated.
+ //!
+ //! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver.
+ int inhibit_nack;
+
+ //! Disable successive NACKs.
+ //! Successive parity errors are counted up to the value in the \ref max_iterations field.
+ //! These parity errors generate a NACK on the ISO line. As soon as this value is reached,
+ //! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted.
+ int dis_suc_nack;
+
+ //! Max number of repetitions (0 to 7).
+ unsigned char max_iterations;
+
+ //! Bit order in transmitted characters:\n
+ //! - 0: LSB first;\n
+ //! - 1: MSB first.
+ int bit_order;
+} iso7816_options_t;
+
+//! Input parameters when initializing ISO7816 modes.
+typedef struct
+{
+ //! Set the frequency of the SPI clock.
+ unsigned long baudrate;
+
+ //! Number of bits to transmit as a character (5 to 9).
+ unsigned char charlength;
+
+ //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
+ //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
+ unsigned char channelmode;
+
+ //! Which SPI mode to use when transmitting.
+ unsigned char spimode;
+} usart_spi_options_t;
+
+
+
+
+
+//------------------------------------------------------------------------------
+/*! \name Initialization Functions
+ */
+//! @{
+
+/*! \brief Resets the USART and disables TX and RX.
+ *
+ * \param usart Base address of the USART instance.
+ */
+extern void usart_reset(volatile avr32_usart_t *usart);
+
+/*! \brief Sets up the USART to use the standard RS232 protocol.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ */
+extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use hardware handshaking.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ *
+ * \note \ref usart_init_rs232 does not need to be invoked before this function.
+ */
+extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use the IrDA protocol.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ * \param irda_filter Counter used to distinguish received ones from zeros.
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ */
+extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
+ long pba_hz, unsigned char irda_filter);
+
+/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ */
+extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use the RS485 protocol.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ */
+extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up ISO7816 communication (see \ref iso7816_options_t).
+ * \param t ISO7816 mode to use (T=0 or T=1).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ */
+extern int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz);
+
+/*! \brief Sets up the USART to use the SPI mode as master.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ */
+extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
+
+
+/*! \brief Sets up the USART to use the SPI mode as slave.
+ *
+ * \param usart Base address of the USART instance.
+ * \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
+ * \param pba_hz USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS Mode successfully initialized.
+ * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
+ */
+extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
+
+//! @}
+
+//------------------------------------------------------------------------------
+/*! \brief Selects slave chip.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return Status.
+ * \retval USART_SUCCESS Success.
+ */
+extern int usart_spi_selectChip(volatile avr32_usart_t *usart);
+
+/*! \brief Unselects slave chip.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return Status.
+ * \retval USART_SUCCESS Success.
+ * \retval USART_FAILURE Time out.
+ */
+extern int usart_spi_unselectChip(volatile avr32_usart_t *usart);
+
+//------------------------------------------------------------------------------
+/*! \name Read and Reset Error Status Bits
+ */
+//! @{
+
+/*! \brief Resets the error status.
+ *
+ * This function resets the status bits indicating that a parity error,
+ * framing error or overrun has occurred. The RXBRK bit, indicating
+ * a start/end of break condition on the RX line, is also reset.
+ *
+ * \param usart Base address of the USART instance.
+ */
+#if __GNUC__
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart)
+{
+ usart->cr |= AVR32_USART_CR_RSTSTA_MASK;
+}
+
+/*! \brief Checks if a parity error has occurred since last status reset.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return \c 1 if a parity error has been detected, otherwise \c 0.
+ */
+#if __GNUC__
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart)
+{
+ return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0;
+}
+
+/*! \brief Checks if a framing error has occurred since last status reset.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return \c 1 if a framing error has been detected, otherwise \c 0.
+ */
+#if __GNUC__
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart)
+{
+ return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0;
+}
+
+/*! \brief Checks if an overrun error has occurred since last status reset.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return \c 1 if a overrun error has been detected, otherwise \c 0.
+ */
+#if __GNUC__
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart)
+{
+ return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0;
+}
+
+//! @}
+
+
+//------------------------------------------------------------------------------
+/*! \name Transmit/Receive Functions
+ */
+//! @{
+
+/*! \brief Addresses a receiver.
+ *
+ * While in RS485 mode, receivers only accept data addressed to them.
+ * A packet/char with the address tag set has to precede any data.
+ * This function is used to address a receiver. This receiver should read
+ * all the following data, until an address packet addresses another receiver.
+ *
+ * \param usart Base address of the USART instance.
+ * \param address Address of the target device.
+ *
+ * \retval USART_SUCCESS Address successfully sent (if current mode is RS485).
+ * \retval USART_MODE_FAULT Wrong operating mode.
+ */
+extern int usart_send_address(volatile avr32_usart_t *usart, int address);
+
+/*! \brief Writes the given character to the TX buffer if the transmitter is ready.
+ *
+ * \param usart Base address of the USART instance.
+ * \param c The character (up to 9 bits) to transmit.
+ *
+ * \retval USART_SUCCESS The transmitter was ready.
+ * \retval USART_TX_BUSY The transmitter was busy.
+ */
+extern int usart_write_char(volatile avr32_usart_t *usart, int c);
+
+/*! \brief An active wait writing a character to the USART.
+ *
+ * \param usart Base address of the USART instance.
+ * \param c The character (up to 9 bits) to transmit.
+ */
+#if __GNUC__
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c)
+{
+ while (usart_write_char(usart, c) != USART_SUCCESS);
+}
+
+/*! \brief Sends a character with the USART.
+ *
+ * \param usart Base address of the USART instance.
+ * \param c Character to write.
+ *
+ * \retval USART_SUCCESS The character was written.
+ * \retval USART_FAILURE The function timed out before the USART transmitter became ready to send.
+ */
+extern int usart_putchar(volatile avr32_usart_t *usart, int c);
+
+/*! \brief Checks the RX buffer for a received character, and stores it at the
+ * given memory location.
+ *
+ * \param usart Base address of the USART instance.
+ * \param c Pointer to the where the read character should be stored
+ * (must be at least short in order to accept 9-bit characters).
+ *
+ * \retval USART_SUCCESS The character was read successfully.
+ * \retval USART_RX_EMPTY The RX buffer was empty.
+ * \retval USART_RX_ERROR An error was deteceted.
+ */
+extern int usart_read_char(volatile avr32_usart_t *usart, int *c);
+
+/*! \brief Waits until a character is received, and returns it.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return The received character, or \ref USART_FAILURE upon error.
+ */
+extern int usart_getchar(volatile avr32_usart_t *usart);
+
+/*! \brief Writes one character string to the USART.
+ *
+ * \param usart Base address of the USART instance.
+ * \param string String to be written.
+ */
+extern void usart_write_line(volatile avr32_usart_t *usart, const char *string);
+
+/*! \brief Gets and echoes characters until end of line.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \retval USART_SUCCESS Success.
+ * \retval USART_FAILURE ETX character received.
+ */
+extern int usart_get_echo_line(volatile avr32_usart_t *usart);
+
+//! @}
+
+
+#endif // _USART_H_
diff --git a/Demo/lwIP_AVR32_UC3/FreeRTOSConfig.h b/Demo/lwIP_AVR32_UC3/FreeRTOSConfig.h
index 3d1d37f04..f430e9967 100644
--- a/Demo/lwIP_AVR32_UC3/FreeRTOSConfig.h
+++ b/Demo/lwIP_AVR32_UC3/FreeRTOSConfig.h
@@ -1,4 +1,4 @@
-/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief FreeRTOS and lwIP example for AVR32 UC3.
@@ -8,9 +8,9 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
- *****************************************************************************/
+ ******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
@@ -45,6 +45,7 @@
#include "board.h"
+
/*-----------------------------------------------------------
* Application specific definitions.
*
@@ -76,20 +77,25 @@
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
-#define INCLUDE_vTaskPrioritySet 1
-#define INCLUDE_uxTaskPriorityGet 1
-#define INCLUDE_vTaskDelete 1
-#define INCLUDE_vTaskCleanUpResources 0
-#define INCLUDE_vTaskSuspend 1
-#define INCLUDE_vTaskDelayUntil 1
-#define INCLUDE_vTaskDelay 1
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 0
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetCurrentTaskHandle 1
/* configTICK_USE_TC is a boolean indicating whether to use a Timer Counter
for the tick generation. Timer Counter will generate an accurate Tick;
- otherwise the CPU will generate a tick but with time drift
- configTICK_TC_CHANNEL is the TC channel.*/
+ otherwise the CPU will generate a tick but with time drift.
+ configTICK_TC_CHANNEL is the TC channel. */
#define configTICK_USE_TC 1
#define configTICK_TC_CHANNEL 2
+/* configHEAP_INIT is a boolean indicating whether to initialize the heap with
+ 0xA5 in order to be able to determine the maximal heap consumption. */
+#define configHEAP_INIT 0
+
+
#endif /* FREERTOS_CONFIG_H */
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/BasicSMTP/BasicSMTP.c b/Demo/lwIP_AVR32_UC3/NETWORK/BasicSMTP/BasicSMTP.c
index 0442eccd8..3dca3d37f 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/BasicSMTP/BasicSMTP.c
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/BasicSMTP/BasicSMTP.c
@@ -1,16 +1,14 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
- * \brief Basic SMTP Host for AVR32 UC3.
+ * \brief Basic SMTP Client for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -41,27 +39,28 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-
/*
- Implements a simplistic SMTP client.
+ Implements a simplistic SMTP client. First time the task is started, connection is made and
+ email is sent. Mail flag is then reset. Each time you press the Push Button 0, a new mail will be sent.
*/
#if (SMTP_USED == 1)
#include
-/* Scheduler includes. */
+// Scheduler includes.
#include "FreeRTOS.h"
#include "task.h"
#include "BasicSMTP.h"
-/* Demo includes. */
-#include "AVR32_EMAC.h"
+// Demo includes.
#include "portmacro.h"
#include "partest.h"
+#include "intc.h"
+#include "gpio.h"
-/* lwIP includes. */
+// lwIP includes.
#include "lwip/api.h"
#include "lwip/tcpip.h"
#include "lwip/memp.h"
@@ -73,75 +72,106 @@
#include "lwip/sockets.h"
#include "netif/loopif.h"
-/*! SMTP default port */
+//! SMTP default port
#define SMTP_PORT 25
-/*! SMTP EHLO code answer */
+//! SMTP EHLO code answer
#define SMTP_EHLO_STRING "220"
-/*! SMTP end of transmission code answer */
+//! SMTP end of transmission code answer
#define SMTP_END_OF_TRANSMISSION_STRING "221"
-/*! SMTP OK code answer */
+//! SMTP OK code answer
#define SMTP_OK_STRING "250"
-/*! SMTP start of transmission code answer */
+//! SMTP start of transmission code answer
#define SMTP_START_OF_TRANSMISSION_STRING "354"
-/*! SMTP DATA */
+//! SMTP DATA
#define SMTP_DATA_STRING "DATA\r\n"
-/*! SMTP . */
+//! SMTP .
#define SMTP_MAIL_END_STRING "\r\n.\r\n"
-/*! SMTP QUIT */
-#define SMTP_QUIT_STRING "QUIT\r\n\r\n"
+//! SMTP QUIT
+#define SMTP_QUIT_STRING "QUIT\r\n"
-/*! Server address */
+//! Server address
+#error configure SMTP server address
portCHAR cServer[] = "192.168.0.1";
-/*! Fill here the ehlo with your SMTP server name */
-#error configure SMTP server
-char ehlo[] = "EHLO smtp.domain.com\r\n";
+//! Fill here the mailfrom with your mail address
+#error configure SMTP mail sender
+char cMailfrom[] = "MAIL FROM: \r\n";
-/*! Fill here the mailfrom with your mail address */
-#error configure mail sender
-char mailfrom[] = "MAIL FROM: \r\n";
+//! Fill here the mailto with your contact mail address
+#error configure SMTP mail recipient
+char cMailto[] = "RCPT TO: \r\n";
-/*! Fill here the mailto with your contact mail address */
-#error configure mail receiver
-char mailto[] = "RCPT TO: \r\n";
+//! Fill here the mailcontent with the mail you want to send
+#error configure SMTP mail content
+char cMailcontent[] ="Subject: *** SPAM ***\r\nFROM: \"Your Name here\" \r\nTO: \"Your Contact here\" \r\n\r\nSay what you want here.";
-/*! Fill here the mailcontent with the mail you want to send */
-#error configure mail content
-char mailcontent[] ="Subject: *** SPAM ***\r\nFROM: \"Your Name here\" \r\nTO: \"Your Contact here\" \r\n\r\nSay what you want here.";
+//! flag to send mail
+Bool bSendMail = pdFALSE;
-Bool bSendMail = pdTRUE;
+//! buffer for SMTP response
portCHAR cTempBuffer[200];
-/*! Basic SMTP Host task definition */
-portTASK_FUNCTION( vBasicSMTPHost, pvParameters )
+
+//_____ D E C L A R A T I O N S ____________________________________________
+//! interrupt handler.
+#if __GNUC__
+__attribute__((naked))
+#elif __ICCAVR32__
+#pragma shadow_registers = full // Naked.
+#endif
+void vpushb_ISR( void );
+
+//! soft interrupt handler. where treatment should be done
+#if __GNUC__
+__attribute__((__noinline__))
+#endif
+static portBASE_TYPE prvpushb_ISR_NonNakedBehaviour( void );
+
+
+
+//! Basic SMTP client task definition
+portTASK_FUNCTION( vBasicSMTPClient, pvParameters )
{
struct sockaddr_in stServeurSockAddr;
portLONG lRetval;
portLONG lSocket = -1;
+ // configure push button 0 to produce IT on falling edge
+ gpio_enable_pin_interrupt(GPIO_PUSH_BUTTON_0 , GPIO_FALLING_EDGE);
+ // Disable all interrupts
+ vPortEnterCritical();
+ // register push button 0 handler on level 3
+ INTC_register_interrupt( (__int_handler)&vpushb_ISR, AVR32_GPIO_IRQ_0 + (GPIO_PUSH_BUTTON_0/8), INT3);
+ // Enable all interrupts
+ vPortExitCritical();
for (;;)
{
// wait for a signal to send a mail
while (bSendMail != pdTRUE) vTaskDelay(200);
+ // Disable all interrupts
+ vPortEnterCritical();
+ // clear the flag
+ bSendMail = pdFALSE;
+ // Enable all interrupts
+ vPortExitCritical();
+ // clear the LED
+ vParTestSetLED( 3 , pdFALSE );
// Set up port
memset(&stServeurSockAddr, 0, sizeof(stServeurSockAddr));
stServeurSockAddr.sin_len = sizeof(stServeurSockAddr);
stServeurSockAddr.sin_addr.s_addr = inet_addr(cServer);
stServeurSockAddr.sin_port = htons(SMTP_PORT);
stServeurSockAddr.sin_family = AF_INET;
-
- // clear the flag
- bSendMail = pdFALSE;
-
+
// socket as a stream
if ( (lSocket = socket(AF_INET, SOCK_STREAM, 0)) < 0)
{
// socket failed, blink a LED and stay here
for (;;) {
- vParTestToggleLED( 0 );
+ vParTestToggleLED( 4 );
vTaskDelay( 200 );
}
}
@@ -150,14 +180,14 @@ portTASK_FUNCTION( vBasicSMTPHost, pvParameters )
{
// connect failed, blink a LED and stay here
for (;;) {
- vParTestToggleLED( 1 );
+ vParTestToggleLED( 6 );
vTaskDelay( 200 );
}
}
else
{
//Server: 220 SMTP Ready
- /* wait for SMTP Server answer */
+ // wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
@@ -165,26 +195,23 @@ portTASK_FUNCTION( vBasicSMTPHost, pvParameters )
if (strncmp(cTempBuffer, SMTP_EHLO_STRING, sizeof(cTempBuffer)) >= 0)
{
//Client: EHLO smtp.domain.com
- /* send ehlo */
- send(lSocket, cEhlo, strlen(cEhlo), 0);
+ // send ehlo
+ send(lSocket, "HELO ", 5, 0);
+ send(lSocket, cServer, strlen(cServer), 0);
+ send(lSocket, "\r\n", 2, 0);
//Server: 250
- /* wait for SMTP Server answer */
+ // wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
}while (lRetval <= 0);
if (strncmp(cTempBuffer, SMTP_OK_STRING, sizeof(cTempBuffer)) >= 0)
{
-//Server: 250 HELP
- do
- {
- lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
- }while (lRetval <= 0);
//Client: MAIL FROM:
- /* send MAIL FROM */
+ // send MAIL FROM
send(lSocket, cMailfrom, strlen(cMailfrom), 0);
//Server: 250 OK
- /* wait for SMTP Server answer */
+ // wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
@@ -192,10 +219,10 @@ portTASK_FUNCTION( vBasicSMTPHost, pvParameters )
if (strncmp(cTempBuffer, SMTP_OK_STRING, sizeof(cTempBuffer)) >= 0)
{
//Client: RCPT TO:
- /* send RCPT TO */
+ // send RCPT TO
send(lSocket, cMailto, strlen(cMailto), 0);
//Server: 250 OK
- /* wait for SMTP Server answer */
+ // wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
@@ -203,23 +230,23 @@ portTASK_FUNCTION( vBasicSMTPHost, pvParameters )
if (strncmp(cTempBuffer, SMTP_OK_STRING, sizeof(cTempBuffer)) >= 0)
{
//Client: DATA
- /* send DATA */
+ // send DATA
send(lSocket, SMTP_DATA_STRING, 6, 0);
//Server: 354 Start mail input; end with .
- /* wait for SMTP Server answer */
+ // wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
}while (lRetval <= 0);
if (strncmp(cTempBuffer, SMTP_START_OF_TRANSMISSION_STRING, sizeof(cTempBuffer)) >= 0)
{
- /* send content */
+ // send content
send(lSocket, cMailcontent, strlen(cMailcontent), 0);
//Client: .
- /* send "." */
+ // send "."
send(lSocket, SMTP_MAIL_END_STRING, 5, 0);
//Server: 250 OK
- /* wait for SMTP Server answer */
+ // wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
@@ -227,7 +254,7 @@ portTASK_FUNCTION( vBasicSMTPHost, pvParameters )
if (strncmp(cTempBuffer, SMTP_OK_STRING, sizeof(cTempBuffer)) >= 0)
{
//Client: QUIT
- /* send QUIT */
+ // send QUIT
send(lSocket, SMTP_QUIT_STRING, 8, 0);
//Server: 221 smtp.domain.com closing transmission
do
@@ -243,10 +270,56 @@ portTASK_FUNCTION( vBasicSMTPHost, pvParameters )
}
}
}
- /* close socket */
+ // close socket
close(lSocket);
}
}
}
}
+
+/*! \brief push button naked interrupt handler.
+ *
+ */
+#if __GNUC__
+__attribute__((naked))
+#elif __ICCAVR32__
+#pragma shadow_registers = full // Naked.
+#endif
+void vpushb_ISR( void )
+{
+ /* This ISR can cause a context switch, so the first statement must be a
+ call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
+ variable declarations. */
+ portENTER_SWITCHING_ISR();
+
+ prvpushb_ISR_NonNakedBehaviour();
+
+ portEXIT_SWITCHING_ISR();
+}
+
+/*! \brief push button interrupt handler. Here, declarations should be done
+ *
+ */
+#if __GNUC__
+__attribute__((__noinline__))
+#elif __ICCAVR32__
+#pragma optimize = no_inline
+#endif
+static portBASE_TYPE prvpushb_ISR_NonNakedBehaviour( void )
+{
+ if (gpio_get_pin_interrupt_flag(GPIO_PUSH_BUTTON_0))
+ {
+ // set the flag
+ bSendMail = pdTRUE;
+ // allow new interrupt : clear the IFR flag
+ gpio_clear_pin_interrupt_flag(GPIO_PUSH_BUTTON_0);
+ }
+ // no context switch required, task is polling the flag
+ return( pdFALSE );
+}
+
+
+
+
+
#endif
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/BasicSMTP/BasicSMTP.h b/Demo/lwIP_AVR32_UC3/NETWORK/BasicSMTP/BasicSMTP.h
index ca9895886..b4e58b2d7 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/BasicSMTP/BasicSMTP.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/BasicSMTP/BasicSMTP.h
@@ -1,16 +1,14 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
- * \brief Basic SMTP Host for AVR32 UC3.
+ * \brief Basic SMTP Client for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -48,8 +46,8 @@
#include "portmacro.h"
-/* The function that implements the SMTP host task. */
-portTASK_FUNCTION_PROTO( vBasicSMTPHost, pvParameters );
+/* The function that implements the SMTP client task. */
+portTASK_FUNCTION_PROTO( vBasicSMTPClient, pvParameters );
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/BasicTFTP/BasicTFTP.c b/Demo/lwIP_AVR32_UC3/NETWORK/BasicTFTP/BasicTFTP.c
index 5b2c405ac..fe0838022 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/BasicTFTP/BasicTFTP.c
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/BasicTFTP/BasicTFTP.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -67,7 +65,6 @@
/* Demo includes. */
-#include "AVR32_EMAC.h"
#include "portmacro.h"
/* lwIP includes. */
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/BasicTFTP/BasicTFTP.h b/Demo/lwIP_AVR32_UC3/NETWORK/BasicTFTP/BasicTFTP.h
index 92fdf4f9f..371a9b594 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/BasicTFTP/BasicTFTP.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/BasicTFTP/BasicTFTP.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -123,16 +121,29 @@ char *s_proto; /* protocol to use */
#define ACK 04 /* acknowledgement */
#define ERROR 05 /* error code */
+#if __ICCAVR32__
+#pragma pack(1)
+#endif
struct tftphdr {
short th_opcode; /* packet type */
union {
unsigned short tu_block; /* block # */
short tu_code; /* error code */
char tu_stuff[1]; /* request packet stuff */
- } __attribute__ ((packed)) th_u;
+ }
+#if __GNUC__
+ __attribute__ ((packed))
+#endif
+ th_u;
char th_data[1]; /* data or error string */
-} __attribute__ ((packed));
-
+}
+#if __GNUC__
+__attribute__ ((packed))
+#endif
+;
+#if __ICCAVR32__
+#pragma pack()
+#endif
/* The function that implements the TFTP server task. */
portTASK_FUNCTION_PROTO( vBasicTFTPServer, pvParameters );
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/BasicWEB/BasicWEB.c b/Demo/lwIP_AVR32_UC3/NETWORK/BasicWEB/BasicWEB.c
index a54f214bd..80a381ed7 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/BasicWEB/BasicWEB.c
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/BasicWEB/BasicWEB.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -44,7 +42,7 @@
/*
Implements a simplistic WEB server. Every time a connection is made and
- data is received a dynamic page that shows the current FreeRTOS.org kernel
+ data is received a dynamic page that shows the current FreeRTOS.org kernel
statistics is generated and returned. The connection is then closed.
This file was adapted from a FreeRTOS lwIP slip demo supplied by a third
@@ -57,7 +55,6 @@
/* Standard includes. */
#include
#include
-#include
#include "conf_eth.h"
@@ -70,13 +67,12 @@
/* Demo includes. */
/* Demo app includes. */
-#include "AVR32_EMAC.h"
#include "portmacro.h"
/* lwIP includes. */
-#include "lwip/api.h"
+#include "lwip/api.h"
#include "lwip/tcpip.h"
-#include "lwip/memp.h"
+#include "lwip/memp.h"
#include "lwip/stats.h"
#include "netif/loopif.h"
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/BasicWEB/BasicWEB.h b/Demo/lwIP_AVR32_UC3/NETWORK/BasicWEB/BasicWEB.h
index 70722d5c2..95e932dd5 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/BasicWEB/BasicWEB.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/BasicWEB/BasicWEB.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/AVR32_CONF_EMAC.h b/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/AVR32_CONF_EMAC.h
deleted file mode 100644
index aff683a49..000000000
--- a/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/AVR32_CONF_EMAC.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief EMAC abstraction layer for AVR32 UC3.
- *
- * - Compiler: GNU GCC for AVR32
- * - Supported devices: All AVR32 devices can be used.
- * - AppNote:
- *
- * \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
- *
- *****************************************************************************/
-
-/* Copyright (c) 2007, Atmel Corporation All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of ATMEL may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
- * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef AVR32_CONF_EMAC_H
-#define AVR32_CONF_EMAC_H
-
-#include "lwip/opt.h"
-
-/*! Number of receive buffers */
-#define NB_RX_BUFFERS 20
-
-/*! USE_RMII_INTERFACE must be defined as 1 to use an RMII interface, or 0
-to use an MII interface. */
-#define USE_RMII_INTERFACE 1
-
-/*! Number of Transmit buffers */
-#define NB_TX_BUFFERS ( MEMP_NUM_PBUF / 2 )
-
-/*! Size of each Transmit buffer. */
-#define ETH_TX_BUFFER_SIZE 1024 //( PBUF_POOL_BUFSIZE )
-
-#endif //* AVR32_CONF_EMAC_H
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/AVR32_EMAC.c b/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/AVR32_EMAC.c
deleted file mode 100644
index a5ee1b89e..000000000
--- a/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/AVR32_EMAC.c
+++ /dev/null
@@ -1,785 +0,0 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief EMAC abstraction layer for AVR32 UC3.
- *
- * - Compiler: GNU GCC for AVR32
- * - Supported devices: All AVR32 devices with a MACB can be used.
- * - AppNote:
- *
- * \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
- *
- *****************************************************************************/
-
-/* Copyright (c) 2007, Atmel Corporation All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of ATMEL may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
- * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-
-/*
- * Interrupt driven driver for the EMAC peripheral. This driver is not
- * reentrant, re-entrancy is handled by a semaphore at the network interface
- * level.
- */
-
-
-/* Standard includes. */
-#include
-#include
-
-/* Scheduler includes. */
-#include "FreeRTOS.h"
-#include "semphr.h"
-#include "task.h"
-
-/* Demo app includes. */
-#include "AVR32_EMAC.h"
-#include "AVR32_CONF_EMAC.h"
-#include "DP83848.h"
-#include "intc.h"
-
-/* Hardware specific includes. */
-#include "gpio.h"
-
-/* Size of each receive buffer - DO NOT CHANGE. */
-#define ETH_RX_BUFFER_SIZE 128
-
-/* The buffer addresses written into the descriptors must be aligned so the
-last few bits are zero. These bits have special meaning for the EMAC
-peripheral and cannot be used as part of the address. */
-#define emacADDRESS_MASK ( ( unsigned portLONG ) 0xFFFFFFFC )
-
-/* Bit used within the address stored in the descriptor to mark the last
-descriptor in the array. */
-#define emacRX_WRAP_BIT ( ( unsigned portLONG ) 0x02 )
-
-
-/* A short delay is used to wait for a buffer to become available, should
-one not be immediately available when trying to transmit a frame. */
-#define emacBUFFER_WAIT_DELAY ( 2 )
-#define emacMAX_WAIT_CYCLES ( ( portBASE_TYPE ) ( configTICK_RATE_HZ / 40 ) )
-
-/* The time to block waiting for input. */
-#define emacBLOCK_TIME_WAITING_FOR_INPUT ( ( portTickType ) 100 )
-
-/* Misc defines. */
-#define emacNO_DELAY ( 0 )
-
-/*-----------------------------------------------------------*/
-
-/* Buffer written to by the EMAC DMA. Must be aligned as described by the
-comment above the emacADDRESS_MASK definition. */
-static volatile portCHAR pcRxBuffer[ NB_RX_BUFFERS * ETH_RX_BUFFER_SIZE ] __attribute__ ((aligned (8)));
-
-/* Buffer read by the EMAC DMA. Must be aligned as described by the comment
-above the emacADDRESS_MASK definition. */
-static portCHAR pcTxBuffer[ NB_TX_BUFFERS * ETH_TX_BUFFER_SIZE ] __attribute__ ((aligned (8)));
-
-/* Descriptors used to communicate between the program and the EMAC peripheral.
-These descriptors hold the locations and state of the Rx and Tx buffers. */
-static volatile AVR32_TxTdDescriptor xTxDescriptors[ NB_TX_BUFFERS ];
-static volatile AVR32_RxTdDescriptor xRxDescriptors[ NB_RX_BUFFERS ];
-
-/* The IP and Ethernet addresses are read from the header files. */
-portCHAR cMACAddress[ 6 ] = { emacETHADDR0, emacETHADDR1, emacETHADDR2, emacETHADDR3, emacETHADDR4, emacETHADDR5 };
-
-/*-----------------------------------------------------------*/
-
-/* See the header file for descriptions of public functions. */
-
-/*
- * Prototype for the EMAC interrupt function - called by the asm wrapper.
- */
-void vEMAC_ISR( void ) __attribute__ ((naked));
-
-/*
- * Initialise both the Tx and Rx descriptors used by the EMAC.
- */
-static void prvSetupDescriptors(void);
-
-/*
- * Write our MAC address into the EMAC.
- */
-static void prvSetupMACAddress( void );
-
-/*
- * Configure the EMAC and AIC for EMAC interrupts.
- */
-static void prvSetupEMACInterrupt( void );
-
-/*
- * Some initialisation functions taken from the Atmel EMAC sample code.
- */
-static unsigned portLONG vReadPHY( unsigned portCHAR ucAddress );
-
-static void vWritePHY( unsigned portCHAR ucAddress, unsigned portLONG ulValue);
-
-static portBASE_TYPE prvProbePHY( void );
-
-/* The semaphore used by the EMAC ISR to wake the EMAC task. */
-static xSemaphoreHandle xSemaphore = NULL;
-
-/* Holds the index to the next buffer from which data will be read. */
-static volatile unsigned portLONG ulNextRxBuffer = 0;
-
-/*-----------------------------------------------------------*/
-
-/* See the header file for descriptions of public functions. */
-portLONG lEMACSend( portCHAR *pcFrom, unsigned portLONG ulLength, portLONG lEndOfFrame )
-{
-static unsigned portBASE_TYPE uxTxBufferIndex = 0;
-//portBASE_TYPE xWaitCycles = 0;
-portLONG lReturn = pdPASS;
-portCHAR *pcBuffer;
-unsigned portLONG ulLastBuffer, ulDataBuffered = 0, ulDataRemainingToSend, ulLengthToSend;
-
- /* If the length of data to be transmitted is greater than each individual
- transmit buffer then the data will be split into more than one buffer.
- Loop until the entire length has been buffered. */
- while( ulDataBuffered < ulLength )
- {
- /* Is a buffer available? */
- while( !( xTxDescriptors[ uxTxBufferIndex ].U_Status.status & AVR32_TRANSMIT_OK ) )
- {
- /* There is no room to write the Tx data to the Tx buffer. Wait a
- short while, then try again. */
- vTaskDelay( emacBUFFER_WAIT_DELAY );
- }
-
- /* lReturn will only be pdPASS if a buffer is available. */
- if( lReturn == pdPASS )
- {
- portENTER_CRITICAL();
- {
- /* Get the address of the buffer from the descriptor, then copy
- the data into the buffer. */
- pcBuffer = ( portCHAR * ) xTxDescriptors[ uxTxBufferIndex ].addr;
-
- /* How much can we write to the buffer? */
- ulDataRemainingToSend = ulLength - ulDataBuffered;
- if( ulDataRemainingToSend <= ETH_TX_BUFFER_SIZE )
- {
- /* We can write all the remaining bytes. */
- ulLengthToSend = ulDataRemainingToSend;
- }
- else
- {
- /* We can not write more than ETH_TX_BUFFER_SIZE in one go. */
- ulLengthToSend = ETH_TX_BUFFER_SIZE;
- }
-
- /* Copy the data into the buffer. */
- memcpy( ( void * ) pcBuffer, ( void * ) &( pcFrom[ ulDataBuffered ] ), ulLengthToSend );
- ulDataBuffered += ulLengthToSend;
-
- /* Is this the last data for the frame? */
- if( lEndOfFrame && ( ulDataBuffered >= ulLength ) )
- {
- /* No more data remains for this frame so we can start the
- transmission. */
- ulLastBuffer = AVR32_LAST_BUFFER;
- }
- else
- {
- /* More data to come for this frame. */
- ulLastBuffer = 0;
- }
-
- /* Fill out the necessary in the descriptor to get the data sent,
- then move to the next descriptor, wrapping if necessary. */
- if( uxTxBufferIndex >= ( NB_TX_BUFFERS - 1 ) )
- {
- xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned portLONG ) AVR32_LENGTH_FRAME )
- | ulLastBuffer
- | AVR32_TRANSMIT_WRAP;
- uxTxBufferIndex = 0;
- }
- else
- {
- xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned portLONG ) AVR32_LENGTH_FRAME )
- | ulLastBuffer;
- uxTxBufferIndex++;
- }
-
- /* If this is the last buffer to be sent for this frame we can
- start the transmission. */
- if( ulLastBuffer )
- {
- AVR32_MACB.ncr |= AVR32_MACB_TSTART_MASK;
- }
- }
- portEXIT_CRITICAL();
- }
- else
- {
- break;
- }
- }
-
- return lReturn;
-}
-/*-----------------------------------------------------------*/
-
-/* See the header file for descriptions of public functions. */
-unsigned portLONG ulEMACInputLength( void )
-{
-register unsigned portLONG ulIndex , ulLength = 0;
-
- /* Skip any fragments. We are looking for the first buffer that contains
- data and has the SOF (start of frame) bit set. */
- while( ( xRxDescriptors[ ulNextRxBuffer ].addr & AVR32_OWNERSHIP_BIT ) && !( xRxDescriptors[ ulNextRxBuffer ].U_Status.status & AVR32_SOF ) )
- {
- /* Ignoring this buffer. Mark it as free again. */
- xRxDescriptors[ ulNextRxBuffer ].addr &= ~( AVR32_OWNERSHIP_BIT );
- ulNextRxBuffer++;
- if( ulNextRxBuffer >= NB_RX_BUFFERS )
- {
- ulNextRxBuffer = 0;
- }
- }
-
- /* We are going to walk through the descriptors that make up this frame,
- but don't want to alter ulNextRxBuffer as this would prevent vEMACRead()
- from finding the data. Therefore use a copy of ulNextRxBuffer instead. */
- ulIndex = ulNextRxBuffer;
- /* Walk through the descriptors until we find the last buffer for this
- frame. The last buffer will give us the length of the entire frame. */
- while( ( xRxDescriptors[ ulIndex ].addr & AVR32_OWNERSHIP_BIT ) && !ulLength )
- {
- ulLength = xRxDescriptors[ ulIndex ].U_Status.status & AVR32_LENGTH_FRAME;
- /* Increment to the next buffer, wrapping if necessary. */
- ulIndex++;
- if( ulIndex >= NB_RX_BUFFERS )
- {
- ulIndex = 0;
- }
- }
- return ulLength;
-}
-/*-----------------------------------------------------------*/
-
-/* See the header file for descriptions of public functions. */
-void vEMACRead( portCHAR *pcTo, unsigned portLONG ulSectionLength, unsigned portLONG ulTotalFrameLength )
-{
-static unsigned portLONG ulSectionBytesReadSoFar = 0, ulBufferPosition = 0, ulFameBytesReadSoFar = 0;
-static portCHAR *pcSource;
-register unsigned portLONG ulBytesRemainingInBuffer, ulRemainingSectionBytes;
-
- /* Read ulSectionLength bytes from the Rx buffers. This is not necessarily any
- correspondence between the length of our Rx buffers, and the length of the
- data we are returning or the length of the data being requested. Therefore,
- between calls we have to remember not only which buffer we are currently
- processing, but our position within that buffer. This would be greatly
- simplified if PBUF_POOL_BUFSIZE could be guaranteed to be greater than
- the size of each Rx buffer, and that memory fragmentation did not occur.
-
- This function should only be called after a call to ulEMACInputLength().
- This will ensure ulNextRxBuffer is set to the correct buffer. */
-
-
- /* vEMACRead is called with pcTo set to NULL to indicate that we are about
- to read a new frame. Any fragments remaining in the frame we were
- processing during the last call should be dropped. */
- if( pcTo == NULL )
- {
- /* How many bytes are indicated as being in this buffer? If none then
- the buffer is completely full and the frame is contained within more
- than one buffer. */
- /* Reset our state variables ready for the next read from this buffer. */
- pcSource = ( portCHAR * )( xRxDescriptors[ ulNextRxBuffer ].addr & emacADDRESS_MASK );
- ulFameBytesReadSoFar = ( unsigned portLONG ) 0;
- ulBufferPosition = ( unsigned portLONG ) 0;
- }
- else
- {
- /* Loop until we have obtained the required amount of data. */
- ulSectionBytesReadSoFar = 0;
- while( ulSectionBytesReadSoFar < ulSectionLength )
- {
- /* We may have already read some data from this buffer. How much
- data remains in the buffer? */
- ulBytesRemainingInBuffer = ( ETH_RX_BUFFER_SIZE - ulBufferPosition );
-
- /* How many more bytes do we need to read before we have the
- required amount of data? */
- ulRemainingSectionBytes = ulSectionLength - ulSectionBytesReadSoFar;
-
- /* Do we want more data than remains in the buffer? */
- if( ulRemainingSectionBytes > ulBytesRemainingInBuffer )
- {
- /* We want more data than remains in the buffer so we can
- write the remains of the buffer to the destination, then move
- onto the next buffer to get the rest. */
- memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulBytesRemainingInBuffer );
- ulSectionBytesReadSoFar += ulBytesRemainingInBuffer;
- ulFameBytesReadSoFar += ulBytesRemainingInBuffer;
-
- /* Mark the buffer as free again. */
- xRxDescriptors[ ulNextRxBuffer ].addr &= ~( AVR32_OWNERSHIP_BIT );
- /* Move onto the next buffer. */
- ulNextRxBuffer++;
- if( ulNextRxBuffer >= NB_RX_BUFFERS )
- {
- ulNextRxBuffer = ( unsigned portLONG ) 0;
- }
-
- /* Reset the variables for the new buffer. */
- pcSource = ( portCHAR * )( xRxDescriptors[ ulNextRxBuffer ].addr & emacADDRESS_MASK );
- ulBufferPosition = ( unsigned portLONG ) 0;
- }
- else
- {
- /* We have enough data in this buffer to send back. Read out
- enough data and remember how far we read up to. */
- memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulRemainingSectionBytes );
-
- /* There may be more data in this buffer yet. Increment our
- position in this buffer past the data we have just read. */
- ulBufferPosition += ulRemainingSectionBytes;
- ulSectionBytesReadSoFar += ulRemainingSectionBytes;
- ulFameBytesReadSoFar += ulRemainingSectionBytes;
-
- /* Have we now finished with this buffer? */
- if( ( ulBufferPosition >= ETH_RX_BUFFER_SIZE ) || ( ulFameBytesReadSoFar >= ulTotalFrameLength ) )
- {
- /* Mark the buffer as free again. */
- xRxDescriptors[ ulNextRxBuffer ].addr &= ~( AVR32_OWNERSHIP_BIT );
- /* Move onto the next buffer. */
- ulNextRxBuffer++;
- if( ulNextRxBuffer >= NB_RX_BUFFERS )
- {
- ulNextRxBuffer = 0;
- }
- pcSource = ( portCHAR * )( xRxDescriptors[ ulNextRxBuffer ].addr & emacADDRESS_MASK );
- ulBufferPosition = 0;
- }
- }
- }
- }
-}
-/*-----------------------------------------------------------*/
-void vEMACSetMACAddress(const portCHAR * EMACAddress)
-{
- memcpy(cMACAddress, EMACAddress, sizeof(cMACAddress));
-}
-
-/* See the header file for descriptions of public functions. */
-xSemaphoreHandle xEMACInit( void )
-{
-unsigned long status;
-
- /* enable GPIO's */
- gpio_enable_module_pin(AVR32_MACB_TX_CLK_0_PIN, AVR32_MACB_TX_CLK_0_FUNCTION); //PB0
- gpio_enable_module_pin(AVR32_MACB_TX_EN_0_PIN, AVR32_MACB_TX_EN_0_FUNCTION); //PB1
- gpio_enable_module_pin(AVR32_MACB_TXD_0_PIN, AVR32_MACB_TXD_0_FUNCTION); //PB2
- gpio_enable_module_pin(AVR32_MACB_TXD_1_PIN, AVR32_MACB_TXD_1_FUNCTION); //PB3
-
- gpio_enable_module_pin(AVR32_MACB_RXD_0_PIN, AVR32_MACB_RXD_0_FUNCTION); //PB5
- gpio_enable_module_pin(AVR32_MACB_RXD_1_PIN, AVR32_MACB_RXD_1_FUNCTION); //PB6
- gpio_enable_module_pin(AVR32_MACB_RX_ER_0_PIN, AVR32_MACB_RX_ER_0_FUNCTION); //PB7
- gpio_enable_module_pin(AVR32_MACB_MDC_0_PIN, AVR32_MACB_MDC_0_FUNCTION); //PB8
- gpio_enable_module_pin(AVR32_MACB_MDIO_0_PIN, AVR32_MACB_MDIO_0_FUNCTION); //PB9
-
- gpio_enable_module_pin(AVR32_MACB_RX_DV_0_PIN, AVR32_MACB_RX_DV_0_FUNCTION); //PB15
-
-
- /* set up registers */
- AVR32_MACB.ncr = 0;
- AVR32_MACB.tsr = ~0UL;
- AVR32_MACB.rsr = ~0UL;
- AVR32_MACB.idr = ~0UL;
- status = AVR32_MACB.isr;
-
-
-#ifndef USE_RMII_INTERFACE
- // RMII not used, set 1 to the USRIO Register
- AVR32_MACB.usrio |= AVR32_MACB_RMII_MASK;
-#else
- // RMII used, set 0 to the USRIO Register
- AVR32_MACB.usrio &= ~AVR32_MACB_RMII_MASK;
-#endif
-
- /* Load our MAC address into the EMAC. */
- prvSetupMACAddress();
-
- /* Setup the buffers and descriptors. */
- prvSetupDescriptors();
-
-#if configCPU_CLOCK_HZ <= 20000000
- AVR32_MACB.ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV8 << AVR32_MACB_NCFGR_CLK_OFFSET);
-#elif configCPU_CLOCK_HZ <= 40000000
- AVR32_MACB.ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV16 << AVR32_MACB_NCFGR_CLK_OFFSET);
-#elif configCPU_CLOCK_HZ <= 80000000
- AVR32_MACB.ncfgr |= AVR32_MACB_NCFGR_CLK_DIV32 << AVR32_MACB_NCFGR_CLK_OFFSET;
-#elif configCPU_CLOCK_HZ <= 160000000
- AVR32_MACB.ncfgr |= AVR32_MACB_NCFGR_CLK_DIV64 << AVR32_MACB_NCFGR_CLK_OFFSET;
-#else
-# error System clock too fast
-#endif
-
- /* Are we connected? */
- if( prvProbePHY() )
- {
- /* Enable the interrupt! */
- portENTER_CRITICAL();
- {
- prvSetupEMACInterrupt();
- vPassEMACSemaphore( xSemaphore );
- }
- portEXIT_CRITICAL();
- /* Enable Rx and Tx, plus the stats register. */
- AVR32_MACB.ncr = AVR32_MACB_NCR_TE_MASK | AVR32_MACB_NCR_RE_MASK;
- }
- return xSemaphore;
-}
-
-/* See the header file for descriptions of public functions. */
-void vClearEMACTxBuffer( void )
-{
-static unsigned portBASE_TYPE uxNextBufferToClear = 0;
-
- /* Called on Tx interrupt events to set the AT91C_TRANSMIT_OK bit in each
- Tx buffer within the frame just transmitted. This marks all the buffers
- as available again.
-
- The first buffer in the frame should have the bit set automatically. */
- if( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_TRANSMIT_OK )
- {
- /* Loop through the other buffers in the frame. */
- while( !( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_LAST_BUFFER ) )
- {
- uxNextBufferToClear++;
-
- if( uxNextBufferToClear >= NB_TX_BUFFERS )
- {
- uxNextBufferToClear = 0;
- }
-
- xTxDescriptors[ uxNextBufferToClear ].U_Status.status |= AVR32_TRANSMIT_OK;
- }
-
- /* Start with the next buffer the next time a Tx interrupt is called. */
- uxNextBufferToClear++;
-
- /* Do we need to wrap back to the first buffer? */
- if( uxNextBufferToClear >= NB_TX_BUFFERS )
- {
- uxNextBufferToClear = 0;
- }
- }
-}
-/*-----------------------------------------------------------*/
-
-static void prvSetupDescriptors(void)
-{
-unsigned portBASE_TYPE xIndex;
-unsigned portLONG ulAddress;
-
- /* Initialise xRxDescriptors descriptor. */
- for( xIndex = 0; xIndex < NB_RX_BUFFERS; ++xIndex )
- {
- /* Calculate the address of the nth buffer within the array. */
- ulAddress = ( unsigned portLONG )( pcRxBuffer + ( xIndex * ETH_RX_BUFFER_SIZE ) );
-
- /* Write the buffer address into the descriptor. The DMA will place
- the data at this address when this descriptor is being used. Mask off
- the bottom bits of the address as these have special meaning. */
- xRxDescriptors[ xIndex ].addr = ulAddress & emacADDRESS_MASK;
- }
-
- /* The last buffer has the wrap bit set so the EMAC knows to wrap back
- to the first buffer. */
- xRxDescriptors[ NB_RX_BUFFERS - 1 ].addr |= emacRX_WRAP_BIT;
-
- /* Initialise xTxDescriptors. */
- for( xIndex = 0; xIndex < NB_TX_BUFFERS; ++xIndex )
- {
- /* Calculate the address of the nth buffer within the array. */
- ulAddress = ( unsigned portLONG )( pcTxBuffer + ( xIndex * ETH_TX_BUFFER_SIZE ) );
-
- /* Write the buffer address into the descriptor. The DMA will read
- data from here when the descriptor is being used. */
- xTxDescriptors[ xIndex ].addr = ulAddress & emacADDRESS_MASK;
- xTxDescriptors[ xIndex ].U_Status.status = AVR32_TRANSMIT_OK;
- }
-
- /* The last buffer has the wrap bit set so the EMAC knows to wrap back
- to the first buffer. */
- xTxDescriptors[ NB_TX_BUFFERS - 1 ].U_Status.status = AVR32_TRANSMIT_WRAP | AVR32_TRANSMIT_OK;
-
- /* Tell the EMAC where to find the descriptors. */
- AVR32_MACB.rbqp = ( unsigned portLONG )xRxDescriptors;
- AVR32_MACB.tbqp = ( unsigned portLONG )xTxDescriptors;
-
- /* Enable the copy of data into the buffers, ignore broadcasts,
- and don't copy FCS. */
- AVR32_MACB.ncfgr |= (AVR32_MACB_CAF_MASK | AVR32_MACB_NBC_MASK | AVR32_MACB_NCFGR_DRFCS_MASK);
-
-}
-/*-----------------------------------------------------------*/
-
-static void prvSetupMACAddress( void )
-{
- /* Must be written SA1L then SA1H. */
- AVR32_MACB.sa1b = ( ( unsigned portLONG ) cMACAddress[ 3 ] << 24 ) |
- ( ( unsigned portLONG ) cMACAddress[ 2 ] << 16 ) |
- ( ( unsigned portLONG ) cMACAddress[ 1 ] << 8 ) |
- cMACAddress[ 0 ];
-
- AVR32_MACB.sa1t = ( ( unsigned portLONG ) cMACAddress[ 5 ] << 8 ) |
- cMACAddress[ 4 ];
-}
-/*-----------------------------------------------------------*/
-
-static void prvSetupEMACInterrupt( void )
-{
- /* Create the semaphore used to trigger the EMAC task. */
- if (xSemaphore == NULL)
- {
- vSemaphoreCreateBinary( xSemaphore );
- }
-
- if( xSemaphore )
- {
- /* We start by 'taking' the semaphore so the ISR can 'give' it when the
- first interrupt occurs. */
- xSemaphoreTake( xSemaphore, emacNO_DELAY );
- portENTER_CRITICAL();
- {
- /* Setup the interrupt for USART0.
- Register the USART0 interrupt handler to the interrupt controller
- at interrupt level 2. */
- INTC_register_interrupt(&vEMAC_ISR, AVR32_MACB_IRQ, INT2);
-
- /* We want to interrupt on Rx and Tx events. */
- AVR32_MACB.ier = AVR32_MACB_IER_RCOMP_MASK | AVR32_MACB_IER_TCOMP_MASK;
- }
- portEXIT_CRITICAL();
- }
-}
-
-/*
- * The following functions are initialisation functions taken from the Atmel
- * EMAC sample code.
- */
-static portBASE_TYPE prvProbePHY( void )
-{
-unsigned long mii_status, advertise, lpa, phy_ctrl;
-unsigned long config;
-unsigned long upper, lower,mode;
-unsigned long physID;
-
- /* Read Phy Identifier register 1 & 2 */
- lower = vReadPHY(PHY_PHYSID2);
- upper = vReadPHY(PHY_PHYSID1);
- /* get Phy ID, ignore Revision */
- physID = ((upper << 16) & 0xFFFF0000) | (lower & 0xFFF0);
- /* check if it match config */
- if (physID == MII_DP83848_ID)
- {
- /* read RBR */
- mode = vReadPHY(PHY_RBR);
- /* set RMII mode if not done */
- if ((mode & RBR_RMII) != RBR_RMII)
- {
- /* force RMII flag if strap options are wrong */
- mode |= RBR_RMII;
- vWritePHY(PHY_RBR,mode);
- }
-
- /* set advertise register */
-#if ETHERNET_CONF_AN_ENABLE == 1
- advertise = ADVERTISE_CSMA | ADVERTISE_ALL;
-#else
- advertise = ADVERTISE_CSMA;
- #if ETHERNET_CONF_USE_100MB
- #if ETHERNET_CONF_USE_FULL_DUPLEX
- advertise |= ADVERTISE_100FULL;
- #else
- advertise |= ADVERTISE_100HALF;
- #endif
- #else
- #if ETHERNET_CONF_USE_FULL_DUPLEX
- advertise |= ADVERTISE_10FULL;
- #else
- advertise |= ADVERTISE_10HALF;
- #endif
- #endif
-#endif
- /* write advertise register */
- vWritePHY(PHY_ADVERTISE, advertise);
- /* read Control register */
- config = vReadPHY(PHY_BMCR);
- /* read Phy Control register */
- phy_ctrl = vReadPHY(PHY_PHYCR);
-#if ETHERNET_CONF_AN_ENABLE
- #if ETHERNET_CONF_AUTO_CROSS_ENABLE
- /* enable Auto MDIX */
- phy_ctrl |= PHYCR_MDIX_EN;
- #else
- /* disable Auto MDIX */
- phy_ctrl &= ~PHYCR_MDIX_EN;
- #if ETHERNET_CONF_CROSSED_LINK
- /* force direct link = Use crossed RJ45 cable */
- phy_ctrl &= ~PHYCR_MDIX_FORCE;
- #else
- /* force crossed link = Use direct RJ45 cable */
- phy_ctrl |= PHYCR_MDIX_FORCE;
- #endif
- #endif
- /* reset auto-negociation capability */
- config |= (BMCR_ANRESTART | BMCR_ANENABLE);
-#else
- /* disable Auto MDIX */
- phy_ctrl &= ~PHYCR_MDIX_EN;
- #if ETHERNET_CONF_CROSSED_LINK
- /* force direct link = Use crossed RJ45 cable */
- phy_ctrl &= ~PHYCR_MDIX_FORCE;
- #else
- /* force crossed link = Use direct RJ45 cable */
- phy_ctrl |= PHYCR_MDIX_FORCE;
- #endif
- /* clear AN bit */
- config &= ~BMCR_ANENABLE;
-
- #if ETHERNET_CONF_USE_100MB
- config |= BMCR_SPEED100;
- #else
- config &= ~BMCR_SPEED100;
- #endif
- #if ETHERNET_CONF_USE_FULL_DUPLEX
- config |= BMCR_FULLDPLX;
- #else
- config &= ~BMCR_FULLDPLX;
- #endif
-#endif
- /* update Phy ctrl register */
- vWritePHY(PHY_PHYCR, phy_ctrl);
-
- /* update ctrl register */
- vWritePHY(PHY_BMCR, config);
-
- /* loop while link status isn't OK */
- do {
- mii_status = vReadPHY(PHY_BMSR);
- } while (!(mii_status & BMSR_LSTATUS));
-
- /* read the LPA configuration of the PHY */
- lpa = vReadPHY(PHY_LPA);
-
- /* read the MACB config register */
- config = AVR32_MACB.ncfgr;
-
- /* if 100MB needed */
- if ((lpa & advertise) & (LPA_100HALF | LPA_100FULL))
- {
- config |= AVR32_MACB_SPD_MASK;
- }
- else
- {
- config &= ~(AVR32_MACB_SPD_MASK);
- }
-
- /* if FULL DUPLEX needed */
- if ((lpa & advertise) & (LPA_10FULL | LPA_100FULL))
- {
- config |= AVR32_MACB_FD_MASK;
- }
- else
- {
- config &= ~(AVR32_MACB_FD_MASK);
- }
-
- /* write the MACB config register */
- AVR32_MACB.ncfgr = config;
-
- return pdPASS;
- }
- return pdFAIL;
-}
-
-static unsigned portLONG vReadPHY( unsigned portCHAR ucAddress )
-{
- unsigned portLONG pulValue;
-
- /* Enable management port */
- AVR32_MACB.ncr |= AVR32_MACB_NCR_MPE_MASK;
-
- /* configure MDIO frame in MAN register */
- AVR32_MACB.man = (AVR32_MACB_SOF_MASK & (0x01<
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
-
-#include
-
-#include "conf_eth.h"
-
-
-/* Receive Transfer descriptor structure */
-typedef struct _AVR32_RxTdDescriptor {
- unsigned int addr;
- union
- {
- unsigned int status;
- struct {
- unsigned int BroadCast:1;
- unsigned int MultiCast:1;
- unsigned int UniCast:1;
- unsigned int ExternalAdd:1;
- unsigned int Res1:1;
- unsigned int Sa1Match:1;
- unsigned int Sa2Match:1;
- unsigned int Sa3Match:1;
- unsigned int Sa4Match:1;
- unsigned int TypeID:1;
- unsigned int VlanTag:1;
- unsigned int PriorityTag:1;
- unsigned int VlanPriority:3;
- unsigned int Cfi:1;
- unsigned int EndOfFrame:1;
- unsigned int StartOfFrame:1;
- unsigned int Rxbuf_off:2;
- unsigned int Res0:1;
- unsigned int Length:11;
- }S_Status;
- }U_Status;
-}AVR32_RxTdDescriptor, *AVR32P_RxTdDescriptor;
-
-
-/* Transmit Transfer descriptor structure */
-typedef struct _AVR32_TxTdDescriptor {
- unsigned int addr;
- union
- {
- unsigned int status;
- struct {
- unsigned int BuffUsed:1;
- unsigned int Wrap:1;
- unsigned int TransmitError:1;
- unsigned int TransmitUnderrun:1;
- unsigned int BufExhausted:1;
- unsigned int Res1:10;
- unsigned int NoCrc:1;
- unsigned int LastBuff:1;
- unsigned int Res0:4;
- unsigned int Length:11;
- }S_Status;
- }U_Status;
-}AVR32_TxTdDescriptor, *AVR32P_TxTdDescriptor;
-
-#define AVR32_OWNERSHIP_BIT 0x00000001
-
-/* Receive status defintion */
-#define AVR32_BROADCAST_ADDR ((unsigned int) (1 << 31)) //* Broadcat address detected
-#define AVR32_MULTICAST_HASH ((unsigned int) (1 << 30)) //* MultiCast hash match
-#define AVR32_UNICAST_HASH ((unsigned int) (1 << 29)) //* UniCast hash match
-#define AVR32_EXTERNAL_ADDR ((unsigned int) (1 << 28)) //* External Address match
-#define AVR32_SA1_ADDR ((unsigned int) (1 << 26)) //* Specific address 1 match
-#define AVR32_SA2_ADDR ((unsigned int) (1 << 25)) //* Specific address 2 match
-#define AVR32_SA3_ADDR ((unsigned int) (1 << 24)) //* Specific address 3 match
-#define AVR32_SA4_ADDR ((unsigned int) (1 << 23)) //* Specific address 4 match
-#define AVR32_TYPE_ID ((unsigned int) (1 << 22)) //* Type ID match
-#define AVR32_VLAN_TAG ((unsigned int) (1 << 21)) //* VLAN tag detected
-#define AVR32_PRIORITY_TAG ((unsigned int) (1 << 20)) //* PRIORITY tag detected
-#define AVR32_VLAN_PRIORITY ((unsigned int) (7 << 17)) //* PRIORITY Mask
-#define AVR32_CFI_IND ((unsigned int) (1 << 16)) //* CFI indicator
-#define AVR32_EOF ((unsigned int) (1 << 15)) //* EOF
-#define AVR32_SOF ((unsigned int) (1 << 14)) //* SOF
-#define AVR32_RBF_OFFSET ((unsigned int) (3 << 12)) //* Receive Buffer Offset Mask
-#define AVR32_LENGTH_FRAME ((unsigned int) 0x0FFF) //* Length of frame
-
-/* Transmit Status definition */
-#define AVR32_TRANSMIT_OK ((unsigned int) (1 << 31)) //*
-#define AVR32_TRANSMIT_WRAP ((unsigned int) (1 << 30)) //* Wrap bit: mark the last descriptor
-#define AVR32_TRANSMIT_ERR ((unsigned int) (1 << 29)) //* RLE:transmit error
-#define AVR32_TRANSMIT_UND ((unsigned int) (1 << 28)) //* Transmit Underrun
-#define AVR32_BUF_EX ((unsigned int) (1 << 27)) //* Buffers exhausted in mid frame
-#define AVR32_TRANSMIT_NO_CRC ((unsigned int) (1 << 16)) //* No CRC will be appended to the current frame
-#define AVR32_LAST_BUFFER ((unsigned int) (1 << 15)) //*
-
-#define AVR32_EMAC_CLKEN 0x2
-
-/*
- * Initialise the EMAC driver. If successful a semaphore is returned that
- * is used by the EMAC ISR to indicate that Rx packets have been received.
- * If the initialisation fails then NULL is returned.
- */
-xSemaphoreHandle xEMACInit( void );
-
-/*
- * Send ulLength bytes from pcFrom. This copies the buffer to one of the
- * EMAC Tx buffers, then indicates to the EMAC that the buffer is ready.
- * If lEndOfFrame is true then the data being copied is the end of the frame
- * and the frame can be transmitted.
- */
-portLONG lEMACSend( portCHAR *pcFrom, unsigned portLONG ulLength, portLONG lEndOfFrame );
-
-/*
- * Frames can be read from the EMAC in multiple sections.
- * Read ulSectionLength bytes from the EMAC receive buffers to pcTo.
- * ulTotalFrameLength is the size of the entire frame. Generally vEMACRead
- * will be repetedly called until the sum of all the ulSectionLenths totals
- * the value of ulTotalFrameLength.
- */
-void vEMACRead( portCHAR *pcTo, unsigned portLONG ulSectionLength, unsigned portLONG ulTotalFrameLength );
-
-/*
- * The EMAC driver and interrupt service routines are defined in different
- * files as the driver is compiled to THUMB, and the ISR to ARM. This function
- * simply passes the semaphore used to communicate between the two.
- */
-void vPassEMACSemaphore( xSemaphoreHandle xCreatedSemaphore );
-
-/*
- * Called by the Tx interrupt, this function traverses the buffers used to
- * hold the frame that has just completed transmission and marks each as
- * free again.
- */
-void vClearEMACTxBuffer( void );
-
-/*
- * Suspend on a semaphore waiting either for the semaphore to be obtained
- * or a timeout. The semaphore is used by the EMAC ISR to indicate that
- * data has been received and is ready for processing.
- */
-void vEMACWaitForInput( void );
-
-/*
- * Return the length of the next frame in the receive buffers.
- */
-unsigned portLONG ulEMACInputLength( void );
-
-/*
- * Set the MACB Physical address (SA1B & SA1T registers).
- */
-void vEMACSetMACAddress(const portCHAR * EMACAddress);
-
-/*
- * Get the MACB Physical address (SA1B & SA1T registers).
- */
-void vEMACGetMACAddress(portCHAR * EMACAddress);
-
-#endif
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/AVR32_EMAC_ISR.c b/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/AVR32_EMAC_ISR.c
deleted file mode 100644
index aaf4b89a9..000000000
--- a/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/AVR32_EMAC_ISR.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief EMAC abstraction layer for AVR32 UC3.
- *
- * - Compiler: GNU GCC for AVR32
- * - Supported devices: All AVR32 devices can be used.
- * - AppNote:
- *
- * \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
- *
- *****************************************************************************/
-
-/* Copyright (c) 2007, Atmel Corporation All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of ATMEL may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
- * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-
-
-#include "FreeRTOS.h"
-#include "task.h"
-#include "semphr.h"
-
-#include "AVR32_EMAC.h"
-#include "AVR32_CONF_EMAC.h"
-
-#include "lwipopts.h"
-
-
-
-
-/*-----------------------------------------------------------*/
-
-/* The semaphore used to signal the arrival of new data to the interface
-task. */
-static xSemaphoreHandle xSemaphore = NULL;
-
-static __attribute__((__noinline__)) portBASE_TYPE prvEMAC_ISR_NonNakedBehaviour( void );
-
-
-/*
- * The EMAC ISR. Handles both Tx and Rx complete interrupts.
- */
-//__attribute__((naked,section (".handlers"))) void vEMAC_ISR( void )
-__attribute__((naked)) void vEMAC_ISR( void )
-{
- /* This ISR can cause a context switch, so the first statement must be a
- call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
- variable declarations. */
- portENTER_SWITCHING_ISR();
-
- prvEMAC_ISR_NonNakedBehaviour();
- /* Exit the ISR. If a task was woken by either a character being received
- or transmitted then a context switch will occur. */
-
- portEXIT_SWITCHING_ISR();
-}
-/*-----------------------------------------------------------*/
-
-static __attribute__((__noinline__)) portBASE_TYPE prvEMAC_ISR_NonNakedBehaviour( void )
-{
-
- /* Variable definitions can be made now. */
- volatile unsigned portLONG ulIntStatus, ulEventStatus;
- portBASE_TYPE xSwitchRequired = pdFALSE;
- extern void vClearEMACTxBuffer( void );
-
- /* Find the cause of the interrupt. */
- ulIntStatus = AVR32_MACB.isr;
- ulEventStatus = AVR32_MACB.rsr;
-
- if( ( ulIntStatus & AVR32_MACB_IDR_RCOMP_MASK ) || ( ulEventStatus & AVR32_MACB_REC_MASK ) )
- {
- /* A frame has been received, signal the lwIP task so it can process
- the Rx descriptors. */
- portENTER_CRITICAL();
- xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, pdFALSE );
- portEXIT_CRITICAL();
- AVR32_MACB.rsr = AVR32_MACB_REC_MASK;
- AVR32_MACB.rsr;
- }
-
- if( ulIntStatus & AVR32_MACB_TCOMP_MASK )
- {
- /* A frame has been transmitted. Mark all the buffers used by the
- frame just transmitted as free again. */
- vClearEMACTxBuffer();
- AVR32_MACB.tsr = AVR32_MACB_TSR_COMP_MASK;
- AVR32_MACB.tsr;
- }
-
- return ( xSwitchRequired );
-}
-
-/*-----------------------------------------------------------*/
-
-void vPassEMACSemaphore( xSemaphoreHandle xCreatedSemaphore )
-{
- /* Simply store the semaphore that should be used by the ISR. */
- xSemaphore = xCreatedSemaphore;
-}
-
-
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/DP83848.h b/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/DP83848.h
deleted file mode 100644
index 3e9e139b7..000000000
--- a/Demo/lwIP_AVR32_UC3/NETWORK/EMAC/DP83848.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief PHY abstraction layer for AVR32 UC3 on EVK1100.
- *
- * - Compiler: GNU GCC for AVR32
- * - Supported devices: All AVR32 devices can be used.
- * - AppNote:
- *
- * \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
- *
- *****************************************************************************/
-
-/* Copyright (c) 2007, Atmel Corporation All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of ATMEL may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
- * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* DP83848 registers. */
-/*! Generic MII registers. */
-#define PHY_BMCR 0x00 /* Basic mode control register */
-#define PHY_BMSR 0x01 /* Basic mode status register */
-#define PHY_PHYSID1 0x02 /* PHYS ID 1 */
-#define PHY_PHYSID2 0x03 /* PHYS ID 2 */
-#define PHY_ADVERTISE 0x04 /* Advertisement control reg */
-#define PHY_LPA 0x05 /* Link partner ability reg */
-
-#if BOARD == EVK1100
-/*! Extended registers for DP83848 */
-#define PHY_RBR 0x17 /* RMII Bypass reg */
-#define PHY_MICR 0x11 /* Interrupt Control reg */
-#define PHY_MISR 0x12 /* Interrupt Status reg */
-#define PHY_PHYCR 0x19 /* Phy CTRL reg */
-#endif
-
-
-/*! Basic mode control register. */
-#define BMCR_RESV 0x007f /* Unused... */
-#define BMCR_CTST 0x0080 /* Collision test */
-#define BMCR_FULLDPLX 0x0100 /* Full duplex */
-#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
-#define BMCR_ISOLATE 0x0400 /* Disconnect PHY from MII */
-#define BMCR_PDOWN 0x0800 /* Powerdown the PHY */
-#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
-#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
-#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
-#define BMCR_RESET 0x8000 /* Reset the PHY */
-
-/*! Basic mode status register. */
-#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
-#define BMSR_JCD 0x0002 /* Jabber detected */
-#define BMSR_LSTATUS 0x0004 /* Link status */
-#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
-#define BMSR_RFAULT 0x0010 /* Remote fault detected */
-#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
-#define BMSR_RESV 0x00c0 /* Unused... */
-#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
-#define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */
-#define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */
-#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
-#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
-#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
-#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
-#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
-
-/*! Advertisement control register. */
-#define ADVERTISE_SLCT 0x001f /* Selector bits */
-#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
-#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
-#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
-#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
-#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
-#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
-#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
-#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
-#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
-#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
-#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
-#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
-#define ADVERTISE_RESV 0x1000 /* Unused... */
-#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
-#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
-#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
-
-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | ADVERTISE_CSMA)
-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
- ADVERTISE_100HALF | ADVERTISE_100FULL)
-
-/*! Link partner ability register. */
-#define LPA_SLCT 0x001f /* Same as advertise selector */
-#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
-#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
-#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
-#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
-#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
-#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
-#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
-#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
-#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
-#define LPA_PAUSE_CAP 0x0400 /* Can pause */
-#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
-#define LPA_RESV 0x1000 /* Unused... */
-#define LPA_RFAULT 0x2000 /* Link partner faulted */
-#define LPA_LPACK 0x4000 /* Link partner acked us */
-#define LPA_NPAGE 0x8000 /* Next page bit */
-
-#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
-#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
-
-#if BOARD == EVK1100
-/*! RMII Bypass Register */
-#define RBR_RMII 0x0020 /* RMII Mode */
-/*! Interrupt Ctrl Register */
-#define MICR_INTEN 0x0002 /* Enable interrupts */
-#define MICR_INTOE 0x0001 /* Enable INT output */
-/*! Interrupt Status Register */
-#define MISR_ED_INT_EN 0x0040 /* Energy Detect enabled */
-#define MISR_LINK_INT_EN 0x0020 /* Link status change enabled */
-#define MISR_SPD_INT_EN 0x0010 /* Speed change enabled */
-#define MISR_DP_INT_EN 0x0008 /* Duplex mode change enabled */
-#define MISR_ANC_INT_EN 0x0004 /* Auto-Neg complete enabled */
-#define MISR_FHF_INT_EN 0x0002 /* False Carrier enabled */
-#define MISR_RHF_INT_EN 0x0001 /* Receive Error enabled */
-#define MISR_ED_INT 0x4000 /* Energy Detect */
-#define MISR_LINK_INT 0x2000 /* Link status change */
-#define MISR_SPD_INT 0x1000 /* Speed change */
-#define MISR_DP_INT 0x0800 /* Duplex mode change */
-#define MISR_ANC_INT 0x0400 /* Auto-Neg complete */
-#define MISR_FHF_INT 0x0200 /* False Carrier */
-#define MISR_RHF_INT 0x0100 /* Receive Error */
-/*! Phy Ctrl Register */
-#define PHYCR_MDIX_EN 0x8000 /* Enable Auto MDIX */
-#define PHYCR_MDIX_FORCE 0x4000 /* Force MDIX crossed */
-#endif
-
-/*! PHY ID */
-#define MII_DP83848_ID 0x20005C90 /* 0x00225541 */
-
-/*! PHY Address */
-#define DP83848_PHY_ADDR 0x01
-
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/ethernet.c b/Demo/lwIP_AVR32_UC3/NETWORK/ethernet.c
index f97902025..e14014c69 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/ethernet.c
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/ethernet.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -58,7 +56,9 @@
/* ethernet includes */
#include "ethernet.h"
-#include "AVR32_EMAC.h"
+#include "conf_eth.h"
+#include "macb.h"
+#include "gpio.h"
#if (HTTP_USED == 1)
#include "BasicWEB.h"
@@ -87,7 +87,7 @@
//_____ D E F I N I T I O N S ______________________________________________
/* global variable containing MAC Config (hw addr, IP, GW, ...) */
-struct netif EMAC_if;
+struct netif MACB_if;
//_____ D E C L A R A T I O N S ____________________________________________
@@ -105,6 +105,23 @@ static void prvEthernetConfigureInterface(void * param);
*/
void vStartEthernetTask( unsigned portBASE_TYPE uxPriority )
{
+static const gpio_map_t MACB_GPIO_MAP =
+{
+ {AVR32_MACB_MDC_0_PIN, AVR32_MACB_MDC_0_FUNCTION },
+ {AVR32_MACB_MDIO_0_PIN, AVR32_MACB_MDIO_0_FUNCTION },
+ {AVR32_MACB_RXD_0_PIN, AVR32_MACB_RXD_0_FUNCTION },
+ {AVR32_MACB_TXD_0_PIN, AVR32_MACB_TXD_0_FUNCTION },
+ {AVR32_MACB_RXD_1_PIN, AVR32_MACB_RXD_1_FUNCTION },
+ {AVR32_MACB_TXD_1_PIN, AVR32_MACB_TXD_1_FUNCTION },
+ {AVR32_MACB_TX_EN_0_PIN, AVR32_MACB_TX_EN_0_FUNCTION },
+ {AVR32_MACB_RX_ER_0_PIN, AVR32_MACB_RX_ER_0_FUNCTION },
+ {AVR32_MACB_RX_DV_0_PIN, AVR32_MACB_RX_DV_0_FUNCTION },
+ {AVR32_MACB_TX_CLK_0_PIN, AVR32_MACB_TX_CLK_0_FUNCTION}
+};
+
+ // Assign GPIO to MACB
+ gpio_enable_module(MACB_GPIO_MAP, sizeof(MACB_GPIO_MAP) / sizeof(MACB_GPIO_MAP[0]));
+
/* Setup lwIP. */
prvlwIPInit();
@@ -119,8 +136,8 @@ void vStartEthernetTask( unsigned portBASE_TYPE uxPriority )
#endif
#if (SMTP_USED == 1)
- /* Create the SMTP Host task. This uses the lwIP RTOS abstraction layer.*/
- sys_thread_new( vBasicSMTPHost, ( void * ) NULL, ethSMTPHOST_PRIORITY );
+ /* Create the SMTP Client task. This uses the lwIP RTOS abstraction layer.*/
+ sys_thread_new( vBasicSMTPClient, ( void * ) NULL, ethSMTPCLIENT_PRIORITY );
#endif
}
@@ -156,39 +173,39 @@ extern err_t ethernetif_init( struct netif *netif );
portCHAR MacAddress[6];
/* Default MAC addr. */
- MacAddress[0] = emacETHADDR0;
- MacAddress[1] = emacETHADDR1;
- MacAddress[2] = emacETHADDR2;
- MacAddress[3] = emacETHADDR3;
- MacAddress[4] = emacETHADDR4;
- MacAddress[5] = emacETHADDR5;
+ MacAddress[0] = ETHERNET_CONF_ETHADDR0;
+ MacAddress[1] = ETHERNET_CONF_ETHADDR1;
+ MacAddress[2] = ETHERNET_CONF_ETHADDR2;
+ MacAddress[3] = ETHERNET_CONF_ETHADDR3;
+ MacAddress[4] = ETHERNET_CONF_ETHADDR4;
+ MacAddress[5] = ETHERNET_CONF_ETHADDR5;
- /* pass the EMAC address to AVR32_EMAC module */
- vEMACSetMACAddress( MacAddress );
+ /* pass the MAC address to MACB module */
+ vMACBSetMACAddress( MacAddress );
/* set MAC hardware address length to be used by lwIP */
- EMAC_if.hwaddr_len = 6;
+ MACB_if.hwaddr_len = 6;
/* set MAC hardware address to be used by lwIP */
- memcpy( EMAC_if.hwaddr, MacAddress, EMAC_if.hwaddr_len );
+ memcpy( MACB_if.hwaddr, MacAddress, MACB_if.hwaddr_len );
/* Default ip addr. */
- IP4_ADDR( &xIpAddr,emacIPADDR0,emacIPADDR1,emacIPADDR2,emacIPADDR3 );
+ IP4_ADDR( &xIpAddr,ETHERNET_CONF_IPADDR0,ETHERNET_CONF_IPADDR1,ETHERNET_CONF_IPADDR2,ETHERNET_CONF_IPADDR3 );
/* Default Subnet mask. */
- IP4_ADDR( &xNetMask,emacNET_MASK0,emacNET_MASK1,emacNET_MASK2,emacNET_MASK3 );
+ IP4_ADDR( &xNetMask,ETHERNET_CONF_NET_MASK0,ETHERNET_CONF_NET_MASK1,ETHERNET_CONF_NET_MASK2,ETHERNET_CONF_NET_MASK3 );
/* Default Gw addr. */
- IP4_ADDR( &xGateway,emacGATEWAY_ADDR0,emacGATEWAY_ADDR1,emacGATEWAY_ADDR2,emacGATEWAY_ADDR3 );
+ IP4_ADDR( &xGateway,ETHERNET_CONF_GATEWAY_ADDR0,ETHERNET_CONF_GATEWAY_ADDR1,ETHERNET_CONF_GATEWAY_ADDR2,ETHERNET_CONF_GATEWAY_ADDR3 );
/* add data to netif */
- netif_add( &EMAC_if, &xIpAddr, &xNetMask, &xGateway, NULL, ethernetif_init, tcpip_input );
+ netif_add( &MACB_if, &xIpAddr, &xNetMask, &xGateway, NULL, ethernetif_init, tcpip_input );
/* make it the default interface */
- netif_set_default( &EMAC_if );
+ netif_set_default( &MACB_if );
/* bring it up */
- netif_set_up( &EMAC_if );
+ netif_set_up( &MACB_if );
}
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/ethernet.h b/Demo/lwIP_AVR32_UC3/NETWORK/ethernet.h
index 06d111164..ef37e7c1e 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/ethernet.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/ethernet.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/IAR/errno.h b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/IAR/errno.h
new file mode 100644
index 000000000..18eb1403b
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/IAR/errno.h
@@ -0,0 +1,63 @@
+/* errno.h standard header */
+#ifndef _ERRNO
+#define _ERRNO
+
+#ifndef _SYSTEM_BUILD
+ #pragma system_include
+#endif
+
+#ifndef _YVALS
+ #include
+#endif
+_C_STD_BEGIN
+
+ /* ERROR CODES */
+#define EDOM _EDOM
+#define ERANGE _ERANGE
+#define EFPOS _EFPOS
+#define EILSEQ _EILSEQ
+
+ /* lwip error codes, from cygwin errno.h */
+#define EIO 5 /* I/O error */
+#define EWOULDBLOCK 11 /* Operation would block */
+#define ENOMEM 12 /* Not enough core */
+#define EFAULT 14 /* Bad address */
+#define EINVAL 22 /* Invalid argument */
+#define ENOSYS 88 /* Function not implemented */
+#define ECONNRESET 104 /* Connection reset by peer */
+#define ENOBUFS 105 /* No buffer space available */
+#define ENOPROTOOPT 109 /* Protocol not available */
+#define ESHUTDOWN 110 /* Can't send after socket shutdown */
+#define EADDRINUSE 112 /* Address already in use */
+#define ECONNABORTED 113 /* Connection aborted */
+#define EHOSTUNREACH 118 /* Host is unreachable */
+#define ENOTCONN 128 /* Socket is not connected */
+
+#define _NERR 129 /* one more than last code */
+
+ /* DECLARATIONS */
+_C_LIB_DECL
+#if !_MULTI_THREAD || _COMPILER_TLS && !_GLOBAL_LOCALE
+ extern int _TLS_QUAL errno;
+
+#else /* !_MULTI_THREAD || _COMPILER_TLS && !_GLOBAL_LOCALE */
+ __INTRINSIC int *_Geterrno(void);
+
+ #define errno (*_Geterrno())
+#endif /* !_MULTI_THREAD || _COMPILER_TLS && !_GLOBAL_LOCALE */
+_END_C_LIB_DECL
+_C_STD_END
+#endif /* _ERRNO */
+
+#ifdef _STD_USING
+ #ifndef errno
+ using _CSTD errno;
+ #endif
+#endif /* _STD_USING */
+/*
+ * Copyright (c) 1992-2002 by P.J. Plauger. ALL RIGHTS RESERVED.
+ * Consult your license regarding permissions and restrictions.
+V3.12:0576 */
+
+
+
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/cc.h b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/cc.h
index 36e220534..5d1c9052a 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/cc.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/cc.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -67,9 +65,24 @@ typedef int sys_prot_t;
#define LWIP_PLATFORM_ASSERT(x)
/* */
+#if __GNUC__
#define PACK_STRUCT_BEGIN
+#elif __ICCAVR32__
+#define PACK_STRUCT_BEGIN _Pragma("pack(1)")
+#endif
+
+#if __GNUC__
#define PACK_STRUCT_STRUCT __attribute__ ((__packed__))
+#elif __ICCAVR32__
+#define PACK_STRUCT_STRUCT
+#endif
+
+#if __GNUC__
#define PACK_STRUCT_END
+#elif __ICCAVR32__
+#define PACK_STRUCT_END _Pragma("pack()")
+#endif
+
#define PACK_STRUCT_FIELD(x) x
#endif /* __CC_H__ */
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/cpu.h b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/cpu.h
index 81aa3374a..c411f9b2d 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/cpu.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/cpu.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/init.h b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/init.h
index 068ee7622..6bf322e6c 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/init.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/init.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/lib.h b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/lib.h
index 23dc3f8ee..2ecf2afa7 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/lib.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/lib.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/perf.h b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/perf.h
index 4e5055a03..91d8f4114 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/perf.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/perf.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/sys_arch.h b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/sys_arch.h
index 81b300241..af2afc3ff 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/sys_arch.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/arch/sys_arch.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/ethernetif.c b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/ethernetif.c
index 17d5acf34..a262771f2 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/ethernetif.c
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/ethernetif.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
@@ -52,8 +50,7 @@
/* FreeRTOS includes. */
#include "FreeRTOS.h"
-#include "AVR32_EMAC.h"
-#include "AVR32_CONF_EMAC.h"
+#include "macb.h"
#define netifMTU ( 1500 )
#define netifGUARD_BLOCK_TIME ( 250 )
@@ -90,20 +87,20 @@ low_level_init(struct netif *netif)
/* Do whatever else is needed to initialize interface. */
xNetIf = netif;
- /* Initialise the EMAC. This routine contains code that polls status bits.
+ /* Initialise the MACB. This routine contains code that polls status bits.
If the Ethernet cable is not plugged in then this can take a considerable
time. To prevent this starving lower priority tasks of processing time we
lower our priority prior to the call, then raise it back again once the
initialisation is complete. */
uxPriority = uxTaskPriorityGet( NULL );
vTaskPrioritySet( NULL, tskIDLE_PRIORITY );
- while( xEMACInit() == NULL )
+ while( xMACBInit(&AVR32_MACB) == FALSE )
{
- __asm( "NOP" );
+ __asm__ __volatile__ ( "nop" );
}
vTaskPrioritySet( NULL, uxPriority );
- /* Create the task that handles the EMAC. */
+ /* Create the task that handles the MACB. */
// xTaskCreate( ethernetif_input, ( signed portCHAR * ) "ETH_INT", netifINTERFACE_TASK_STACK_SIZE, NULL, netifINTERFACE_TASK_PRIORITY, NULL );
sys_thread_new( ethernetif_input, NULL, netifINTERFACE_TASK_PRIORITY );
}
@@ -136,7 +133,7 @@ err_t xReturn = ERR_OK;
pbuf_header( p, -ETH_PAD_SIZE ); /* drop the padding word */
#endif
- /* Access to the EMAC is guarded using a semaphore. */
+ /* Access to the MACB is guarded using a semaphore. */
if( xSemaphoreTake( xTxSemaphore, netifGUARD_BLOCK_TIME ) )
{
for( q = p; q != NULL; q = q->next )
@@ -145,13 +142,12 @@ err_t xReturn = ERR_OK;
time. The size of the data in each pbuf is kept in the ->len
variable. if q->next == NULL then this is the last pbuf in the
chain. */
- if( !lEMACSend( q->payload, q->len, ( q->next == NULL ) ) )
+ if( !lMACBSend(&AVR32_MACB, q->payload, q->len, ( q->next == NULL ) ) )
{
xReturn = ~ERR_OK;
}
}
-
- xSemaphoreGive( xTxSemaphore );
+ xSemaphoreGive( xTxSemaphore );
}
@@ -193,7 +189,7 @@ static xSemaphoreHandle xRxSemaphore = NULL;
if( xSemaphoreTake( xRxSemaphore, netifGUARD_BLOCK_TIME ) )
{
/* Obtain the size of the packet. */
- len = ulEMACInputLength();
+ len = ulMACBInputLength();
if( len )
{
@@ -211,7 +207,7 @@ static xSemaphoreHandle xRxSemaphore = NULL;
#endif
/* Let the driver know we are going to read a new packet. */
- vEMACRead( NULL, 0, len );
+ vMACBRead( NULL, 0, len );
/* We iterate over the pbuf chain until we have read the entire
packet into the pbuf. */
@@ -219,7 +215,7 @@ static xSemaphoreHandle xRxSemaphore = NULL;
{
/* Read enough bytes to fill this pbuf in the chain. The
available data in the pbuf is given by the q->len variable. */
- vEMACRead( q->payload, q->len, len );
+ vMACBRead( q->payload, q->len, len );
}
#if ETH_PAD_SIZE
@@ -294,7 +290,7 @@ struct pbuf *p;
{
/* No packet could be read. Wait a for an interrupt to tell us
there is more data available. */
- vEMACWaitForInput();
+ vMACBWaitForInput(100);
}
} while( p == NULL );
@@ -350,7 +346,7 @@ arp_timer(void *arg)
* actual setup of the hardware.
*
*/
-extern struct netif EMAC_if;
+extern struct netif MACB_if;
err_t
ethernetif_init(struct netif *netif)
{
@@ -371,7 +367,7 @@ ethernetif_init(struct netif *netif)
netif->output = ethernetif_output;
netif->linkoutput = low_level_output;
- for(i = 0; i < 6; i++) netif->hwaddr[i] = EMAC_if.hwaddr[i];
+ for(i = 0; i < 6; i++) netif->hwaddr[i] = MACB_if.hwaddr[i];
low_level_init(netif);
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/lwip/opt.h b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/lwip/opt.h
index 2d84d6a56..307a237a3 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/lwip/opt.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/lwip/opt.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/lwipopts.h b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/lwipopts.h
index d8d22e766..09f2a141c 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/lwipopts.h
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/lwipopts.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/sys_arch.c b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/sys_arch.c
index 5d9ee7a7f..95fc2649a 100644
--- a/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/sys_arch.c
+++ b/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/sys_arch.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -102,7 +100,7 @@ sys_mbox_free(sys_mbox_t mbox)
if( uxQueueMessagesWaiting( mbox ) )
{
/* Line for breakpoint. Should never break here! */
- __asm volatile ( "NOP" );
+ __asm__ __volatile__ ( "nop" );
}
vQueueDelete( mbox );
@@ -377,9 +375,9 @@ static int iCall = 0;
}
#endif
#if (SMTP_USED == 1)
- else if (thread == vBasicSMTPHost)
+ else if (thread == vBasicSMTPClient)
{
- result = xTaskCreate( thread, ( signed portCHAR * ) "SMTP", lwipBASIC_SMTP_HOST_STACK_SIZE, arg, prio, &CreatedTask );
+ result = xTaskCreate( thread, ( signed portCHAR * ) "SMTP", lwipBASIC_SMTP_CLIENT_STACK_SIZE, arg, prio, &CreatedTask );
}
#endif
diff --git a/Demo/lwIP_AVR32_UC3/PARTEST/ParTest.c b/Demo/lwIP_AVR32_UC3/PARTEST/ParTest.c
index d7a3ca3af..a2f1d1d3b 100644
--- a/Demo/lwIP_AVR32_UC3/PARTEST/ParTest.c
+++ b/Demo/lwIP_AVR32_UC3/PARTEST/ParTest.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -42,14 +40,7 @@
*/
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
-
+#include
#include "FreeRTOS.h"
#include "task.h"
#include "partest.h"
diff --git a/Demo/lwIP_AVR32_UC3/SERIAL/serial.c b/Demo/lwIP_AVR32_UC3/SERIAL/serial.c
index b93bbf752..fe4f70646 100644
--- a/Demo/lwIP_AVR32_UC3/SERIAL/serial.c
+++ b/Demo/lwIP_AVR32_UC3/SERIAL/serial.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -53,13 +51,7 @@
/* Demo application includes. */
#include "serial.h"
-#if __GNUC__
-# include
-#elif __ICCAVR32__
-# include
-#else
-# error Unknown compiler
-#endif
+#include
#include "board.h"
#include "gpio.h"
@@ -154,9 +146,7 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
#if __GNUC__
__attribute__((__naked__))
#elif __ICCAVR32__
-#pragma shadow_registers = full // All registers shadowed
-#pragma handler = AVR32_USART0_IRQ_GROUP, 0
-__interrupt
+#pragma shadow_registers = full // Naked.
#endif
static void vUSART0_ISR( void )
{
@@ -179,6 +169,12 @@ static void vUSART0_ISR( void )
*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
+ static const gpio_map_t USART0_GPIO_MAP =
+ {
+ { AVR32_USART0_RXD_0_PIN, AVR32_USART0_RXD_0_FUNCTION },
+ { AVR32_USART0_TXD_0_PIN, AVR32_USART0_TXD_0_FUNCTION }
+ };
+
xComPortHandle xReturn = serHANDLE;
volatile avr32_usart_t *usart0 = &AVR32_USART0;
int cd; /* USART0 Clock Divider. */
@@ -221,8 +217,7 @@ xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned
** Configure USART0.
**/
/* Enable USART0 RXD & TXD pins. */
- gpio_enable_module_pin(AVR32_USART0_RXD_0_PIN, AVR32_USART0_RXD_0_FUNCTION);
- gpio_enable_module_pin(AVR32_USART0_TXD_0_PIN, AVR32_USART0_TXD_0_FUNCTION);
+ gpio_enable_module( USART0_GPIO_MAP, sizeof( USART0_GPIO_MAP ) / sizeof( USART0_GPIO_MAP[0] ) );
/* Set the USART0 baudrate to be as close as possible to the wanted baudrate. */
/*
@@ -266,11 +261,9 @@ xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned
/* Write the Transmit Timeguard Register */
usart0->ttgr = 0;
-#if __GNUC__
// Register the USART0 interrupt handler to the interrupt controller and
// enable the USART0 interrupt.
- INTC_register_interrupt(&vUSART0_ISR, AVR32_USART0_IRQ, INT1);
-#endif
+ INTC_register_interrupt((__int_handler)&vUSART0_ISR, AVR32_USART0_IRQ, INT1);
/* Enable USART0 interrupt sources (but not Tx for now)... */
usart0->ier = AVR32_USART_IER_RXRDY_MASK;
diff --git a/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S b/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S
new file mode 100644
index 000000000..8c4651659
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S
@@ -0,0 +1,72 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AVR32 UC3 ISP trampoline.
+ *
+ * In order to be able to program a project with both BatchISP and JTAGICE mkII
+ * without having to take the general-purpose fuses into consideration, add this
+ * file to the project and change the program entry point to _trampoline.
+ *
+ * The pre-programmed ISP will be erased if JTAGICE mkII is used.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: All AVR32UC devices can be used.
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include "../conf_isp.h"
+
+
+//! @{
+//! \verbatim
+
+
+ // This must be linked @ 0x80000000 if it is to be run upon reset.
+ .section .reset, "ax", @progbits
+
+
+ .global _trampoline
+ .type _trampoline, @function
+_trampoline:
+ // Jump to program start.
+ rjmp program_start
+
+ .org PROGRAM_START_OFFSET
+program_start:
+ // Jump to the C runtime startup routine.
+ lda.w pc, _stext
+
+
+//! \endverbatim
+//! @}
diff --git a/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.s82 b/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.s82
new file mode 100644
index 000000000..b9e03b143
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.s82
@@ -0,0 +1,91 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief AVR32 UC3 ISP trampoline.
+ *
+ * In order to be able to program a project with both BatchISP and JTAGICE mkII
+ * without having to take the general-purpose fuses into consideration, add this
+ * file to the project and change the program entry point to __trampoline.
+ *
+ * The pre-programmed ISP will be erased if JTAGICE mkII is used.
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: All AVR32UC devices can be used.
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include "../conf_isp.h"
+
+
+//! @{
+//! \verbatim
+
+
+ RSEG SSTACK:DATA:NOROOT(2)
+
+
+ // This must be linked @ 0x80000000 if it is to be run upon reset.
+ RSEG RESET:CODE:NOROOT(1)
+
+
+ PUBLIC __trampoline
+__trampoline:
+ // Jump to program start.
+ rjmp program_start
+
+ ORG PROGRAM_START_OFFSET
+program_start:
+ // Initialize the stack pointer.
+ lddpc sp, ??SPS
+ // Jump to the C runtime startup routine.
+ lddpc pc, ??cmain
+
+
+// Constant data area.
+
+ ALIGN 2
+
+??SPS:
+ DC32 SFE(SSTACK) & ~3
+
+ EXTERN ?main
+??cmain:
+ DC32 ?main
+
+
+ END
+
+
+//! \endverbatim
+//! @}
diff --git a/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/conf_isp.h b/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/conf_isp.h
new file mode 100644
index 000000000..05fd4dcf7
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/conf_isp.h
@@ -0,0 +1,119 @@
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file ******************************************************************
+ *
+ * \brief ISP configuration file.
+ *
+ * This file contains the possible external configuration of the ISP.
+ *
+ * - Compiler: IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices: All AVR32 devices with a USB module can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ***************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef _CONF_ISP_H_
+#define _CONF_ISP_H_
+
+#include
+#include "compiler.h"
+
+
+//_____ D E F I N I T I O N S ______________________________________________
+
+#define PRODUCT_MANUFACTURER_ID 0x58
+#define PRODUCT_FAMILY_ID 0x20
+
+#define ISP_VERSION 0x00
+#define ISP_ID0 0x00
+#define ISP_ID1 0x00
+
+#define ISP_GPFB_FORCE 31
+#define ISP_GPFB_FORCE_MASK 0x80000000
+#define ISP_GPFB_FORCE_OFFSET 31
+#define ISP_GPFB_FORCE_SIZE 1
+
+#define ISP_GPFB_IO_COND_EN 30
+#define ISP_GPFB_IO_COND_EN_MASK 0x40000000
+#define ISP_GPFB_IO_COND_EN_OFFSET 30
+#define ISP_GPFB_IO_COND_EN_SIZE 1
+
+#define ISP_GPFB_BOD_EN 29
+#define ISP_GPFB_BOD_EN_MASK 0x20000000
+#define ISP_GPFB_BOD_EN_OFFSET 29
+#define ISP_GPFB_BOD_EN_SIZE 1
+
+#define ISP_CFG (*(volatile U32 *)ISP_CFG_ADDRESS)
+#define ISP_CFG_ADDRESS (AVR32_FLASHC_USER_PAGE_ADDRESS + ISP_CFG_OFFSET)
+#define ISP_CFG_OFFSET 0x000001FC
+#define ISP_CFG_SIZE 4
+
+#define ISP_CFG_BOOT_KEY 17
+#define ISP_CFG_BOOT_KEY_MASK 0xFFFE0000
+#define ISP_CFG_BOOT_KEY_OFFSET 17
+#define ISP_CFG_BOOT_KEY_SIZE 15
+#define ISP_CFG_BOOT_KEY_VALUE 0x494F
+
+#define ISP_CFG_IO_COND_LEVEL 16
+#define ISP_CFG_IO_COND_LEVEL_MASK 0x00010000
+#define ISP_CFG_IO_COND_LEVEL_OFFSET 16
+#define ISP_CFG_IO_COND_LEVEL_SIZE 1
+
+#define ISP_CFG_IO_COND_PIN 8
+#define ISP_CFG_IO_COND_PIN_MASK 0x0000FF00
+#define ISP_CFG_IO_COND_PIN_OFFSET 8
+#define ISP_CFG_IO_COND_PIN_SIZE 8
+
+#define ISP_CFG_CRC8 0
+#define ISP_CFG_CRC8_MASK 0x000000FF
+#define ISP_CFG_CRC8_OFFSET 0
+#define ISP_CFG_CRC8_SIZE 8
+#define ISP_CFG_CRC8_POLYNOMIAL 0x107
+
+#define ISP_KEY (*(volatile U32 *)ISP_KEY_ADDRESS)
+#define ISP_KEY_ADDRESS (AVR32_SRAM_ADDRESS + ISP_KEY_OFFSET)
+#define ISP_KEY_OFFSET 0x00000000
+#define ISP_KEY_SIZE 4
+#define ISP_KEY_VALUE ('I' << 24 | 'S' << 16 | 'P' << 8 | 'K')
+
+#ifndef ISP_OSC
+ #define ISP_OSC 0
+#endif
+
+#define DFU_FRAME_LENGTH 2048
+
+#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET)
+#define PROGRAM_START_OFFSET 0x00002000
+
+
+#endif // _CONF_ISP_H_
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/GCC/link_uc3a0128.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/GCC/link_uc3a0128.lds
new file mode 100644
index 000000000..29c4eb51d
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/GCC/link_uc3a0128.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0128 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A0128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
+ .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/IAR/lnkuc3a0128.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/IAR/lnkuc3a0128.xcl
new file mode 100644
index 000000000..3f42ec322
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/IAR/lnkuc3a0128.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0128 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A0128:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8001FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A0128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8001FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8001FFFF
+-Z@(CODE)EV100=80004100-8001FFFF
+-P(CODE)EVSEG=80004000-8001FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8001FFFF
+-P(CONST)DATA32_C=80000000-8001FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/GCC/link_uc3a0256.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/GCC/link_uc3a0256.lds
new file mode 100644
index 000000000..6369fd426
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/GCC/link_uc3a0256.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0256 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A0256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
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+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
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+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
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+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
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+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
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+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
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+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
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+ PROVIDE (edata = .);
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+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
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+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
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+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/IAR/lnkuc3a0256.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/IAR/lnkuc3a0256.xcl
new file mode 100644
index 000000000..d037025d6
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0256/IAR/lnkuc3a0256.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0256 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A0256:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x0000FFFF SRAM RAM
+ * 0x80000000 0x8003FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A0256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8003FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8003FFFF
+-Z@(CODE)EV100=80004100-8003FFFF
+-P(CODE)EVSEG=80004000-8003FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8003FFFF
+-P(CONST)DATA32_C=80000000-8003FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
+-Z(DATA)TRACEBUFFER=00000004-0000FFFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds
new file mode 100644
index 000000000..d89138cb5
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0512 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A0512
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00080000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
+ .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/IAR/lnkuc3a0512.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/IAR/lnkuc3a0512.xcl
new file mode 100644
index 000000000..d6173e786
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/IAR/lnkuc3a0512.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A0512 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A0512:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x0000FFFF SRAM RAM
+ * 0x80000000 0x8007FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A0512
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8007FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8007FFFF
+-Z@(CODE)EV100=80004100-8007FFFF
+-P(CODE)EVSEG=80004000-8007FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8007FFFF
+-P(CONST)DATA32_C=80000000-8007FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8007FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8007FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8007FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8007FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
+-Z(DATA)TRACEBUFFER=00000004-0000FFFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/GCC/link_uc3a1128.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/GCC/link_uc3a1128.lds
new file mode 100644
index 000000000..ffc92e4da
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/GCC/link_uc3a1128.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1128 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A1128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
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+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
+ .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/IAR/lnkuc3a1128.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/IAR/lnkuc3a1128.xcl
new file mode 100644
index 000000000..9f9237cd7
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/IAR/lnkuc3a1128.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1128 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A1128:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8001FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A1128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8001FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8001FFFF
+-Z@(CODE)EV100=80004100-8001FFFF
+-P(CODE)EVSEG=80004000-8001FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8001FFFF
+-P(CONST)DATA32_C=80000000-8001FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds
new file mode 100644
index 000000000..1e464f832
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1256 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A1256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
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+ /* Ensure the __preinit_array_start label is properly aligned. We
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+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
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+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
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+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
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+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/IAR/lnkuc3a1256.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/IAR/lnkuc3a1256.xcl
new file mode 100644
index 000000000..823654a68
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/IAR/lnkuc3a1256.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1256 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A1256:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x0000FFFF SRAM RAM
+ * 0x80000000 0x8003FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A1256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8003FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8003FFFF
+-Z@(CODE)EV100=80004100-8003FFFF
+-P(CODE)EVSEG=80004000-8003FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8003FFFF
+-P(CONST)DATA32_C=80000000-8003FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
+-Z(DATA)TRACEBUFFER=00000004-0000FFFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/GCC/link_uc3a1512.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/GCC/link_uc3a1512.lds
new file mode 100644
index 000000000..a171bd0b6
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/GCC/link_uc3a1512.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1512 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3A1512
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00080000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
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+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
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+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
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+ .init :
+ {
+ KEEP (*(.init))
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+ *(.text .stub .text.* .gnu.linkonce.t.*)
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+ .fini :
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+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
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+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/IAR/lnkuc3a1512.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/IAR/lnkuc3a1512.xcl
new file mode 100644
index 000000000..33ec1d367
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/IAR/lnkuc3a1512.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3A1512 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3A1512:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x0000FFFF SRAM RAM
+ * 0x80000000 0x8007FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3A1512
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8007FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8007FFFF
+-Z@(CODE)EV100=80004100-8007FFFF
+-P(CODE)EVSEG=80004000-8007FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8007FFFF
+-P(CONST)DATA32_C=80000000-8007FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8007FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8007FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8007FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8007FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
+-Z(DATA)TRACEBUFFER=00000004-0000FFFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/GCC/link_uc3b0128.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/GCC/link_uc3b0128.lds
new file mode 100644
index 000000000..cf3a8db14
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/GCC/link_uc3b0128.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B0128 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B0128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
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+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
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+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
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+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
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+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
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+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
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+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
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+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
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+ . = (__heap_size__ == __max_heap_size__) ?
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+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/IAR/lnkuc3b0128.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/IAR/lnkuc3b0128.xcl
new file mode 100644
index 000000000..f45cf7392
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/IAR/lnkuc3b0128.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B0128 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B0128:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8001FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B0128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8001FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8001FFFF
+-Z@(CODE)EV100=80004100-8001FFFF
+-P(CODE)EVSEG=80004000-8001FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8001FFFF
+-P(CONST)DATA32_C=80000000-8001FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/GCC/link_uc3b0256.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/GCC/link_uc3b0256.lds
new file mode 100644
index 000000000..e23901562
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/GCC/link_uc3b0256.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B0256 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B0256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
+ .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/IAR/lnkuc3b0256.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/IAR/lnkuc3b0256.xcl
new file mode 100644
index 000000000..46fcbea95
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/IAR/lnkuc3b0256.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B0256 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B0256:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8003FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B0256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8003FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8003FFFF
+-Z@(CODE)EV100=80004100-8003FFFF
+-P(CODE)EVSEG=80004000-8003FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8003FFFF
+-P(CONST)DATA32_C=80000000-8003FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/GCC/link_uc3b064.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/GCC/link_uc3b064.lds
new file mode 100644
index 000000000..579a3908c
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/GCC/link_uc3b064.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B064 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B064
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00010000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00003FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
+ .hash : { *(.hash) } >FLASH AT>FLASH :FLASH
+ .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
+ .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
+ .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
+ .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
+ .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
+ .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
+ .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
+ .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
+ .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
+ .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
+ .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
+ .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
+ .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
+ .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
+ .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
+ .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
+ .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
+ .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
+ .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
+ .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
+ .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
+ .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
+ .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
+ .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
+ .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/IAR/lnkuc3b064.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/IAR/lnkuc3b064.xcl
new file mode 100644
index 000000000..ab7b2ee17
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/IAR/lnkuc3b064.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B064 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B064:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00003FFF SRAM RAM
+ * 0x80000000 0x8000FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B064
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8000FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8000FFFF
+-Z@(CODE)EV100=80004100-8000FFFF
+-P(CODE)EVSEG=80004000-8000FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8000FFFF
+-P(CONST)DATA32_C=80000000-8000FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8000FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8000FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8000FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8000FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00003FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00003FFF
+-Z(DATA)TRACEBUFFER=00000004-00003FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00003FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00003FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00003FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/GCC/link_uc3b1128.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/GCC/link_uc3b1128.lds
new file mode 100644
index 000000000..dba3d8df4
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/GCC/link_uc3b1128.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B1128 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B1128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
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+ /* Use a default stack size if stack size was not defined. */
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+
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+ KEEP (*(.fini))
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+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
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+ /* Ensure the __preinit_array_start label is properly aligned. We
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+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
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+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
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+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
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+ KEEP (*(.dtors))
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+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
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+ _edata = .;
+ PROVIDE (edata = .);
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+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
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+ /* Stabs debugging sections. */
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+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
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+ /* GNU DWARF 1 extensions */
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+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/IAR/lnkuc3b1128.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/IAR/lnkuc3b1128.xcl
new file mode 100644
index 000000000..4d50bc137
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/IAR/lnkuc3b1128.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B1128 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B1128:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8001FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B1128
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8001FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8001FFFF
+-Z@(CODE)EV100=80004100-8001FFFF
+-P(CODE)EVSEG=80004000-8001FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8001FFFF
+-P(CONST)DATA32_C=80000000-8001FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/GCC/link_uc3b1256.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/GCC/link_uc3b1256.lds
new file mode 100644
index 000000000..619a159a1
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/GCC/link_uc3b1256.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B1256 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B1256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
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+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
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+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
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+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
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+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
+ .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
+ . = ORIGIN(INTRAM);
+ .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
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+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
+ .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
+ .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
+ .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
+ .data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
+ .balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(8);
+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
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+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
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+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
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+ /* DWARF 2 */
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+ .debug_str 0 : { *(.debug_str) }
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+ /* SGI/MIPS DWARF 2 extensions */
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+ .debug_funcnames 0 : { *(.debug_funcnames) }
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+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/IAR/lnkuc3b1256.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/IAR/lnkuc3b1256.xcl
new file mode 100644
index 000000000..f765e4e9c
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/IAR/lnkuc3b1256.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B1256 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B1256:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00007FFF SRAM RAM
+ * 0x80000000 0x8003FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B1256
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8003FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8003FFFF
+-Z@(CODE)EV100=80004100-8003FFFF
+-P(CODE)EVSEG=80004000-8003FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8003FFFF
+-P(CONST)DATA32_C=80000000-8003FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
+-Z(DATA)TRACEBUFFER=00000004-00007FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/GCC/link_uc3b164.lds b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/GCC/link_uc3b164.lds
new file mode 100644
index 000000000..cae225d89
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/GCC/link_uc3b164.lds
@@ -0,0 +1,263 @@
+/******************************************************************************
+ * AVR32 AT32UC3B164 GNU LD script file.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: AVR32 AT32UC3B164
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+
+OUTPUT_ARCH(avr32:uc)
+
+ENTRY(_start)
+
+MEMORY
+{
+ FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00010000
+ INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00003FFC
+ USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
+ FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
+}
+
+PHDRS
+{
+ FLASH PT_LOAD;
+ INTRAM PT_NULL;
+ USERPAGE PT_LOAD;
+ FACTORYPAGE PT_LOAD;
+}
+
+SECTIONS
+{
+ /* If this heap size is selected, all the INTRAM space from the end of the
+ data area to the beginning of the stack will be allocated for the heap. */
+ __max_heap_size__ = -1;
+
+ /* Use a default heap size if heap size was not defined. */
+ __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
+
+ /* Use a default stack size if stack size was not defined. */
+ __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
+
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
+ .interp : { *(.interp) } >FLASH AT>FLASH :FLASH
+ .reset : { *(.reset) } >FLASH AT>FLASH :FLASH
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+ .init :
+ {
+ KEEP (*(.init))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .plt : { *(.plt) } >FLASH AT>FLASH :FLASH
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ .fini :
+ {
+ KEEP (*(.fini))
+ } >FLASH AT>FLASH :FLASH =0xd703d703
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
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+ . = ORIGIN(INTRAM);
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+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ PROVIDE (__preinit_array_start = ALIGN(32 / 8));
+ .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >INTRAM AT>FLASH :FLASH
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >INTRAM AT>FLASH :FLASH
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+ .data :
+ {
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ } >INTRAM AT>FLASH :FLASH
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+ } >INTRAM AT>INTRAM :INTRAM
+ . = ALIGN(8);
+ _end = .;
+ PROVIDE (end = .);
+ __heap_start__ = ALIGN(8);
+ .heap :
+ {
+ *(.heap)
+ . = (__heap_size__ == __max_heap_size__) ?
+ ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
+ __heap_size__;
+ } >INTRAM AT>INTRAM :INTRAM
+ __heap_end__ = .;
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
+ {
+ _stack = .;
+ *(.stack)
+ . = __stack_size__;
+ _estack = .;
+ } >INTRAM AT>INTRAM :INTRAM
+ .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
+ .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/IAR/lnkuc3b164.xcl b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/IAR/lnkuc3b164.xcl
new file mode 100644
index 000000000..01af490cf
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/IAR/lnkuc3b164.xcl
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * AVR32 AT32UC3B164 XLINK command file for AVR32 IAR C/C++ Compiler.
+ *
+ * The assumed memory layout is the one of the AT32UC3B164:
+ *
+ * Start Stop Name Type
+ * ---------- ---------- ----- --------------
+ * 0x00000000 0x00003FFF SRAM RAM
+ * 0x80000000 0x8000FFFF FLASH FLASH
+ *
+ * Usage: xlink your_file(s) -f xcl-file libraries
+ *
+ * - Compiler: IAR EWAVR32
+ * - Supported devices: AVR32 AT32UC3B164
+ *
+ * - author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/************************************************************************/
+/* The following segments are defined in this link file: */
+/* */
+/* Code segments */
+/* CODE32 -- Program code used by __code32 functions. */
+/* RESET -- Reset code. */
+/* EVSEG -- Exception vector handlers. */
+/* */
+/* Constant segments */
+/* INITTAB -- Segment initializer table. */
+/* DIFUNCT -- Dynamic initialization vector used by C++. */
+/* SWITCH -- Switch tables. */
+/* ACTAB -- Table of pointers to acall functions. */
+/* */
+/* DATA21_ID -- Initialization data for DATA21_I. */
+/* DATA32_ID -- Initialization data for DATA32_I. */
+/* DATA32_C -- Constant __data32 data. */
+/* */
+/* CHECKSUM -- Checksum segment. */
+/* */
+/* Data segments */
+/* DATA21_I -- Initialized __data21 data with non-zero */
+/* initial value. */
+/* DATA32_I -- Initialized __data32 data with non-zero */
+/* initial value. */
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */
+/* DATA21_N -- Non-initialized __data21. */
+/* DATA32_N -- Non-initialized __data32. */
+/* SSTACK -- The system stack. */
+/* CSTACK -- The application stack. */
+/* HEAP -- The heap used by malloc and free. */
+/* */
+/************************************************************************/
+
+/************************************************************************/
+/* Define CPU */
+/************************************************************************/
+
+-cavr32
+
+// Declare the IPR0 memory location
+-DIPR0=FFFF0800
+
+/************************************************************************/
+/* Reset code is located at address 0x80000000 and up. */
+/************************************************************************/
+
+-Z(CODE)RESET=80000000-8000FFFF
+
+/************************************************************************/
+/* The exception handler code is located at address 0x80000000 */
+/* and up. Make sure that the exception table gets properly */
+/* allocated. By using the special -Z@ allocation primitive, the */
+/* placement is guaranteed to be at _EVBASE and onwards. */
+/************************************************************************/
+
+-Z@(CODE)EVTAB=80004000-8000FFFF
+-Z@(CODE)EV100=80004100-8000FFFF
+-P(CODE)EVSEG=80004000-8000FFFF
+
+/************************************************************************/
+/* Allocate code and const segments. */
+/************************************************************************/
+
+-P(CODE)CODE32=80000000-8000FFFF
+-P(CONST)DATA32_C=80000000-8000FFFF
+
+// Initializers
+-Z(CONST)INITTAB,DIFUNCT=80000000-8000FFFF
+-Z(CONST)CHECKSUM,SWITCH=80000000-8000FFFF
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8000FFFF
+
+-Z(CONST)ACTAB,HTAB=80000000-8000FFFF
+
+/************************************************************************/
+/* Allocate the read/write segments that are mapped to RAM. */
+/************************************************************************/
+
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00003FFF
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00003FFF
+-Z(DATA)TRACEBUFFER=00000004-00003FFF
+
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00003FFF
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00003FFF
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-00003FFF
+
+/************************************************************************/
+/* End of File */
+/************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h b/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h
index 3457d20f8..83b5f4916 100644
--- a/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h
+++ b/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -9,7 +7,7 @@
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h b/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h
index 47e4cd2e8..8a5813ef6 100644
--- a/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h
+++ b/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -9,7 +7,7 @@
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/stringz.h b/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/stringz.h
index fbeb5156c..8230b69e1 100644
--- a/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/stringz.h
+++ b/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/stringz.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -9,7 +7,7 @@
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -47,23 +45,23 @@
/*! \brief Stringize.
*
- * Stringize a preprocessing token, this token being allowed to be #defined.
+ * Stringize a preprocessing token, this token being allowed to be \#defined.
*
- * May be used only within macros with the token passed as an argument if the token is #defined.
+ * May be used only within macros with the token passed as an argument if the token is \#defined.
*
- * For example, writing STRINGZ(PIN) within a macro #defined by PIN_NAME(PIN)
- * and invoked as PIN_NAME(PIN0) with PIN0 #defined as A0 is equivalent to
+ * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN)
+ * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to
* writing "A0".
*/
#define STRINGZ(x) #x
/*! \brief Absolute stringize.
*
- * Stringize a preprocessing token, this token being allowed to be #defined.
+ * Stringize a preprocessing token, this token being allowed to be \#defined.
*
- * No restriction of use if the token is #defined.
+ * No restriction of use if the token is \#defined.
*
- * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 #defined as A0 is
+ * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is
* equivalent to writing "A0".
*/
#define ASTRINGZ(x) STRINGZ(x)
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h b/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h
index bcedcd01d..ed1fe9cf6 100644
--- a/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h
+++ b/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -9,7 +7,7 @@
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -47,12 +45,12 @@
/*! \name Token Paste
*
- * Paste N preprocessing tokens together, these tokens being allowed to be #defined.
+ * Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
- * May be used only within macros with the tokens passed as arguments if the tokens are #defined.
+ * May be used only within macros with the tokens passed as arguments if the tokens are \#defined.
*
- * For example, writing TPASTE2(U, WIDTH) within a macro #defined by
- * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH #defined as 32 is
+ * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by
+ * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is
* equivalent to writing U32.
*/
//! @{
@@ -69,11 +67,11 @@
/*! \name Absolute Token Paste
*
- * Paste N preprocessing tokens together, these tokens being allowed to be #defined.
+ * Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
- * No restriction of use if the tokens are #defined.
+ * No restriction of use if the tokens are \#defined.
*
- * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH #defined
+ * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined
* as 32 is equivalent to writing U32.
*/
//! @{
diff --git a/Demo/lwIP_AVR32_UC3/UTILS/compiler.h b/Demo/lwIP_AVR32_UC3/UTILS/compiler.h
index 77483303b..5d75c0937 100644
--- a/Demo/lwIP_AVR32_UC3/UTILS/compiler.h
+++ b/Demo/lwIP_AVR32_UC3/UTILS/compiler.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -12,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -47,18 +45,10 @@
#ifndef _COMPILER_H_
#define _COMPILER_H_
-#if __GNUC__
-# include
-#elif __ICCAVR32__ || __AAVR32__
-# include
-# include
-# if __ICCAVR32__
-# include
-# endif
-#else
-# error Unknown compiler
+#include
+#if __ICCAVR32__
+# include
#endif
-
#include "preprocessor.h"
@@ -69,6 +59,22 @@
#include
#include
+
+#if __ICCAVR32__
+
+/*! \name Compiler Keywords
+ *
+ * Port of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32.
+ */
+//! @{
+#define __asm__ asm
+#define __inline__ inline
+#define __volatile__
+//! @}
+
+#endif
+
+
/*! \name Usual Types
*/
//! @{
@@ -85,6 +91,7 @@ typedef float F32; //!< 32-bit floating-point number.
typedef double F64; //!< 64-bit floating-point number.
//! @}
+
/*! \name Status Types
*/
//! @{
@@ -92,19 +99,6 @@ typedef Bool Status_bool_t; //!< Boolean status.
typedef U8 Status_t; //!< 8-bit-coded status.
//! @}
-#if __ICCAVR32__
-
-/*! \name Compiler Keywords
- *
- * Translation of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32.
- */
-//! @{
-#define __asm__ asm
-#define __inline__ inline
-#define __volatile__
-//! @}
-
-#endif
/*! \name Aliasing Aggregate Types
*/
@@ -210,6 +204,7 @@ typedef struct
#endif // __AVR32_ABI_COMPILER__
+
//_____ M A C R O S ________________________________________________________
/*! \name Usual Constants
@@ -233,9 +228,10 @@ typedef struct
#define SET 1
//! @}
+
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
-/*! \name Bit-Field Handling Macros
+/*! \name Bit-Field Handling
*/
//! @{
@@ -316,6 +312,7 @@ typedef struct
//! @}
+
/*! \brief This macro is used to test fatal errors.
*
* The macro tests if the expression is FALSE. If it is, a fatal error is
@@ -332,7 +329,8 @@ typedef struct
#define Assert(expr)
#endif
-/*! \name Zero-Bit Counting Macros
+
+/*! \name Zero-Bit Counting
*
* Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when
* applied to constant expressions (values known at compile time), so they are
@@ -372,7 +370,8 @@ typedef struct
//! @}
-/*! \name Alignment Macros
+
+/*! \name Alignment
*/
//! @{
@@ -424,7 +423,8 @@ typedef struct
//! @}
-/*! \name Mathematics Macros
+
+/*! \name Mathematics
*
* The same considerations as for clz and ctz apply here but AVR32-GCC does not
* provide built-in functions to access the assembly instructions abs, min and
@@ -536,6 +536,7 @@ typedef struct
//! @}
+
/*! \brief Calls the routine at address \a addr.
*
* It generates a long call opcode.
@@ -558,18 +559,39 @@ typedef struct
(\
{\
__asm__ __volatile__ (\
- "lda.w r8, _start\n\t"\
- "lddpc r9, 1f\n\t"\
- "stm --sp, r8-r9\n\t"\
+ "lddpc r9, 3f\n\t"\
"mfsr r8, %[SR]\n\t"\
"bfextu r8, r8, %[SR_MX_OFFSET], %[SR_MX_SIZE]\n\t"\
"cp.w r8, 0b001\n\t"\
"breq 0f\n\t"\
+ "sub r8, pc, $ - 1f\n\t"\
+ "pushm r8-r9\n\t"\
"rete\n"\
"0:\n\t"\
- "rets\n\t"\
- ".balign 4\n"\
+ "mtsr %[SR], r9\n"\
"1:\n\t"\
+ "mov r0, 0\n\t"\
+ "mov r1, 0\n\t"\
+ "mov r2, 0\n\t"\
+ "mov r3, 0\n\t"\
+ "mov r4, 0\n\t"\
+ "mov r5, 0\n\t"\
+ "mov r6, 0\n\t"\
+ "mov r7, 0\n\t"\
+ "mov r8, 0\n\t"\
+ "mov r9, 0\n\t"\
+ "mov r10, 0\n\t"\
+ "mov r11, 0\n\t"\
+ "mov r12, 0\n\t"\
+ "mov sp, 0\n\t"\
+ "stdsp sp[0], sp\n\t"\
+ "ldmts sp, sp\n\t"\
+ "mov lr, 0\n\t"\
+ "lddpc pc, 2f\n\t"\
+ ".balign 4\n"\
+ "2:\n\t"\
+ ".word _start\n"\
+ "3:\n\t"\
".word %[RESET_SR]"\
:\
: [SR] "i" (AVR32_SR),\
@@ -584,27 +606,84 @@ typedef struct
{\
extern void *volatile __program_start;\
__asm__ __volatile__ (\
- "mov r8, LWRD(__program_start)\n\t"\
- "orh r8, HWRD(__program_start)\n\t"\
+ "mov r7, LWRD(__program_start)\n\t"\
+ "orh r7, HWRD(__program_start)\n\t"\
"mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\
"orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\
- "stm --sp, r8-r9\n\t"\
"mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\
"bfextu r8, r8, "ASTRINGZ(AVR32_SR_M0_OFFSET)", "ASTRINGZ(AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE)"\n\t"\
"cp.w r8, 001b\n\t"\
- "breq $ + 4\n\t"\
+ "breq $ + 10\n\t"\
+ "sub r8, pc, -12\n\t"\
+ "pushm r8-r9\n\t"\
"rete\n\t"\
- "rets"\
+ "mtsr "ASTRINGZ(AVR32_SR)", r9\n\t"\
+ "mov r0, 0\n\t"\
+ "mov r1, 0\n\t"\
+ "mov r2, 0\n\t"\
+ "mov r3, 0\n\t"\
+ "mov r4, 0\n\t"\
+ "mov r5, 0\n\t"\
+ "mov r6, 0\n\t"\
+ "st.w r0[4], r7\n\t"\
+ "mov r7, 0\n\t"\
+ "mov r8, 0\n\t"\
+ "mov r9, 0\n\t"\
+ "mov r10, 0\n\t"\
+ "mov r11, 0\n\t"\
+ "mov r12, 0\n\t"\
+ "mov sp, 0\n\t"\
+ "stdsp sp[0], sp\n\t"\
+ "ldmts sp, sp\n\t"\
+ "mov lr, 0\n\t"\
+ "ld.w pc, lr[4]"\
);\
__program_start;\
-}
+ }
#endif
-/*! \name CPU Status Register Macros
+
+/*! \name System Register Access
*/
//! @{
-/*! \brief Disables all exceptions.
+/*! \brief Gets the value of the \a sysreg system register.
+ *
+ * \param sysreg Address of the system register of which to get the value.
+ *
+ * \return Value of the \a sysreg system register.
+ */
+#if __GNUC__
+ #define Get_system_register(sysreg) __builtin_mfsr(sysreg)
+#elif __ICCAVR32__
+ #define Get_system_register(sysreg) __get_system_register(sysreg)
+#endif
+
+/*! \brief Sets the value of the \a sysreg system register to \a value.
+ *
+ * \param sysreg Address of the system register of which to set the value.
+ * \param value Value to set the \a sysreg system register to.
+ */
+#if __GNUC__
+ #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value)
+#elif __ICCAVR32__
+ #define Set_system_register(sysreg, value) __set_system_register(sysreg, value)
+#endif
+
+//! @}
+
+
+/*! \name CPU Status Register Access
+ */
+//! @{
+
+/*! \brief Tells whether exceptions are globally enabled.
+ *
+ * \return \c 1 if exceptions are globally enabled, else \c 0.
+ */
+#define Is_global_exception_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK))
+
+/*! \brief Disables exceptions globally.
*/
#if __GNUC__
#define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));})
@@ -612,7 +691,7 @@ typedef struct
#define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET))
#endif
-/*! \brief Enables all exceptions.
+/*! \brief Enables exceptions globally.
*/
#if __GNUC__
#define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));})
@@ -620,7 +699,13 @@ typedef struct
#define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET))
#endif
-/*! \brief Disables all interrupts.
+/*! \brief Tells whether interrupts are globally enabled.
+ *
+ * \return \c 1 if interrupts are globally enabled, else \c 0.
+ */
+#define Is_global_interrupt_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_GM_MASK))
+
+/*! \brief Disables interrupts globally.
*/
#if __GNUC__
#define Disable_global_interrupt() ({__asm__ __volatile__ ("ssrf\t%0\n\tnop\n\tnop" : : "i" (AVR32_SR_GM_OFFSET));})
@@ -628,7 +713,7 @@ typedef struct
#define Disable_global_interrupt() {__asm__ __volatile__ ("ssrf\t"ASTRINGZ(AVR32_SR_GM_OFFSET)"\n\tnop\n\tnop");}
#endif
-/*! \brief Enables all interrupts.
+/*! \brief Enables interrupts globally.
*/
#if __GNUC__
#define Enable_global_interrupt() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_GM_OFFSET));})
@@ -636,6 +721,14 @@ typedef struct
#define Enable_global_interrupt() (__enable_interrupt())
#endif
+/*! \brief Tells whether interrupt level \a int_lev is enabled.
+ *
+ * \param int_lev Interrupt level (0 to 3).
+ *
+ * \return \c 1 if interrupt level \a int_lev is enabled, else \c 0.
+ */
+#define Is_interrupt_level_enabled(int_lev) (!Tst_bits(Get_system_register(AVR32_SR), TPASTE3(AVR32_SR_I, int_lev, M_MASK)))
+
/*! \brief Disables interrupt level \a int_lev.
*
* \param int_lev Interrupt level to disable (0 to 3).
@@ -658,37 +751,9 @@ typedef struct
//! @}
-/*! \name System Register Access Macros
- */
-//! @{
-
-/*! \brief Gets the value of the \a sysreg system register.
- *
- * \param sysreg Address of the system register of which to get the value.
- *
- * \return Value of the \a sysreg system register.
- */
-#if __GNUC__
- #define Get_system_register(sysreg) __builtin_mfsr(sysreg)
-#elif __ICCAVR32__
- #define Get_system_register(sysreg) __get_system_register(sysreg)
-#endif
-
-/*! \brief Sets the value of the \a sysreg system register to \a value.
- *
- * \param sysreg Address of the system register of which to set the value.
- * \param value Value to set the \a sysreg system register to.
- */
-#if __GNUC__
- #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value)
-#elif __ICCAVR32__
- #define Set_system_register(sysreg, value) __set_system_register(sysreg, value)
-#endif
-
-//! @}
-
#endif // __AVR32_ABI_COMPILER__
+
//! Boolean evaluating MCU little endianism.
#if (__GNUC__ && __AVR32__) || (__ICCAVR32__ || __AAVR32__)
#define LITTLE_ENDIAN_MCU FALSE
@@ -702,34 +767,39 @@ typedef struct
//! Boolean evaluating MCU big endianism.
#define BIG_ENDIAN_MCU (!LITTLE_ENDIAN_MCU)
+
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
-/*! \name U16/U32/U64 MCU Endianism Handling Macros
+/*! \name MCU Endianism Handling
*/
//! @{
+
#if LITTLE_ENDIAN_MCU
+
#define LSB(u16) (((U8 *)&(u16))[0]) //!< Least significant byte of \a u16.
#define MSB(u16) (((U8 *)&(u16))[1]) //!< Most significant byte of \a u16.
+
#define LSH(u32) (((U16 *)&(u32))[0]) //!< Least significant half-word of \a u32.
#define MSH(u32) (((U16 *)&(u32))[1]) //!< Most significant half-word of \a u32.
#define LSB0W(u32) (((U8 *)&(u32))[0]) //!< Least significant byte of 1st rank of \a u32.
#define LSB1W(u32) (((U8 *)&(u32))[1]) //!< Least significant byte of 2nd rank of \a u32.
#define LSB2W(u32) (((U8 *)&(u32))[2]) //!< Least significant byte of 3rd rank of \a u32.
#define LSB3W(u32) (((U8 *)&(u32))[3]) //!< Least significant byte of 4th rank of \a u32.
- #define MSB3W(u32) LSB0W(u32) //!< Most significant byte of 1st rank of \a u32.
- #define MSB2W(u32) LSB1W(u32) //!< Most significant byte of 2nd rank of \a u32.
- #define MSB1W(u32) LSB2W(u32) //!< Most significant byte of 3rd rank of \a u32.
- #define MSB0W(u32) LSB3W(u32) //!< Most significant byte of 4th rank of \a u32.
+ #define MSB3W(u32) LSB0W(u32) //!< Most significant byte of 4th rank of \a u32.
+ #define MSB2W(u32) LSB1W(u32) //!< Most significant byte of 3rd rank of \a u32.
+ #define MSB1W(u32) LSB2W(u32) //!< Most significant byte of 2nd rank of \a u32.
+ #define MSB0W(u32) LSB3W(u32) //!< Most significant byte of 1st rank of \a u32.
+
#define LSW(u64) (((U32 *)&(u64))[0]) //!< Least significant word of \a u64.
#define MSW(u64) (((U32 *)&(u64))[1]) //!< Most significant word of \a u64.
#define LSH0(u64) (((U16 *)&(u64))[0]) //!< Least significant half-word of 1st rank of \a u64.
#define LSH1(u64) (((U16 *)&(u64))[1]) //!< Least significant half-word of 2nd rank of \a u64.
#define LSH2(u64) (((U16 *)&(u64))[2]) //!< Least significant half-word of 3rd rank of \a u64.
#define LSH3(u64) (((U16 *)&(u64))[3]) //!< Least significant half-word of 4th rank of \a u64.
- #define MSH3(u64) LSH0(u64) //!< Most significant half-word of 1st rank of \a u64.
- #define MSH2(u64) LSH1(u64) //!< Most significant half-word of 2nd rank of \a u64.
- #define MSH1(u64) LSH2(u64) //!< Most significant half-word of 3rd rank of \a u64.
- #define MSH0(u64) LSH3(u64) //!< Most significant half-word of 4th rank of \a u64.
+ #define MSH3(u64) LSH0(u64) //!< Most significant half-word of 4th rank of \a u64.
+ #define MSH2(u64) LSH1(u64) //!< Most significant half-word of 3rd rank of \a u64.
+ #define MSH1(u64) LSH2(u64) //!< Most significant half-word of 2nd rank of \a u64.
+ #define MSH0(u64) LSH3(u64) //!< Most significant half-word of 1st rank of \a u64.
#define LSB0D(u64) (((U8 *)&(u64))[0]) //!< Least significant byte of 1st rank of \a u64.
#define LSB1D(u64) (((U8 *)&(u64))[1]) //!< Least significant byte of 2nd rank of \a u64.
#define LSB2D(u64) (((U8 *)&(u64))[2]) //!< Least significant byte of 3rd rank of \a u64.
@@ -738,37 +808,41 @@ typedef struct
#define LSB5D(u64) (((U8 *)&(u64))[5]) //!< Least significant byte of 6th rank of \a u64.
#define LSB6D(u64) (((U8 *)&(u64))[6]) //!< Least significant byte of 7th rank of \a u64.
#define LSB7D(u64) (((U8 *)&(u64))[7]) //!< Least significant byte of 8th rank of \a u64.
- #define MSB7D(u64) LSB0D(u64) //!< Most significant byte of 1st rank of \a u64.
- #define MSB6D(u64) LSB1D(u64) //!< Most significant byte of 2nd rank of \a u64.
- #define MSB5D(u64) LSB2D(u64) //!< Most significant byte of 3rd rank of \a u64.
- #define MSB4D(u64) LSB3D(u64) //!< Most significant byte of 4th rank of \a u64.
- #define MSB3D(u64) LSB4D(u64) //!< Most significant byte of 5th rank of \a u64.
- #define MSB2D(u64) LSB5D(u64) //!< Most significant byte of 6th rank of \a u64.
- #define MSB1D(u64) LSB6D(u64) //!< Most significant byte of 7th rank of \a u64.
- #define MSB0D(u64) LSB7D(u64) //!< Most significant byte of 8th rank of \a u64.
+ #define MSB7D(u64) LSB0D(u64) //!< Most significant byte of 8th rank of \a u64.
+ #define MSB6D(u64) LSB1D(u64) //!< Most significant byte of 7th rank of \a u64.
+ #define MSB5D(u64) LSB2D(u64) //!< Most significant byte of 6th rank of \a u64.
+ #define MSB4D(u64) LSB3D(u64) //!< Most significant byte of 5th rank of \a u64.
+ #define MSB3D(u64) LSB4D(u64) //!< Most significant byte of 4th rank of \a u64.
+ #define MSB2D(u64) LSB5D(u64) //!< Most significant byte of 3rd rank of \a u64.
+ #define MSB1D(u64) LSB6D(u64) //!< Most significant byte of 2nd rank of \a u64.
+ #define MSB0D(u64) LSB7D(u64) //!< Most significant byte of 1st rank of \a u64.
+
#else // BIG_ENDIAN_MCU
+
#define MSB(u16) (((U8 *)&(u16))[0]) //!< Most significant byte of \a u16.
#define LSB(u16) (((U8 *)&(u16))[1]) //!< Least significant byte of \a u16.
+
#define MSH(u32) (((U16 *)&(u32))[0]) //!< Most significant half-word of \a u32.
#define LSH(u32) (((U16 *)&(u32))[1]) //!< Least significant half-word of \a u32.
#define MSB0W(u32) (((U8 *)&(u32))[0]) //!< Most significant byte of 1st rank of \a u32.
#define MSB1W(u32) (((U8 *)&(u32))[1]) //!< Most significant byte of 2nd rank of \a u32.
#define MSB2W(u32) (((U8 *)&(u32))[2]) //!< Most significant byte of 3rd rank of \a u32.
#define MSB3W(u32) (((U8 *)&(u32))[3]) //!< Most significant byte of 4th rank of \a u32.
- #define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 1st rank of \a u32.
- #define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 2nd rank of \a u32.
- #define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 3rd rank of \a u32.
- #define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 4th rank of \a u32.
+ #define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 4th rank of \a u32.
+ #define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 3rd rank of \a u32.
+ #define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 2nd rank of \a u32.
+ #define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 1st rank of \a u32.
+
#define MSW(u64) (((U32 *)&(u64))[0]) //!< Most significant word of \a u64.
#define LSW(u64) (((U32 *)&(u64))[1]) //!< Least significant word of \a u64.
#define MSH0(u64) (((U16 *)&(u64))[0]) //!< Most significant half-word of 1st rank of \a u64.
#define MSH1(u64) (((U16 *)&(u64))[1]) //!< Most significant half-word of 2nd rank of \a u64.
#define MSH2(u64) (((U16 *)&(u64))[2]) //!< Most significant half-word of 3rd rank of \a u64.
#define MSH3(u64) (((U16 *)&(u64))[3]) //!< Most significant half-word of 4th rank of \a u64.
- #define LSH3(u64) MSH0(u64) //!< Least significant half-word of 1st rank of \a u64.
- #define LSH2(u64) MSH1(u64) //!< Least significant half-word of 2nd rank of \a u64.
- #define LSH1(u64) MSH2(u64) //!< Least significant half-word of 3rd rank of \a u64.
- #define LSH0(u64) MSH3(u64) //!< Least significant half-word of 4th rank of \a u64.
+ #define LSH3(u64) MSH0(u64) //!< Least significant half-word of 4th rank of \a u64.
+ #define LSH2(u64) MSH1(u64) //!< Least significant half-word of 3rd rank of \a u64.
+ #define LSH1(u64) MSH2(u64) //!< Least significant half-word of 2nd rank of \a u64.
+ #define LSH0(u64) MSH3(u64) //!< Least significant half-word of 1st rank of \a u64.
#define MSB0D(u64) (((U8 *)&(u64))[0]) //!< Most significant byte of 1st rank of \a u64.
#define MSB1D(u64) (((U8 *)&(u64))[1]) //!< Most significant byte of 2nd rank of \a u64.
#define MSB2D(u64) (((U8 *)&(u64))[2]) //!< Most significant byte of 3rd rank of \a u64.
@@ -777,18 +851,21 @@ typedef struct
#define MSB5D(u64) (((U8 *)&(u64))[5]) //!< Most significant byte of 6th rank of \a u64.
#define MSB6D(u64) (((U8 *)&(u64))[6]) //!< Most significant byte of 7th rank of \a u64.
#define MSB7D(u64) (((U8 *)&(u64))[7]) //!< Most significant byte of 8th rank of \a u64.
- #define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 1st rank of \a u64.
- #define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 2nd rank of \a u64.
- #define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 3rd rank of \a u64.
- #define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 4th rank of \a u64.
- #define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 5th rank of \a u64.
- #define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 6th rank of \a u64.
- #define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 7th rank of \a u64.
- #define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 8th rank of \a u64.
+ #define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 8th rank of \a u64.
+ #define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 7th rank of \a u64.
+ #define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 6th rank of \a u64.
+ #define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 5th rank of \a u64.
+ #define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 4th rank of \a u64.
+ #define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 3rd rank of \a u64.
+ #define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 2nd rank of \a u64.
+ #define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 1st rank of \a u64.
+
#endif
+
//! @}
-/*! \name Endianism Conversion Macros
+
+/*! \name Endianism Conversion
*
* The same considerations as for clz and ctz apply here but AVR32-GCC's
* __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when
@@ -874,6 +951,35 @@ typedef struct
//! @}
+
+/*! \name Target Abstraction
+ */
+//! @{
+
+#define _GLOBEXT_ extern //!< extern storage-class specifier.
+#define _CONST_TYPE_ const //!< const type qualifier.
+#define _MEM_TYPE_SLOW_ //!< Slow memory type.
+#define _MEM_TYPE_MEDFAST_ //!< Fairly fast memory type.
+#define _MEM_TYPE_FAST_ //!< Fast memory type.
+
+typedef U8 Byte; //!< 8-bit unsigned integer.
+
+#define memcmp_ram2ram memcmp //!< Target-specific memcmp of RAM to RAM.
+#define memcmp_code2ram memcmp //!< Target-specific memcmp of RAM to NVRAM.
+#define memcpy_ram2ram memcpy //!< Target-specific memcpy from RAM to RAM.
+#define memcpy_code2ram memcpy //!< Target-specific memcpy from NVRAM to RAM.
+
+#define LSB0(u32) LSB0W(u32) //!< Least significant byte of 1st rank of \a u32.
+#define LSB1(u32) LSB1W(u32) //!< Least significant byte of 2nd rank of \a u32.
+#define LSB2(u32) LSB2W(u32) //!< Least significant byte of 3rd rank of \a u32.
+#define LSB3(u32) LSB3W(u32) //!< Least significant byte of 4th rank of \a u32.
+#define MSB3(u32) MSB3W(u32) //!< Most significant byte of 4th rank of \a u32.
+#define MSB2(u32) MSB2W(u32) //!< Most significant byte of 3rd rank of \a u32.
+#define MSB1(u32) MSB1W(u32) //!< Most significant byte of 2nd rank of \a u32.
+#define MSB0(u32) MSB0W(u32) //!< Most significant byte of 1st rank of \a u32.
+
+//! @}
+
#endif // __AVR32_ABI_COMPILER__
diff --git a/Demo/lwIP_AVR32_UC3/conf_eth.h b/Demo/lwIP_AVR32_UC3/conf_eth.h
index bc19a9e2b..661ba4b52 100644
--- a/Demo/lwIP_AVR32_UC3/conf_eth.h
+++ b/Demo/lwIP_AVR32_UC3/conf_eth.h
@@ -1,5 +1,3 @@
-/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file ******************************************************************
*
@@ -12,7 +10,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
***************************************************************************/
@@ -53,8 +51,8 @@
/*! define stack size for TFTP server task */
#define lwipBASIC_TFTP_SERVER_STACK_SIZE 1024
-/*! define stack size for SMTP host task */
-#define lwipBASIC_SMTP_HOST_STACK_SIZE 256
+/*! define stack size for SMTP Client task */
+#define lwipBASIC_SMTP_CLIENT_STACK_SIZE 256
/*! define stack size for lwIP task */
#define lwipINTERFACE_STACK_SIZE 512
@@ -68,8 +66,8 @@
/*! define TFTP server priority */
#define ethTFTPSERVER_PRIORITY ( tskIDLE_PRIORITY + 3 )
-/*! define SMTP host priority */
-#define ethSMTPHOST_PRIORITY ( tskIDLE_PRIORITY + 5 )
+/*! define SMTP Client priority */
+#define ethSMTPCLIENT_PRIORITY ( tskIDLE_PRIORITY + 5 )
/*! define lwIP task priority */
#define lwipINTERFACE_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
@@ -83,6 +81,26 @@
/*! LED used by the ethernet task, toggled on each activation */
#define webCONN_LED 7
+/*! Phy Address (set through strap options) */
+#define ETHERNET_CONF_PHY_ADDR 0x01
+#define ETHERNET_CONF_PHY_ID 0x20005C90
+
+/*! Number of receive buffers */
+#define ETHERNET_CONF_NB_RX_BUFFERS 20
+
+/*! USE_RMII_INTERFACE must be defined as 1 to use an RMII interface, or 0
+to use an MII interface. */
+#define ETHERNET_CONF_USE_RMII_INTERFACE 1
+
+/*! Number of Transmit buffers */
+#define ETHERNET_CONF_NB_TX_BUFFERS 10
+
+/*! Size of each Transmit buffer. */
+#define ETHERNET_CONF_TX_BUFFER_SIZE 512
+
+/*! Clock definition */
+#define ETHERNET_CONF_SYSTEM_CLOCK 48000000
+
/*! Use Auto Negociation to get speed and duplex */
#define ETHERNET_CONF_AN_ENABLE 1
@@ -94,50 +112,29 @@
/* ethernet default parameters */
/*! MAC address definition. The MAC address must be unique on the network. */
-#define emacETHADDR0 0x00
-#define emacETHADDR1 0x04
-#define emacETHADDR2 0x25
-#define emacETHADDR3 0x40
-#define emacETHADDR4 0x40
-#define emacETHADDR5 0x40
-
-#if 0
-/*! The IP address being used. */
-#define emacIPADDR0 10
-#define emacIPADDR1 172
-#define emacIPADDR2 214
-#define emacIPADDR3 40
-
-/*! The gateway address being used. */
-#define emacGATEWAY_ADDR0 10
-#define emacGATEWAY_ADDR1 172
-#define emacGATEWAY_ADDR2 250
-#define emacGATEWAY_ADDR3 1
+#define ETHERNET_CONF_ETHADDR0 0x00
+#define ETHERNET_CONF_ETHADDR1 0x04
+#define ETHERNET_CONF_ETHADDR2 0x25
+#define ETHERNET_CONF_ETHADDR3 0x40
+#define ETHERNET_CONF_ETHADDR4 0x40
+#define ETHERNET_CONF_ETHADDR5 0x40
-/*! The network mask being used. */
-#define emacNET_MASK0 255
-#define emacNET_MASK1 255
-#define emacNET_MASK2 0
-#define emacNET_MASK3 0
-
-#else
/*! The IP address being used. */
-#define emacIPADDR0 192
-#define emacIPADDR1 168
-#define emacIPADDR2 0
-#define emacIPADDR3 2
+#define ETHERNET_CONF_IPADDR0 192
+#define ETHERNET_CONF_IPADDR1 168
+#define ETHERNET_CONF_IPADDR2 0
+#define ETHERNET_CONF_IPADDR3 2
/*! The gateway address being used. */
-#define emacGATEWAY_ADDR0 192
-#define emacGATEWAY_ADDR1 168
-#define emacGATEWAY_ADDR2 0
-#define emacGATEWAY_ADDR3 1
+#define ETHERNET_CONF_GATEWAY_ADDR0 192
+#define ETHERNET_CONF_GATEWAY_ADDR1 168
+#define ETHERNET_CONF_GATEWAY_ADDR2 0
+#define ETHERNET_CONF_GATEWAY_ADDR3 1
/*! The network mask being used. */
-#define emacNET_MASK0 255
-#define emacNET_MASK1 255
-#define emacNET_MASK2 255
-#define emacNET_MASK3 0
-#endif
+#define ETHERNET_CONF_NET_MASK0 255
+#define ETHERNET_CONF_NET_MASK1 255
+#define ETHERNET_CONF_NET_MASK2 255
+#define ETHERNET_CONF_NET_MASK3 0
#endif
diff --git a/Demo/lwIP_AVR32_UC3/lwipopts.h b/Demo/lwIP_AVR32_UC3/lwipopts.h
new file mode 100644
index 000000000..21f325633
--- /dev/null
+++ b/Demo/lwIP_AVR32_UC3/lwipopts.h
@@ -0,0 +1,229 @@
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief lwIP configuration for AVR32 UC3.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: All AVR32 devices can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+
+#ifndef __LWIPOPTS_H__
+#define __LWIPOPTS_H__
+
+/* Include user defined options first */
+#include "conf_eth.h"
+// #include "lwip/debug.h"
+
+#define LWIP_PLATFORM_DIAG(x)
+#define LWIP_PLATFORM_ASSERT(x)
+
+/* Define default values for unconfigured parameters. */
+#define LWIP_NOASSERT 1 // To suppress some errors for now (no debug output)
+
+/* These two control is reclaimer functions should be compiled
+ in. Should always be turned on (1). */
+#define MEM_RECLAIM 1
+#define MEMP_RECLAIM 1
+
+
+/* Platform specific locking */
+
+/*
+ * enable SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection
+ * for certain critical regions during buffer allocation, deallocation and memory
+ * allocation and deallocation.
+ */
+#define SYS_LIGHTWEIGHT_PROT 1
+
+/* ---------- Memory options ---------- */
+// #define MEM_LIBC_MALLOC 0
+
+/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
+ lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
+ byte alignment -> define MEM_ALIGNMENT to 2. */
+#define MEM_ALIGNMENT 4
+
+/* MEM_SIZE: the size of the heap memory. If the application will send
+a lot of data that needs to be copied, this should be set high. */
+#define MEM_SIZE 3 * 1024
+
+// #define MEMP_SANITY_CHECK 1
+
+/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
+ sends a lot of data out of ROM (or other static memory), this
+ should be set high. */
+#define MEMP_NUM_PBUF 6
+
+/* Number of raw connection PCBs */
+#define MEMP_NUM_RAW_PCB 1
+
+#if (TFTP_USED == 1)
+ /* ---------- UDP options ---------- */
+ #define LWIP_UDP 1
+ #define UDP_TTL 255
+ /* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
+ per active UDP "connection". */
+
+ #define MEMP_NUM_UDP_PCB 1
+#else
+ /* ---------- UDP options ---------- */
+ #define LWIP_UDP 0
+ #define UDP_TTL 0
+ /* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
+ per active UDP "connection". */
+
+ #define MEMP_NUM_UDP_PCB 0
+#endif
+
+/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
+ connections. */
+#define MEMP_NUM_TCP_PCB 14
+/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
+ connections. */
+#define MEMP_NUM_TCP_PCB_LISTEN 2
+/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
+ segments. */
+#define MEMP_NUM_TCP_SEG 6
+/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active
+ timeouts. */
+#define MEMP_NUM_SYS_TIMEOUT 6
+
+/* The following four are used only with the sequential API and can be
+ set to 0 if the application only will use the raw API. */
+/* MEMP_NUM_NETBUF: the number of struct netbufs. */
+#define MEMP_NUM_NETBUF 3
+/* MEMP_NUM_NETCONN: the number of struct netconns. */
+#define MEMP_NUM_NETCONN 6
+/* MEMP_NUM_APIMSG: the number of struct api_msg, used for
+ communication between the TCP/IP stack and the sequential
+ programs. */
+#define MEMP_NUM_API_MSG 4
+/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used
+ for sequential API communication and incoming packets. Used in
+ src/api/tcpip.c. */
+#define MEMP_NUM_TCPIP_MSG 4
+
+
+/* ---------- Pbuf options ---------- */
+/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
+
+#define PBUF_POOL_SIZE 6
+
+/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
+
+#define PBUF_POOL_BUFSIZE 500
+
+/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a
+ link level header. */
+#define PBUF_LINK_HLEN 16
+
+/* ---------- TCP options ---------- */
+#define LWIP_TCP 1
+#define TCP_TTL 255
+/* TCP receive window. */
+#define TCP_WND 1500
+/* Controls if TCP should queue segments that arrive out of
+ order. Define to 0 if your device is low on memory. */
+#define TCP_QUEUE_OOSEQ 1
+
+/* TCP Maximum segment size. */
+#define TCP_MSS 1500
+
+/* TCP sender buffer space (bytes). */
+#define TCP_SND_BUF 2150
+
+/* TCP sender buffer space (pbufs). This must be at least = 2 *
+ TCP_SND_BUF/TCP_MSS for things to work. */
+#define TCP_SND_QUEUELEN 6 * TCP_SND_BUF/TCP_MSS
+
+
+
+/* Maximum number of retransmissions of data segments. */
+#define TCP_MAXRTX 12
+
+/* Maximum number of retransmissions of SYN segments. */
+#define TCP_SYNMAXRTX 4
+
+/* ---------- ARP options ---------- */
+#define ARP_TABLE_SIZE 10
+#define ARP_QUEUEING 0
+
+/* ---------- IP options ---------- */
+/* Define IP_FORWARD to 1 if you wish to have the ability to forward
+ IP packets across network interfaces. If you are going to run lwIP
+ on a device with only one network interface, define this to 0. */
+#define IP_FORWARD 0
+
+/* If defined to 1, IP options are allowed (but not parsed). If
+ defined to 0, all packets with IP options are dropped. */
+#define IP_OPTIONS 1
+
+/* ---------- ICMP options ---------- */
+#define ICMP_TTL 255
+
+
+/* ---------- DHCP options ---------- */
+/* Define LWIP_DHCP to 1 if you want DHCP configuration of
+ interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
+ turning this on does currently not work. */
+#define LWIP_DHCP 0
+
+/* 1 if you want to do an ARP check on the offered address
+ (recommended). */
+#define DHCP_DOES_ARP_CHECK 1
+
+#define TCPIP_THREAD_PRIO lwipINTERFACE_TASK_PRIORITY
+
+/* ---------- Statistics options ---------- */
+#define LWIP_STATS 1
+
+#define LWIP_STATS_DISPLAY 1
+
+#if LWIP_STATS
+#define LINK_STATS 1
+#define IP_STATS 1
+#define ICMP_STATS 1
+#define UDP_STATS 1
+#define TCP_STATS 1
+#define MEM_STATS 1
+#define MEMP_STATS 1
+#define PBUF_STATS 1
+#define SYS_STATS 1
+#endif /* STATS */
+
+
+#endif /* __LWIPOPTS_H__ */
diff --git a/Demo/lwIP_AVR32_UC3/main.c b/Demo/lwIP_AVR32_UC3/main.c
index 9a398313b..342235509 100644
--- a/Demo/lwIP_AVR32_UC3/main.c
+++ b/Demo/lwIP_AVR32_UC3/main.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/printf-stdarg.c b/Demo/lwIP_AVR32_UC3/printf-stdarg.c
index 75dfab73d..b4fca6450 100644
--- a/Demo/lwIP_AVR32_UC3/printf-stdarg.c
+++ b/Demo/lwIP_AVR32_UC3/printf-stdarg.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -10,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
diff --git a/Demo/lwIP_AVR32_UC3/readme.html b/Demo/lwIP_AVR32_UC3/readme.html
index 9fbee43b3..b625a06fe 100644
--- a/Demo/lwIP_AVR32_UC3/readme.html
+++ b/Demo/lwIP_AVR32_UC3/readme.html
@@ -4,20 +4,20 @@
-Back to main page
-AVR®32 AT32UC3 Series Software Library: Basic Web server and TFTP server example.
+ Back to the SERVICES main page
+AVR®32 AT32UC3 Series Software Framework: Basic Web server and TFTP server example.
Copyright © 2007 Atmel Corporation
-Introduction
+Introduction
This example implements a basic Web server and a basic TFTP server.
- It is running on top of the lwIP TCP/IP stack and the AVR32 UC3 freeRTOS.org port.
- This example thus contains a port of the lwIP TCP/IP stack . This port is using both the AVR32 UC3 freeRTOS.org port and the AVR32 UC3A MACB interface for the Ethernet access.
+ It is running on top of the lwIP TCP/IP stack and the AVR32 UC3 freeRTOS.org port.
+ This example thus contains a port of the lwIP TCP/IP stack . This port is using both the AVR32 UC3 freeRTOS.org port and the AVR32 UC3A MACB interface for the Ethernet access.
-lwIP TCP/IP stack
+lwIP TCP/IP stack
lwIP is an implementation of the TCP/IP protocol suite. The focus of the lwIP TCP/IP implementation is to reduce resource usage while still having a full scale TCP.
lwIP features :
IP (Internet Protocol) including packet forwarding over multiple network interfaces
@@ -29,18 +29,18 @@
DHCP (Dynamic Host Configuration Protocol)
PPP (Point-to-Point Protocol)
ARP (Address Resolution Protocol) for Ethernet
-
+lwIP is freely available (under a BSD-style license) in C source code format and can be downloaded from the development homepage .
-The Basic Web server
- Implements a simplistic WEB server.
+The Basic Web server
+ Implements a simplistic WEB server. To use this demo part, define HTTP_USED to 1, else define to 0. (default is 1)
Demo description : Every time a connection is made and data is received, a dynamic page that shows the current FreeRTOS.org kernel statistics is generated and returned. The connection is then closed.
Note : The WEB server is reachable at the IP address 192.168.0.2.
-The Basic TFTP server
- Implements a simplistic TFTP server.
+The Basic TFTP server
+ Implements a simplistic TFTP server. To use this demo part, define TFTP_USED to 1, else define to 0. (default is 1)
Demo description :
To put a file onto the TFTP server (Supported file size < 2048 bytes), on a PC command line type tftp 192.168.0.2 PUT "a_file" : this will copy a_file from your hard drive to a RAM buffer of the demo.
To get a file from the TFTP server, on a PC command line type tftp 192.168.0.2 GET "a_file" : this will copy a_file from the RAM buffer of the application to the PC's hard drive.
@@ -49,46 +49,25 @@
-Device Info
- All AVR32 UC3A devices with a MACB module can be used. This example has been tested with the following setup(s):
-
AT32UC3A0512 on the EVK1100 evaluation kit.
-
-
-
-Contact Info
-For more info about Atmel AVR32 visit Atmel AVR32
- AVR32 Application Notes
- Support mail: avr32@atmel.com
-
-
-
-License
+The Basic SMTP client
+ Implements a simplistic SMTP client. To use this demo part, define SMTP_USED to 1, else define to 0. (default is 0)
+ Demo description :
+
Prior to compile and run the SMTP client, you will have to configure the connection settings :
+ Server address : default is 192.168.0.1 .
+ Server name : used in the EHLO field, default is smtp.domain.com .
+ Mail sender : used in the mailfrom field, default is sender@domain.com .
+ Mail recipient : used in the mailto field, default is receiver@domain.com .
+ Mail content : default is Subject: *** SPAM ***\r\nFROM: \"Your Name here\" \r\nTO: \"Your Contact here\" \r\n\r\nSay what you want here .
+
+
Once all fields are configured, remove the #error lines to allow compilation.
+
Run the software and press Push Button 0 to send an email.
-Copyright (c) 2007, Atmel Corporation All rights reserved.
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-Redistributions of source code must retain the above copyright notice,
-this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
-this list of conditions and the following disclaimer in the documentation
-and/or other materials provided with the distribution.
- The name of ATMEL may not be used to endorse or promote products derived
-from this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
-WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
-SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
+Device Info
+ All AVR32 UC3A devices with a MACB module can be used. This example has been tested with the following setup(s):
+
AT32UC3A0512 on the EVK1100 evaluation kit.
+
diff --git a/Source/include/list.h b/Source/include/list.h
index 4a339e317..0a0c7ef2e 100644
--- a/Source/include/list.h
+++ b/Source/include/list.h
@@ -61,6 +61,12 @@
* \ingroup FreeRTOSIntro
*/
+/*
+ Changes from V4.3.1
+
+ + Included local const within listGET_OWNER_OF_NEXT_ENTRY() to assist
+ compiler with optimisation. Thanks B.R.
+*/
#ifndef LIST_H
#define LIST_H
@@ -158,14 +164,17 @@ typedef struct xLIST
* \ingroup LinkedList
*/
#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \
+{ \
+xList * const pxConstList = pxList; \
/* Increment the index to the next item and return the item, ensuring */ \
/* we don't return the marker used at the end of the list. */ \
- ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \
- if( ( pxList )->pxIndex == ( xListItem * ) &( ( pxList )->xListEnd ) ) \
+ ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
+ if( ( pxConstList )->pxIndex == ( xListItem * ) &( ( pxConstList )->xListEnd ) ) \
{ \
- ( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \
+ ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
} \
- pxTCB = ( pxList )->pxIndex->pvOwner
+ pxTCB = ( pxConstList )->pxIndex->pvOwner; \
+}
/*
diff --git a/Source/include/portable.h b/Source/include/portable.h
index 3c2fa6d15..06f290a71 100644
--- a/Source/include/portable.h
+++ b/Source/include/portable.h
@@ -188,12 +188,18 @@
typedef void ( __interrupt __far *pxISR )();
#endif
-#ifdef GCC_AVR32_PORT
- #include "portmacro.h"
-#endif
-
-#ifdef IAR_AVR32_PORT
- #include "portmacro.h"
+#ifdef __GNUC__
+ #ifdef __AVR32_AVR32A__
+ #include "portmacro.h"
+ #endif
+#endif
+
+#ifdef __ICCAVR32__
+ #ifdef __CORE__
+ #if __CORE__ == __AVR32A__
+ #include "portmacro.h"
+ #endif
+ #endif
#endif
/*
diff --git a/Source/portable/GCC/AVR32_UC3/exception.S b/Source/portable/GCC/AVR32_UC3/exception.S
index bf178833b..9a2833f2e 100644
--- a/Source/portable/GCC/AVR32_UC3/exception.S
+++ b/Source/portable/GCC/AVR32_UC3/exception.S
@@ -1,286 +1,297 @@
-/******************************************************************************
- * Exception and interrupt vectors.
- *
- * This file has been built from the Newlib exception.S. It maps all events
- * supported by a UC3.
- *
- * - Compiler: GNU GCC for AVR32
- * - Supported devices: All AVR32A devices with an INTC module can be used.
- * - AppNote:
- *
- * - author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
- *
- ******************************************************************************/
-
-/* Copyright (c) 2007, Atmel Corporation All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of ATMEL may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
- * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-
-#include
-#include "intc.h"
-
-
- .section .exception, "ax"
-
-
-// Start of Exception Vector Table.
-
- // EVBA must be aligned with a power of two strictly greater than the EVBA-
- // relative offset of the last vector.
- .balign 0x200
-
- // Export symbol.
- .global _evba
-_evba:
-
- .org 0x000
- // Unrecoverable Exception.
-_handle_Unrecoverable_Exception:
- rjmp $
-
- .org 0x004
- // TLB Multiple Hit: UNUSED IN AVR32A.
-_handle_TLB_Multiple_Hit:
- rjmp $
-
- .org 0x008
- // Bus Error Data Fetch.
-_handle_Bus_Error_Data_Fetch:
- rjmp $
-
- .org 0x00C
- // Bus Error Instruction Fetch.
-_handle_Bus_Error_Instruction_Fetch:
- rjmp $
-
- .org 0x010
- // NMI.
-_handle_NMI:
- rjmp $
-
- .org 0x014
- // Instruction Address.
-_handle_Instruction_Address:
- rjmp $
-
- .org 0x018
- // ITLB Protection.
-_handle_ITLB_Protection:
- rjmp $
-
- .org 0x01C
- // Breakpoint.
-_handle_Breakpoint:
- rjmp $
-
- .org 0x020
- // Illegal Opcode.
-_handle_Illegal_Opcode:
- rjmp $
-
- .org 0x024
- // Unimplemented Instruction.
-_handle_Unimplemented_Instruction:
- rjmp $
-
- .org 0x028
- // Privilege Violation.
-_handle_Privilege_Violation:
- rjmp $
-
- .org 0x02C
- // Floating-Point: UNUSED IN AVR32A.
-_handle_Floating_Point:
- rjmp $
-
- .org 0x030
- // Coprocessor Absent: UNUSED IN AVR32A.
-_handle_Coprocessor_Absent:
- rjmp $
-
- .org 0x034
- // Data Address (Read).
-_handle_Data_Address_Read:
- rjmp $
-
- .org 0x038
- // Data Address (Write).
-_handle_Data_Address_Write:
- rjmp $
-
- .org 0x03C
- // DTLB Protection (Read).
-_handle_DTLB_Protection_Read:
- rjmp $
-
- .org 0x040
- // DTLB Protection (Write).
-_handle_DTLB_Protection_Write:
- rjmp $
-
- .org 0x044
- // DTLB Modified: UNUSED IN AVR32A.
-_handle_DTLB_Modified:
- rjmp $
-
- .org 0x050
- // ITLB Miss: UNUSED IN AVR32A.
-_handle_ITLB_Miss:
- rjmp $
-
- .org 0x060
- // DTLB Miss (Read): UNUSED IN AVR32A.
-_handle_DTLB_Miss_Read:
- rjmp $
-
- .org 0x070
- // DTLB Miss (Write): UNUSED IN AVR32A.
-_handle_DTLB_Miss_Write:
- rjmp $
-
- .org 0x100
- // Supervisor Call.
-_handle_Supervisor_Call:
- lda.w pc, SCALLYield
-
-
-// Interrupt support.
-// The interrupt controller must provide the offset address relative to EVBA.
-// Important note:
-// All interrupts call a C function named _get_interrupt_handler.
-// This function will read group and interrupt line number to then return in
-// R12 a pointer to a user-provided interrupt handler.
-
- .balign 4
-
-_int0:
- // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
- // CPU upon interrupt entry.
-#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
- mfsr r12, AVR32_SR
- bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
- cp.w r12, 0b110
- brlo _int0_normal
- lddsp r12, sp[0 * 4]
- stdsp sp[6 * 4], r12
- lddsp r12, sp[1 * 4]
- stdsp sp[7 * 4], r12
- lddsp r12, sp[3 * 4]
- sub sp, -6 * 4
- rete
-_int0_normal:
-#endif
- mov r12, 0 // Pass the int_lev parameter to the _get_interrupt_handler function.
- call _get_interrupt_handler
- cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
- movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
- rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
-
-_int1:
- // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
- // CPU upon interrupt entry.
-#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
- mfsr r12, AVR32_SR
- bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
- cp.w r12, 0b110
- brlo _int1_normal
- lddsp r12, sp[0 * 4]
- stdsp sp[6 * 4], r12
- lddsp r12, sp[1 * 4]
- stdsp sp[7 * 4], r12
- lddsp r12, sp[3 * 4]
- sub sp, -6 * 4
- rete
-_int1_normal:
-#endif
- mov r12, 1 // Pass the int_lev parameter to the _get_interrupt_handler function.
- call _get_interrupt_handler
- cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
- movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
- rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
-
-_int2:
- // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
- // CPU upon interrupt entry.
-#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
- mfsr r12, AVR32_SR
- bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
- cp.w r12, 0b110
- brlo _int2_normal
- lddsp r12, sp[0 * 4]
- stdsp sp[6 * 4], r12
- lddsp r12, sp[1 * 4]
- stdsp sp[7 * 4], r12
- lddsp r12, sp[3 * 4]
- sub sp, -6 * 4
- rete
-_int2_normal:
-#endif
- mov r12, 2 // Pass the int_lev parameter to the _get_interrupt_handler function.
- call _get_interrupt_handler
- cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
- movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
- rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
-
-_int3:
- // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
- // CPU upon interrupt entry.
-#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
- mfsr r12, AVR32_SR
- bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
- cp.w r12, 0b110
- brlo _int3_normal
- lddsp r12, sp[0 * 4]
- stdsp sp[6 * 4], r12
- lddsp r12, sp[1 * 4]
- stdsp sp[7 * 4], r12
- lddsp r12, sp[3 * 4]
- sub sp, -6 * 4
- rete
-_int3_normal:
-#endif
- mov r12, 3 // Pass the int_lev parameter to the _get_interrupt_handler function.
- call _get_interrupt_handler
- cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
- movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
- rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
-
-
-// Constant data area.
-
- .balign 4
-
- // Values to store in the interrupt priority registers for the various interrupt priority levels.
- // The interrupt priority registers contain the interrupt priority level and
- // the EVBA-relative interrupt vector offset.
- .global ipr_val
-ipr_val:
- .word (INT0 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int0 - _evba),\
- (INT1 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int1 - _evba),\
- (INT2 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int2 - _evba),\
- (INT3 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int3 - _evba)
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Exception and interrupt vectors.
+ *
+ * This file maps all events supported by an AVR32UC.
+ *
+ * - Compiler: GNU GCC for AVR32
+ * - Supported devices: All AVR32UC devices with an INTC module can be used.
+ * - AppNote:
+ *
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include
+#include "intc.h"
+
+
+//! @{
+//! \verbatim
+
+
+ .section .exception, "ax", @progbits
+
+
+// Start of Exception Vector Table.
+
+ // EVBA must be aligned with a power of two strictly greater than the EVBA-
+ // relative offset of the last vector.
+ .balign 0x200
+
+ // Export symbol.
+ .global _evba
+ .type _evba, @function
+_evba:
+
+ .org 0x000
+ // Unrecoverable Exception.
+_handle_Unrecoverable_Exception:
+ rjmp $
+
+ .org 0x004
+ // TLB Multiple Hit: UNUSED IN AVR32UC.
+_handle_TLB_Multiple_Hit:
+ rjmp $
+
+ .org 0x008
+ // Bus Error Data Fetch.
+_handle_Bus_Error_Data_Fetch:
+ rjmp $
+
+ .org 0x00C
+ // Bus Error Instruction Fetch.
+_handle_Bus_Error_Instruction_Fetch:
+ rjmp $
+
+ .org 0x010
+ // NMI.
+_handle_NMI:
+ rjmp $
+
+ .org 0x014
+ // Instruction Address.
+_handle_Instruction_Address:
+ rjmp $
+
+ .org 0x018
+ // ITLB Protection.
+_handle_ITLB_Protection:
+ rjmp $
+
+ .org 0x01C
+ // Breakpoint.
+_handle_Breakpoint:
+ rjmp $
+
+ .org 0x020
+ // Illegal Opcode.
+_handle_Illegal_Opcode:
+ rjmp $
+
+ .org 0x024
+ // Unimplemented Instruction.
+_handle_Unimplemented_Instruction:
+ rjmp $
+
+ .org 0x028
+ // Privilege Violation.
+_handle_Privilege_Violation:
+ rjmp $
+
+ .org 0x02C
+ // Floating-Point: UNUSED IN AVR32UC.
+_handle_Floating_Point:
+ rjmp $
+
+ .org 0x030
+ // Coprocessor Absent: UNUSED IN AVR32UC.
+_handle_Coprocessor_Absent:
+ rjmp $
+
+ .org 0x034
+ // Data Address (Read).
+_handle_Data_Address_Read:
+ rjmp $
+
+ .org 0x038
+ // Data Address (Write).
+_handle_Data_Address_Write:
+ rjmp $
+
+ .org 0x03C
+ // DTLB Protection (Read).
+_handle_DTLB_Protection_Read:
+ rjmp $
+
+ .org 0x040
+ // DTLB Protection (Write).
+_handle_DTLB_Protection_Write:
+ rjmp $
+
+ .org 0x044
+ // DTLB Modified: UNUSED IN AVR32UC.
+_handle_DTLB_Modified:
+ rjmp $
+
+ .org 0x050
+ // ITLB Miss: UNUSED IN AVR32UC.
+_handle_ITLB_Miss:
+ rjmp $
+
+ .org 0x060
+ // DTLB Miss (Read): UNUSED IN AVR32UC.
+_handle_DTLB_Miss_Read:
+ rjmp $
+
+ .org 0x070
+ // DTLB Miss (Write): UNUSED IN AVR32UC.
+_handle_DTLB_Miss_Write:
+ rjmp $
+
+ .org 0x100
+ // Supervisor Call.
+_handle_Supervisor_Call:
+ lda.w pc, SCALLYield
+
+
+// Interrupt support.
+// The interrupt controller must provide the offset address relative to EVBA.
+// Important note:
+// All interrupts call a C function named _get_interrupt_handler.
+// This function will read group and interrupt line number to then return in
+// R12 a pointer to a user-provided interrupt handler.
+
+ .balign 4
+
+_int0:
+ // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
+ // CPU upon interrupt entry.
+#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
+ mfsr r12, AVR32_SR
+ bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
+ cp.w r12, 0b110
+ brlo _int0_normal
+ lddsp r12, sp[0 * 4]
+ stdsp sp[6 * 4], r12
+ lddsp r12, sp[1 * 4]
+ stdsp sp[7 * 4], r12
+ lddsp r12, sp[3 * 4]
+ sub sp, -6 * 4
+ rete
+_int0_normal:
+#endif
+ mov r12, 0 // Pass the int_lev parameter to the _get_interrupt_handler function.
+ call _get_interrupt_handler
+ cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
+ movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
+ rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
+
+_int1:
+ // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
+ // CPU upon interrupt entry.
+#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
+ mfsr r12, AVR32_SR
+ bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
+ cp.w r12, 0b110
+ brlo _int1_normal
+ lddsp r12, sp[0 * 4]
+ stdsp sp[6 * 4], r12
+ lddsp r12, sp[1 * 4]
+ stdsp sp[7 * 4], r12
+ lddsp r12, sp[3 * 4]
+ sub sp, -6 * 4
+ rete
+_int1_normal:
+#endif
+ mov r12, 1 // Pass the int_lev parameter to the _get_interrupt_handler function.
+ call _get_interrupt_handler
+ cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
+ movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
+ rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
+
+_int2:
+ // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
+ // CPU upon interrupt entry.
+#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
+ mfsr r12, AVR32_SR
+ bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
+ cp.w r12, 0b110
+ brlo _int2_normal
+ lddsp r12, sp[0 * 4]
+ stdsp sp[6 * 4], r12
+ lddsp r12, sp[1 * 4]
+ stdsp sp[7 * 4], r12
+ lddsp r12, sp[3 * 4]
+ sub sp, -6 * 4
+ rete
+_int2_normal:
+#endif
+ mov r12, 2 // Pass the int_lev parameter to the _get_interrupt_handler function.
+ call _get_interrupt_handler
+ cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
+ movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
+ rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
+
+_int3:
+ // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
+ // CPU upon interrupt entry.
+#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
+ mfsr r12, AVR32_SR
+ bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
+ cp.w r12, 0b110
+ brlo _int3_normal
+ lddsp r12, sp[0 * 4]
+ stdsp sp[6 * 4], r12
+ lddsp r12, sp[1 * 4]
+ stdsp sp[7 * 4], r12
+ lddsp r12, sp[3 * 4]
+ sub sp, -6 * 4
+ rete
+_int3_normal:
+#endif
+ mov r12, 3 // Pass the int_lev parameter to the _get_interrupt_handler function.
+ call _get_interrupt_handler
+ cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
+ movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
+ rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
+
+
+// Constant data area.
+
+ .balign 4
+
+ // Values to store in the interrupt priority registers for the various interrupt priority levels.
+ // The interrupt priority registers contain the interrupt priority level and
+ // the EVBA-relative interrupt vector offset.
+ .global ipr_val
+ .type ipr_val, @object
+ipr_val:
+ .word (INT0 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int0 - _evba),\
+ (INT1 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int1 - _evba),\
+ (INT2 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int2 - _evba),\
+ (INT3 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int3 - _evba)
+
+
+//! \endverbatim
+//! @}
diff --git a/Source/portable/GCC/AVR32_UC3/port.c b/Source/portable/GCC/AVR32_UC3/port.c
index debc76e37..ea04f6c7e 100644
--- a/Source/portable/GCC/AVR32_UC3/port.c
+++ b/Source/portable/GCC/AVR32_UC3/port.c
@@ -8,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -83,7 +83,8 @@ static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/
/*
- * Low-level initialization routine called during Newlib's startup.
+ * Low-level initialization routine called during startup, before the main
+ * function.
* This version comes in replacement to the default one provided by Newlib.
* Newlib's _init_startup only calls init_exceptions, but Newlib's exception
* vectors are not compatible with the SCALL management in the current FreeRTOS
@@ -124,13 +125,19 @@ void _init_startup(void)
/* Code section present if and only if the debug trace is activated. */
#if configDBG
+ {
+ static const gpio_map_t DBG_USART_GPIO_MAP =
+ {
+ { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
+ { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
+ };
/* Initialize the USART used for the debug trace with the configured parameters. */
set_usart_base( ( void * ) configDBG_USART );
- gpio_enable_module_pin( configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION );
- gpio_enable_module_pin( configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION );
+ gpio_enable_module( DBG_USART_GPIO_MAP,
+ sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
usart_init( configDBG_USART_BAUDRATE );
-
+ }
#endif
}
/*-----------------------------------------------------------*/
@@ -194,15 +201,15 @@ __attribute__((__naked__)) static void vTick( void )
/* Save the context of the interrupted task. */
portSAVE_CONTEXT_OS_INT();
- /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
- clock cycles from now. */
#if( configTICK_USE_TC==1 )
/* Clear the interrupt flag. */
AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
#else
+ /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
+ clock cycles from now. */
prvScheduleNextTick();
#endif
-
+
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
@@ -253,7 +260,6 @@ void vPortExitCritical( void )
}
/*-----------------------------------------------------------*/
-
/*
* Initialise the stack of a task to look exactly as if a call to
* portSAVE_CONTEXT had been called.
@@ -313,13 +319,39 @@ void vPortEndScheduler( void )
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
clock cycles from now. */
#if( configTICK_USE_TC==0 )
+ static void prvScheduleFirstTick(void)
+ {
+ unsigned long lCycles;
+
+ lCycles = Get_system_register(AVR32_COUNT);
+ lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
+ // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
+ // generation feature does not get disabled.
+ if(0 == lCycles)
+ {
+ lCycles++;
+ }
+ Set_system_register(AVR32_COMPARE, lCycles);
+ }
+
static void prvScheduleNextTick(void)
{
- unsigned long lCountVal, lCompareVal;
+ unsigned long lCycles, lCount;
- lCountVal = Get_system_register(AVR32_COUNT);
- lCompareVal = lCountVal + (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
- Set_system_register(AVR32_COMPARE, lCompareVal);
+ lCycles = Get_system_register(AVR32_COMPARE);
+ lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
+ // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
+ // generation feature does not get disabled.
+ if(0 == lCycles)
+ {
+ lCycles++;
+ }
+ lCount = Get_system_register(AVR32_COUNT);
+ if( lCycles < lCount )
+ { // We missed a tick, recover for the next.
+ lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
+ }
+ Set_system_register(AVR32_COMPARE, lCycles);
}
#endif
/*-----------------------------------------------------------*/
@@ -383,12 +415,12 @@ static void prvSetupTimerInterrupt(void)
INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);
/* Initialize the timer/counter. */
- tc_init_waveform(tc, &waveform_opt);
+ tc_init_waveform(tc, &waveform_opt);
/* Set the compare triggers.
Remember TC counter is 16-bits, so counting second is not possible!
That's why we configure it to count ms. */
- tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ/ 4) / 1000 );
+ tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
@@ -398,7 +430,7 @@ static void prvSetupTimerInterrupt(void)
#else
{
INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
- prvScheduleNextTick();
+ prvScheduleFirstTick();
}
#endif
}
diff --git a/Source/portable/GCC/AVR32_UC3/portmacro.h b/Source/portable/GCC/AVR32_UC3/portmacro.h
index 0e14bda5a..ee8ba0376 100644
--- a/Source/portable/GCC/AVR32_UC3/portmacro.h
+++ b/Source/portable/GCC/AVR32_UC3/portmacro.h
@@ -8,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -117,7 +117,7 @@
* The current source file name and line number are output with a colon before
* the formatted string.
* A carriage return and a linefeed are appended to the output.
- * stdout is redirected by Newlib to the USART configured by configDBG_USART.
+ * stdout is redirected to the USART configured by configDBG_USART.
* The parameters are the same as for the standard printf function.
* There is no return value.
* SHALL NOT BE CALLED FROM WITHIN AN INTERRUPT as fputs and printf use malloc,
diff --git a/Source/portable/IAR/AVR32_UC3/exception.s82 b/Source/portable/IAR/AVR32_UC3/exception.s82
index 90c5cb9af..4346bd728 100644
--- a/Source/portable/IAR/AVR32_UC3/exception.s82
+++ b/Source/portable/IAR/AVR32_UC3/exception.s82
@@ -1,15 +1,16 @@
-/******************************************************************************
- * Exception and interrupt vectors.
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
*
- * This file has been built from the Newlib exception.S. It maps all events
- * supported by a UC3.
+ * \brief Exception and interrupt vectors.
+ *
+ * This file maps all events supported by an AVR32UC.
*
* - Compiler: IAR EWAVR32
- * - Supported devices: All AVR32A devices with an INTC module can be used.
+ * - Supported devices: All AVR32UC devices with an INTC module can be used.
* - AppNote:
*
- * - author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * \author Atmel Corporation: http://www.atmel.com \n
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -41,11 +42,14 @@
*/
-#include
-#include
+#include
#include "intc.h"
+//! @{
+//! \verbatim
+
+
// Start of Exception Vector Table.
// EVBA must be aligned with a power of two strictly greater than the EVBA-
@@ -66,107 +70,107 @@ _evba:
ORG 0x000
// Unrecoverable Exception.
_handle_Unrecoverable_Exception:
- rjmp $
+ rjmp _handle_Unrecoverable_Exception
ORG 0x004
- // TLB Multiple Hit: UNUSED IN AVR32A.
+ // TLB Multiple Hit: UNUSED IN AVR32UC.
_handle_TLB_Multiple_Hit:
- rjmp $
+ rjmp _handle_TLB_Multiple_Hit
ORG 0x008
// Bus Error Data Fetch.
_handle_Bus_Error_Data_Fetch:
- rjmp $
+ rjmp _handle_Bus_Error_Data_Fetch
ORG 0x00C
// Bus Error Instruction Fetch.
_handle_Bus_Error_Instruction_Fetch:
- rjmp $
+ rjmp _handle_Bus_Error_Instruction_Fetch
ORG 0x010
// NMI.
_handle_NMI:
- rjmp $
+ rjmp _handle_NMI
ORG 0x014
// Instruction Address.
_handle_Instruction_Address:
- rjmp $
+ rjmp _handle_Instruction_Address
ORG 0x018
// ITLB Protection.
_handle_ITLB_Protection:
- rjmp $
+ rjmp _handle_ITLB_Protection
ORG 0x01C
// Breakpoint.
_handle_Breakpoint:
- rjmp $
+ rjmp _handle_Breakpoint
ORG 0x020
// Illegal Opcode.
_handle_Illegal_Opcode:
- rjmp $
+ rjmp _handle_Illegal_Opcode
ORG 0x024
// Unimplemented Instruction.
_handle_Unimplemented_Instruction:
- rjmp $
+ rjmp _handle_Unimplemented_Instruction
ORG 0x028
// Privilege Violation.
_handle_Privilege_Violation:
- rjmp $
+ rjmp _handle_Privilege_Violation
ORG 0x02C
- // Floating-Point: UNUSED IN AVR32A.
+ // Floating-Point: UNUSED IN AVR32UC.
_handle_Floating_Point:
- rjmp $
+ rjmp _handle_Floating_Point
ORG 0x030
- // Coprocessor Absent: UNUSED IN AVR32A.
+ // Coprocessor Absent: UNUSED IN AVR32UC.
_handle_Coprocessor_Absent:
- rjmp $
+ rjmp _handle_Coprocessor_Absent
ORG 0x034
// Data Address (Read).
_handle_Data_Address_Read:
- rjmp $
+ rjmp _handle_Data_Address_Read
ORG 0x038
// Data Address (Write).
_handle_Data_Address_Write:
- rjmp $
+ rjmp _handle_Data_Address_Write
ORG 0x03C
// DTLB Protection (Read).
_handle_DTLB_Protection_Read:
- rjmp $
+ rjmp _handle_DTLB_Protection_Read
ORG 0x040
// DTLB Protection (Write).
_handle_DTLB_Protection_Write:
- rjmp $
+ rjmp _handle_DTLB_Protection_Write
ORG 0x044
- // DTLB Modified: UNUSED IN AVR32A.
+ // DTLB Modified: UNUSED IN AVR32UC.
_handle_DTLB_Modified:
- rjmp $
+ rjmp _handle_DTLB_Modified
ORG 0x050
- // ITLB Miss: UNUSED IN AVR32A.
+ // ITLB Miss: UNUSED IN AVR32UC.
_handle_ITLB_Miss:
- rjmp $
+ rjmp _handle_ITLB_Miss
ORG 0x060
- // DTLB Miss (Read): UNUSED IN AVR32A.
+ // DTLB Miss (Read): UNUSED IN AVR32UC.
_handle_DTLB_Miss_Read:
- rjmp $
+ rjmp _handle_DTLB_Miss_Read
ORG 0x070
- // DTLB Miss (Write): UNUSED IN AVR32A.
+ // DTLB Miss (Write): UNUSED IN AVR32UC.
_handle_DTLB_Miss_Write:
- rjmp $
+ rjmp _handle_DTLB_Miss_Write
ORG 0x100
// Supervisor Call.
@@ -300,3 +304,7 @@ ipr_val:
END
+
+
+//! \endverbatim
+//! @}
diff --git a/Source/portable/IAR/AVR32_UC3/port.c b/Source/portable/IAR/AVR32_UC3/port.c
index 31e0a92bb..4b987b9ff 100644
--- a/Source/portable/IAR/AVR32_UC3/port.c
+++ b/Source/portable/IAR/AVR32_UC3/port.c
@@ -8,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -50,12 +50,10 @@
/* Scheduler includes. */
#include "FreeRTOS.h"
-
-/* Get rid of inline in task.h. */
#include "task.h"
/* AVR32 UC3 includes. */
-#include
+#include
#include
#include "gpio.h"
@@ -79,6 +77,10 @@ volatile unsigned portLONG ulCriticalNesting = 9999UL;
#if( configTICK_USE_TC==0 )
static void prvScheduleNextTick( void );
#endif
+
+/* Setup the timer to generate the tick interrupts. */
+static void prvSetupTimerInterrupt( void );
+
/*-----------------------------------------------------------*/
/*
@@ -111,21 +113,27 @@ int __low_level_init(void)
/* Code section present if and only if the debug trace is activated. */
#if configDBG
{
- static const usart_options_t usart_opt =
+ static const gpio_map_t DBG_USART_GPIO_MAP =
+ {
+ { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
+ { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
+ };
+
+ static const usart_options_t DBG_USART_OPTIONS =
{
- .baudrate = configDBG_USART_BAUDRATE,
- .charlength = 8,
- .paritytype = USART_NO_PARITY,
- .stopbits = USART_1_STOPBIT,
- .channelmode = USART_MODE_NORMAL
+ .baudrate = configDBG_USART_BAUDRATE,
+ .charlength = 8,
+ .paritytype = USART_NO_PARITY,
+ .stopbits = USART_1_STOPBIT,
+ .channelmode = USART_NORMAL_CHMODE
};
/* Initialize the USART used for the debug trace with the configured parameters. */
extern volatile avr32_usart_t *volatile stdio_usart_base;
stdio_usart_base = configDBG_USART;
- gpio_enable_module_pin(configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION);
- gpio_enable_module_pin(configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION);
- usart_init_rs232(configDBG_USART, &usart_opt, configCPU_CLOCK_HZ);
+ gpio_enable_module( DBG_USART_GPIO_MAP,
+ sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
+ usart_init_rs232(configDBG_USART, &DBG_USART_OPTIONS, configCPU_CLOCK_HZ);
}
#endif
@@ -159,15 +167,15 @@ static void vTick( void )
/* Save the context of the interrupted task. */
portSAVE_CONTEXT_OS_INT();
- /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
- clock cycles from now. */
#if( configTICK_USE_TC==1 )
/* Clear the interrupt flag. */
AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
#else
+ /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
+ clock cycles from now. */
prvScheduleNextTick();
#endif
-
+
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
@@ -219,10 +227,6 @@ void vPortExitCritical( void )
}
/*-----------------------------------------------------------*/
-/* Setup the timer to generate the tick interrupts. */
-static void prvSetupTimerInterrupt( void );
-/*-----------------------------------------------------------*/
-
/*
* Initialise the stack of a task to look exactly as if a call to
* portSAVE_CONTEXT had been called.
@@ -282,13 +286,39 @@ void vPortEndScheduler( void )
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
clock cycles from now. */
#if( configTICK_USE_TC==0 )
+ static void prvScheduleFirstTick(void)
+ {
+ unsigned long lCycles;
+
+ lCycles = Get_system_register(AVR32_COUNT);
+ lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
+ // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
+ // generation feature does not get disabled.
+ if(0 == lCycles)
+ {
+ lCycles++;
+ }
+ Set_system_register(AVR32_COMPARE, lCycles);
+ }
+
static void prvScheduleNextTick(void)
{
- unsigned long lCountVal, lCompareVal;
+ unsigned long lCycles, lCount;
- lCountVal = Get_system_register(AVR32_COUNT);
- lCompareVal = lCountVal + (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
- Set_system_register(AVR32_COMPARE, lCompareVal);
+ lCycles = Get_system_register(AVR32_COMPARE);
+ lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
+ // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
+ // generation feature does not get disabled.
+ if(0 == lCycles)
+ {
+ lCycles++;
+ }
+ lCount = Get_system_register(AVR32_COUNT);
+ if( lCycles < lCount )
+ { // We missed a tick, recover for the next.
+ lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
+ }
+ Set_system_register(AVR32_COMPARE, lCycles);
}
#endif
/*-----------------------------------------------------------*/
@@ -357,7 +387,7 @@ static void prvSetupTimerInterrupt(void)
/* Set the compare triggers.
Remember TC counter is 16-bits, so counting second is not possible!
That's why we configure it to count ms. */
- tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / 1000 );
+ tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
@@ -367,7 +397,7 @@ static void prvSetupTimerInterrupt(void)
#else
{
INTC_register_interrupt((__int_handler)&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
- prvScheduleNextTick();
+ prvScheduleFirstTick();
}
#endif
}
diff --git a/Source/portable/IAR/AVR32_UC3/portmacro.h b/Source/portable/IAR/AVR32_UC3/portmacro.h
index 685baa20d..71180eb67 100644
--- a/Source/portable/IAR/AVR32_UC3/portmacro.h
+++ b/Source/portable/IAR/AVR32_UC3/portmacro.h
@@ -8,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@@ -61,7 +61,7 @@
* These settings should not be altered.
*-----------------------------------------------------------
*/
-#include
+#include
#include "intc.h"
#include "compiler.h"
@@ -118,7 +118,7 @@
* The current source file name and line number are output with a colon before
* the formatted string.
* A carriage return and a linefeed are appended to the output.
- * stdout is redirected by Newlib to the USART configured by configDBG_USART.
+ * stdout is redirected to the USART configured by configDBG_USART.
* The parameters are the same as for the standard printf function.
* There is no return value.
* SHALL NOT BE CALLED FROM WITHIN AN INTERRUPT as fputs and printf use malloc,
@@ -508,11 +508,11 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
\
/* With the cooperative scheduler, as there is no context switch by interrupt, */ \
/* there is also no context save. */ \
-}
-
-/*
- * Input parameter: in R12, boolean. Perform a vTaskSwitchContext() if 1
- */
+}
+
+/*
+ * Input parameter: in R12, boolean. Perform a vTaskSwitchContext() if 1
+ */
#define portEXIT_SWITCHING_ISR() \
{ \
__asm__ __volatile__ ( \
@@ -523,14 +523,14 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
/* there is also no context restore. */ \
"rete" \
); \
-}
-
-#else
-
-/*
- * ISR entry and exit macros. These are only required if a task switch
- * is required from the ISR.
- */
+}
+
+#else
+
+/*
+ * ISR entry and exit macros. These are only required if a task switch
+ * is required from the ISR.
+ */
#define portENTER_SWITCHING_ISR() \
{ \
extern volatile unsigned portLONG ulCriticalNesting; \
diff --git a/Source/portable/IAR/AVR32_UC3/read.c b/Source/portable/IAR/AVR32_UC3/read.c
index 17dbfb20a..925c196f7 100644
--- a/Source/portable/IAR/AVR32_UC3/read.c
+++ b/Source/portable/IAR/AVR32_UC3/read.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -11,7 +9,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -44,7 +42,7 @@
#include
-#include
+#include
#include "usart.h"
diff --git a/Source/portable/IAR/AVR32_UC3/write.c b/Source/portable/IAR/AVR32_UC3/write.c
index 3732aae49..7dc8a71bb 100644
--- a/Source/portable/IAR/AVR32_UC3/write.c
+++ b/Source/portable/IAR/AVR32_UC3/write.c
@@ -1,5 +1,3 @@
-/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
-
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@@ -11,7 +9,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
- * Support email: avr32@atmel.com
+ * Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@@ -44,7 +42,7 @@
#include
-#include
+#include
#include "usart.h"