From: bauen1 Date: Thu, 4 Jan 2018 10:17:20 +0000 (+0100) Subject: Implemented the requested changes. X-Git-Tag: V2.17~50^2~9 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=14909f12fed0a2f5687ca4152116404234308d09;p=cc65 Implemented the requested changes. Moved none to its alphabetic place in the Makefile Reverted all changes to doc/customizing.sgml --- diff --git a/doc/customizing.sgml b/doc/customizing.sgml index 5eb73b648..e502f2e9d 100644 --- a/doc/customizing.sgml +++ b/doc/customizing.sgml @@ -81,6 +81,7 @@ SEGMENTS { ZEROPAGE: load = ZP, type = zp, define = yes; DATA: load = ROM, type = rw, define = yes, run = RAM; BSS: load = RAM, type = bss, define = yes; + HEAP: load = RAM, type = bss, optional = yes; STARTUP: load = ROM, type = ro; ONCE: load = ROM, type = ro, optional = yes; CODE: load = ROM, type = ro; @@ -94,6 +95,7 @@ The meaning of each of these segments is as follows.

ZEROPAGE: Data in page 0, defined by ZP as starting at $0 with length $100

DATA: Initialized data that can be modified by the program, stored in RAM

BSS: Uninitialized data stored in RAM (used for variable storage) +

HEAP: Uninitialized C-level heap storage in RAM, optional

STARTUP: The program initialization code, stored in ROM

ONCE: The code run once to initialize the system, stored in ROM

CODE: The program code, stored in ROM @@ -300,20 +302,23 @@ also forcing a BRK instruction into the CPU. Custom Run-Time Library Creation

The next step in customizing the cc65 toolset is creating a run-time -library for the targeted hardware. The recommended way to do this is to -modify the platform-independent standard library of the cc65 distribution. -It is named "none.lib" in the lib directory of the distribution. - -When using "none.lib" we need to supply our own crt0 -module with custom startup code. This is simply done by first copying the -the library and giving it a new name, compiling the startup code with ca65, -and finally using the ar65 archiver to add the module to the new library. -The steps are shown below: +library for the targeted hardware. The easiest way to do this is to +modify a standard library from the cc65 distribution. In this example, +there is no console I/O, mouse, joystick, etc. in the system, so it is +most appropriate to use the simplest library as the base, which is for +the Watara Supervision and is named "supervision.lib" in the +lib directory of the distribution. + +The only modification required is to replace the crt0 module in +the supervision.lib library with custom startup code. This is simply +done by first copying the library and giving it a new name, compiling +the startup code with ca65, and finally using the ar65 archiver to +replace the module in the new library. The steps are shown below: - cp /usr/local/share/cc65/lib/none.lib sbc.lib - ca65 crt0.s - ar65 a sbc.lib crt0.o +$ copy "C:\Program Files\cc65\lib\supervision.lib" sbc.lib +$ ca65 crt0.s +$ ar65 a sbc.lib crt0.o Interrupt Service Routine Definition

@@ -701,14 +706,14 @@ that can be used as the initialization data for the Xilinx Block RAM used for code storage: - cc65 -t none -O --cpu 65sc02 main.c - ca65 --cpu 65sc02 main.s - ca65 --cpu 65sc02 rs232_tx.s - ca65 --cpu 65sc02 interrupt.s - ca65 --cpu 65sc02 vectors.s - ca65 --cpu 65sc02 wait.s - ld65 -C sbc.cfg -m main.map interrupt.o vectors.o wait.o - rs232_tx.o main.o sbc.lib +$ cc65 -t none -O --cpu 65sc02 main.c +$ ca65 --cpu 65sc02 main.s +$ ca65 --cpu 65sc02 rs232_tx.s +$ ca65 --cpu 65sc02 interrupt.s +$ ca65 --cpu 65sc02 vectors.s +$ ca65 --cpu 65sc02 wait.s +$ ld65 -C sbc.cfg -m main.map interrupt.o vectors.o wait.o rs232_tx.o + main.o sbc.lib During the C-level code compilation phase (cc65), assumptions diff --git a/libsrc/Makefile b/libsrc/Makefile index 2ac0c78f0..0d0cd320b 100644 --- a/libsrc/Makefile +++ b/libsrc/Makefile @@ -27,13 +27,13 @@ TARGETS = apple2 \ gamate \ lynx \ nes \ + none \ osic1p \ pce \ sim6502 \ sim65c02 \ supervision \ - telestrat \ - none + telestrat DRVTYPES = emd \ joy \