From: Bin Meng Date: Wed, 26 Jul 2017 03:12:05 +0000 (-0700) Subject: x86: tsc: Rename try_msr_calibrate_tsc() to cpu_mhz_from_msr() X-Git-Tag: v2017.09-rc2~135^2~28 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=167a40166bb116a19d23c946b6394636da34f3cf;p=u-boot x86: tsc: Rename try_msr_calibrate_tsc() to cpu_mhz_from_msr() Rename try_msr_calibrate_tsc() to cpu_mhz_from_msr(), as that better describes what the routine does. This keeps in sync with Linux kernel commit: 02c0cd2: x86/tsc_msr: Remove irqoff around MSR-based TSC enumeration Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index b242e7488a..4d1fc9cd13 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -71,11 +71,16 @@ static int match_cpu(u8 family, u8 model) (freq_desc_tables[cpu_index].freqs[freq_id]) /* - * Do MSR calibration only for known/supported CPUs. + * TSC on Intel Atom SoCs capable of determining TSC frequency by MSR is + * reliable and the frequency is known (provided by HW). * - * Returns the calibration value or 0 if MSR calibration failed. + * On these platforms PIT/HPET is generally not available so calibration won't + * work at all and there is no other clocksource to act as a watchdog for the + * TSC, so we have no other choice than to trust it. + * + * Returns the TSC frequency in MHz or 0 if HW does not provide it. */ -static unsigned long __maybe_unused try_msr_calibrate_tsc(void) +static unsigned long __maybe_unused cpu_mhz_from_msr(void) { u32 lo, hi, ratio, freq_id, freq; unsigned long res; @@ -336,7 +341,7 @@ static int tsc_timer_probe(struct udevice *dev) if (!uc_priv->clock_rate) { unsigned long fast_calibrate; - fast_calibrate = try_msr_calibrate_tsc(); + fast_calibrate = cpu_mhz_from_msr(); if (!fast_calibrate) { fast_calibrate = quick_pit_calibrate(); if (!fast_calibrate)