From: Anson Huang <Anson.Huang@nxp.com>
Date: Sun, 7 Jan 2018 06:34:31 +0000 (+0800)
Subject: imx: mx7: psci: add system reset support
X-Git-Tag: v2018.03-rc2~47^2~69
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=169c20e903c85ca0e9b84dda2840b40c00916332;p=u-boot

imx: mx7: psci: add system reset support

Add i.MX7 PSCI system reset support, linux
kernel can use "reboot" command to reset
system even wdog driver is disabled in kernel.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---

diff --git a/arch/arm/mach-imx/mx7/psci-mx7.c b/arch/arm/mach-imx/mx7/psci-mx7.c
index 7f429b0a43..b26be89c78 100644
--- a/arch/arm/mach-imx/mx7/psci-mx7.c
+++ b/arch/arm/mach-imx/mx7/psci-mx7.c
@@ -10,7 +10,7 @@
 #include <asm/secure.h>
 #include <asm/arch/imx-regs.h>
 #include <common.h>
-
+#include <fsl_wdog.h>
 
 #define GPC_CPU_PGC_SW_PDN_REQ	0xfc
 #define GPC_CPU_PGC_SW_PUP_REQ	0xf0
@@ -26,6 +26,9 @@
 #define BP_SRC_A7RCR0_A7_CORE_RESET0	0
 #define BP_SRC_A7RCR1_A7_CORE1_ENABLE	1
 
+#define CCM_ROOT_WDOG		0xbb80
+#define CCM_CCGR_WDOG1		0x49c0
+
 static inline void imx_gpcv2_set_m_core_pgc(bool enable, u32 offset)
 {
 	writel(enable, GPC_IPS_BASE_ADDR + offset);
@@ -74,3 +77,13 @@ __secure int imx_cpu_off(int cpu)
 	writel(0, SRC_BASE_ADDR + cpu * 8 + SRC_GPR1_MX7D + 4);
 	return 0;
 }
+
+__secure void imx_system_reset(void)
+{
+	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
+
+	/* make sure WDOG1 clock is enabled */
+	writel(0x1 << 28, CCM_BASE_ADDR + CCM_ROOT_WDOG);
+	writel(0x3, CCM_BASE_ADDR + CCM_CCGR_WDOG1);
+	writew(WCR_WDE, &wdog->wcr);
+}
diff --git a/arch/arm/mach-imx/mx7/psci.S b/arch/arm/mach-imx/mx7/psci.S
index fc5eb34c88..e23db24ee9 100644
--- a/arch/arm/mach-imx/mx7/psci.S
+++ b/arch/arm/mach-imx/mx7/psci.S
@@ -43,4 +43,11 @@ psci_cpu_off:
 1: 	wfi
 	b 1b
 
+.globl psci_system_reset
+psci_system_reset:
+	bl	imx_system_reset
+
+2: 	wfi
+	b 2b
+
 	.popsection