From: Stefano Babic <sbabic@denx.de>
Date: Tue, 4 Oct 2011 23:43:30 +0000 (+0000)
Subject: Davinci: ea20: Add NAND support
X-Git-Tag: v2011.12-rc1~228^2~31
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=17a8904b2791cdb495370c0e21c95f4ddd4fe877;p=u-boot

Davinci: ea20: Add NAND support

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
---

diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c
index 3b636fffab..f9ad121822 100644
--- a/board/davinci/ea20/ea20.c
+++ b/board/davinci/ea20/ea20.c
@@ -74,20 +74,21 @@ static const struct pinmux_config emac_pins[] = {
 
 #ifdef CONFIG_NAND_DAVINCI
 const struct pinmux_config nand_pins[] = {
-	{ pinmux(7), 1, 1 },
-	{ pinmux(7), 1, 2 },
-	{ pinmux(7), 1, 4 },
-	{ pinmux(7), 1, 5 },
-	{ pinmux(9), 1, 0 },
-	{ pinmux(9), 1, 1 },
-	{ pinmux(9), 1, 2 },
-	{ pinmux(9), 1, 3 },
-	{ pinmux(9), 1, 4 },
-	{ pinmux(9), 1, 5 },
-	{ pinmux(9), 1, 6 },
-	{ pinmux(9), 1, 7 },
-	{ pinmux(12), 1, 5 },
-	{ pinmux(12), 1, 6 }
+	{ pinmux(7), 1, 0},	/* CS2 */
+	{ pinmux(7), 0, 1},	/* CS3  in three state*/
+	{ pinmux(7), 1, 4 },	/* EMA_WE */
+	{ pinmux(7), 1, 5 },	/* EMA_OE */
+	{ pinmux(9), 1, 0 },	/* EMA_D[7] */
+	{ pinmux(9), 1, 1 },	/* EMA_D[6] */
+	{ pinmux(9), 1, 2 },	/* EMA_D[5] */
+	{ pinmux(9), 1, 3 },	/* EMA_D[4] */
+	{ pinmux(9), 1, 4 },	/* EMA_D[3] */
+	{ pinmux(9), 1, 5 },	/* EMA_D[2] */
+	{ pinmux(9), 1, 6 },	/* EMA_D[1] */
+	{ pinmux(9), 1, 7 },	/* EMA_D[0] */
+	{ pinmux(12), 1, 5 },	/* EMA_A[2] */
+	{ pinmux(12), 1, 6 },	/* EMA_A[1] */
+	{ pinmux(6), 1, 0 }	/* EMA_CLK */
 };
 #endif
 
@@ -143,20 +144,20 @@ int board_init(void)
 	irq_init();
 #endif
 
-#ifdef CONFIG_NAND_DAVINCI
 	/*
 	 * NAND CS setup - cycle counts based on da850evm NAND timings in the
 	 * Linux kernel @ 25MHz EMIFA
 	 */
+#ifdef CONFIG_NAND_DAVINCI
 	writel((DAVINCI_ABCR_WSETUP(0) |
-		DAVINCI_ABCR_WSTROBE(0) |
+		DAVINCI_ABCR_WSTROBE(1) |
 		DAVINCI_ABCR_WHOLD(0) |
 		DAVINCI_ABCR_RSETUP(0) |
 		DAVINCI_ABCR_RSTROBE(1) |
 		DAVINCI_ABCR_RHOLD(0) |
 		DAVINCI_ABCR_TA(0) |
 		DAVINCI_ABCR_ASIZE_8BIT),
-	       &davinci_emif_regs->ab2cr); /* CS3 */
+	       &davinci_emif_regs->ab1cr); /* CS2 */
 #endif
 
 	/* arch number of the board */
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index 441676b725..0dd60ada42 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -28,6 +28,7 @@
  */
 #define CONFIG_DRIVER_TI_EMAC
 #define CONFIG_USE_SPIFLASH
+#define	CONFIG_SYS_USE_NAND
 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 
 /*
@@ -99,7 +100,7 @@
 #undef CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SIZE			(8 << 10)
-#define CONFIG_ENV_OFFSET		(256 << 10)
+#define CONFIG_ENV_OFFSET		0x80000
 #define CONFIG_ENV_SECT_SIZE		(64 << 10)
 #define CONFIG_SYS_NO_FLASH
 #endif
@@ -151,7 +152,8 @@
 #undef CONFIG_CMD_PING
 #endif
 
-#ifdef CONFIG_USE_NAND
+/* NAND Setup */
+#ifdef CONFIG_SYS_USE_NAND
 #undef CONFIG_CMD_FLASH
 #undef CONFIG_CMD_IMLS
 #define CONFIG_CMD_NAND
@@ -163,8 +165,20 @@
 #define CONFIG_RBTREE
 #define CONFIG_CMD_UBI
 #define CONFIG_CMD_UBIFS
+
+#define CONFIG_NAND_DAVINCI
+#define	CONFIG_SYS_NAND_PAGE_2K
+#define CONFIG_SYS_NAND_CS		2
+#define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
+#undef CONFIG_SYS_NAND_HW_ECC
+#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+#define	CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */
+#define NAND_MAX_CHIPS			1
+#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
 #endif
 
+/* SPI Flash */
 #ifdef CONFIG_USE_SPIFLASH
 #undef CONFIG_CMD_IMLS
 #undef CONFIG_CMD_FLASH
@@ -173,7 +187,7 @@
 #define CONFIG_CMD_SAVEENV
 #endif
 
-#if !defined(CONFIG_USE_NAND) && \
+#if !defined(CONFIG_SYS_USE_NAND) && \
 	!defined(CONFIG_USE_NOR) && \
 	!defined(CONFIG_USE_SPIFLASH)
 #define CONFIG_ENV_IS_NOWHERE